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* Fix off-by-one error when encoding the stack size for a frameless stack.Bill Wendling2011-12-071-1/+1
| | | | llvm-svn: 146029
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-0767-260/+248
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* Adding missing anchor to DATDeltaAlgorithm.David Blaikie2011-12-071-0/+3
| | | | llvm-svn: 146025
* make CR spill and restore 64-bit clean (no functional change), and fix some ↵Hal Finkel2011-12-076-12/+39
| | | | | | other problems found with -verify-machineinstrs llvm-svn: 146024
* make base register selection used in eliminateFrameIndex 64-bit cleanHal Finkel2011-12-071-8/+13
| | | | llvm-svn: 146023
* set mayStore and mayLoad on CR pseudosHal Finkel2011-12-071-2/+4
| | | | llvm-svn: 146022
* 64-bit LR8 load should use X11 not R11Hal Finkel2011-12-071-3/+3
| | | | llvm-svn: 146021
* Eliminate delta argument from AdjustBBOffsetsAfter.Jakob Stoklund Olesen2011-12-071-24/+15
| | | | | | | | | The block offset can be computed from the previous block. That is more robust than keeping track of a delta. Eliminate one redundant AdjustBBOffsetsAfter call. llvm-svn: 146018
* Compute some alignment information for each basic block.Jakob Stoklund Olesen2011-12-071-14/+48
| | | | | | These fields are not used for anything yet. llvm-svn: 146017
* Zap unnecessary isIntDivCheap() check. PR11485. No testcase because this ↵Eli Friedman2011-12-071-1/+1
| | | | | | doesn't affect any in-tree target. llvm-svn: 146015
* ARM tidy up and remove no longer needed InstAlias definitions.Jim Grosbach2011-12-073-426/+23
| | | | | | The TokenAlias handling of data type suffices renders these unnecessary. llvm-svn: 146010
* Move common expression into a method.Jakob Stoklund Olesen2011-12-071-10/+10
| | | | llvm-svn: 146008
* ARM Implement ARM ARM Table A7-3 via TokenAlias.Jim Grosbach2011-12-071-0/+20
| | | | | | | | | Data type suffix aliasing. Previously handled via lots of instruction aliases. Cleanup of those forthcoming. rdar://10435076 llvm-svn: 146007
* Group BBSizes and BBOffsets into a single vector<BasicBlockInfo>.Jakob Stoklund Olesen2011-12-071-74/+78
| | | | | | No functional change is intended. llvm-svn: 146005
* Add missing check.Jakob Stoklund Olesen2011-12-071-1/+1
| | | | llvm-svn: 146004
* ARM: NEON SHLL instruction immediate operand range checking.Jim Grosbach2011-12-073-11/+90
| | | | llvm-svn: 146003
* Support vector bitcasts in the AsmPrinter. PR11495.Eli Friedman2011-12-071-2/+24
| | | | llvm-svn: 146001
* Add a few moreLocal/Global R_MIPS_GOT related fixups andBruno Cardoso Lopes2011-12-078-48/+48
| | | | | | | | make the addend fixup code a bit more generic Patch by Jack Carter. llvm-svn: 145998
* Add MachineOperand IsInternalRead flag.Jakob Stoklund Olesen2011-12-071-5/+18
| | | | | | | This flag is used when bundling machine instructions. It indicates whether the operand reads a value defined inside or outside its bundle. llvm-svn: 145997
* Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves ↵Eli Friedman2011-12-071-13/+17
| | | | | | correctly. PR11494. llvm-svn: 145996
* Remove unneeded type.Jakub Staszak2011-12-071-2/+0
| | | | llvm-svn: 145995
* ARM: Parameterize the immediate operand type for NEON VSHLL.Jim Grosbach2011-12-071-10/+10
| | | | | | | No functional change yet. Will be implementing range-checked immediates for better diagnostics and disambiguation of instructions. llvm-svn: 145994
* - Remove unneeded #includes.Jakub Staszak2011-12-061-25/+4
| | | | | | | - Remove unused types/fields. - Add some constantness. llvm-svn: 145993
* Revert r145971: "Use conservative size estimate for tBR_JTr."Jakob Stoklund Olesen2011-12-062-4/+26
| | | | | | This caused more offset errors. llvm-svn: 145980
* Re-enable compact unwind. It seems to work now. <rdar://problem/10441838>Bill Wendling2011-12-061-4/+1
| | | | llvm-svn: 145977
* Explicitly check for the different SUB instructions.Bill Wendling2011-12-061-5/+2
| | | | llvm-svn: 145976
* First chunk of MachineInstr bundle support.Evan Cheng2011-12-0613-40/+119
| | | | | | | | | 1. Added opcode BUNDLE 2. Taught MachineInstr class to deal with bundled MIs 3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs 4. Taught MachineBasicBlock methods about bundled MIs llvm-svn: 145975
* Use conservative size estimate for tBR_JTr.Jakob Stoklund Olesen2011-12-062-26/+4
| | | | | | | | | | This pseudo-instruction contains a .align directive in its expansion, so the total size may vary by 2 bytes. It is too difficult to accurately keep track of this alignment directive, just use the worst-case size instead. llvm-svn: 145971
* Remove alignment from deserted constant islands.Jakob Stoklund Olesen2011-12-061-0/+3
| | | | | | | | | | | | | | | | ARMConstantIslandPass may sometimes leave empty constant islands behind (it really shouldn't). Remove the alignment from the empty islands so the size calculations are still correct. This should fix the many Thumb1 assembler errors in the nightly test suite. The reduced test case for this problem is way too big. That is to be expected for ARMConstantIslandPass bugs. <rdar://problem/10534709> llvm-svn: 145970
* Encode the total stack if there isn't a frame.Bill Wendling2011-12-061-2/+3
| | | | llvm-svn: 145969
* * Add a macro to remove a magic number.Bill Wendling2011-12-061-30/+35
| | | | | | * Rename variables to reflect what they're actually used for. llvm-svn: 145968
* Pretty-print basic block alignment.Jakob Stoklund Olesen2011-12-061-2/+6
| | | | llvm-svn: 145965
* add RESTORE_CR and support CR unspillsHal Finkel2011-12-065-28/+89
| | | | llvm-svn: 145961
* remove old FIXMEHal Finkel2011-12-061-1/+0
| | | | llvm-svn: 145960
* Check the correct value for small stack sizes. Also modify some comments.Bill Wendling2011-12-061-5/+8
| | | | llvm-svn: 145954
* For a small sized stack, we encode that value directly with no "stack ↵Bill Wendling2011-12-061-1/+3
| | | | | | adjust" value. llvm-svn: 145952
* PTX: Continue to fix up the register mess.Justin Holewinski2011-12-067-139/+260
| | | | llvm-svn: 145947
* PTX: Encode registers as unsigned values in the MC asm printer instead of ↵Justin Holewinski2011-12-064-14/+88
| | | | | | using external symbols llvm-svn: 145946
* use space star instead of star spaceSebastian Pop2011-12-061-9/+9
| | | | llvm-svn: 145944
* add missing point at the end of sentencesSebastian Pop2011-12-061-6/+6
| | | | llvm-svn: 145943
* Simplify common predecessor finding.Benjamin Kramer2011-12-061-24/+10
| | | | | | | | | | | | - Walking over pred_begin/pred_end is an expensive operation. - PHINodes contain a value for each predecessor anyway. - While it may look like we used to save a few iterations with the set, be aware that getIncomingValueForBlock does a linear search on the values of the phi node. - Another -5% on ARMDisassembler.cpp (Release build). This was the last entry in the profile that was obviously wasting time. llvm-svn: 145937
* Push StringRefs through the metadata interface.Benjamin Kramer2011-12-063-4/+4
| | | | llvm-svn: 145934
* Add X86ISD::HADD/HSUB to getTargetNodeNameCraig Topper2011-12-061-0/+2
| | | | llvm-svn: 145929
* Fix a bunch of SSE/AVX patterns to use v2i64/v4i64 loads since all other ↵Craig Topper2011-12-061-62/+63
| | | | | | integer vector loads are promoted to those. llvm-svn: 145927
* Merge floating point and integer UNPCK X86ISD node types.Craig Topper2011-12-064-167/+104
| | | | llvm-svn: 145926
* Clean up some of the shuffle decoding code for UNPCK instructions. Add ↵Craig Topper2011-12-064-84/+157
| | | | | | instruction commenting for AVX/AVX2 forms for integer UNPCKs. llvm-svn: 145924
* ARM mode 'mul' operand ordering tweak.Jim Grosbach2011-12-061-1/+1
| | | | | | Same as r145922, just for ARM mode. llvm-svn: 145923
* Thumb2: MUL two-operand form encoding operand order fix.Jim Grosbach2011-12-061-1/+1
| | | | | | | | | Fix the alias to encode 'mul r5, r6' as if it were 'mul r5, r6, r5' so we match gas. rdar://10532439 llvm-svn: 145922
* Merge isSHUFPMask and isCommutedSHUFPMask into single function that can do ↵Craig Topper2011-12-061-140/+37
| | | | | | both. Do the same for the 256-bit version. Use loops to reduce size of isVSHUFPYMask. Fix test cases that were incorrectly passing due to isCommutedSHUFPMask not checking for the vector being 128-bit. This caused some 256-bit shuffles to be incorrectly commuted. llvm-svn: 145921
* Thumb2 encoding choice correction for PLD.Jim Grosbach2011-12-061-2/+2
| | | | | | | | Using encoding T1 for offset of #0 and encoding T2 for #-0. rdar://10532413 llvm-svn: 145919
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