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* One more fix to the new API to fix const-correctness.Chris Bieneman2015-01-271-1/+1
| | | | llvm-svn: 227154
* Commoning of target specific load/store intrinsics in Early CSE.Chad Rosier2015-01-263-29/+221
| | | | | | | Phabricator revision: http://reviews.llvm.org/D7121 Patch by Sanjin Sijaric <ssijaric@codeaurora.org>! llvm-svn: 227149
* Pete Cooper suggested the new API should use ArrayRef instead of ↵Chris Bieneman2015-01-261-2/+1
| | | | | | SmallVectorImpl. Also adding a test case. llvm-svn: 227148
* [X86][SSE] Float comparisons can sometimes be safely commutedSimon Pilgrim2015-01-262-0/+45
| | | | | | | | For ordered, unordered, equal and not-equal tests, packed float and double comparison instructions can be safely commuted without affecting the results. This patch checks the comparison mode of the (v)cmpps + (v)cmppd instructions and commutes the result if it can. Differential Revision: http://reviews.llvm.org/D7178 llvm-svn: 227145
* Have the UTF conversion wrappers append a null terminator.Zachary Turner2015-01-261-4/+11
| | | | | | | | | | | This is especially useful for the UTF8 -> UTF16 direction, since there is no equivalent of llvm::SmallString<> for wide characters. This means that anyone who wants a null terminated string is forced to manually push and pop their own null terminator. Reviewed by: Reid Kleckner. llvm-svn: 227143
* [X86][PCLMUL] Enable commutation for PCLMUL instructionsSimon Pilgrim2015-01-262-0/+17
| | | | | | | | Patch to allow (v)pclmulqdq to be commuted - swaps the src registers and inverts the immediate (low/high) src mask. Differential Revision: http://reviews.llvm.org/D7180 llvm-svn: 227141
* Add new HideUnrelatedOptions API that takes a SmallVectorImpl.Chris Bieneman2015-01-261-0/+14
| | | | | | Need a new API for clang-modernize that allows specifying a list of option categories to remain visible. This will allow clang-modernize to move off getRegisteredOptions. llvm-svn: 227140
* bpf: fix build due to 'Move DataLayout back to the TargetMachine'Alexei Starovoitov2015-01-264-4/+5
| | | | | | commit r227113 moved DataLayout llvm-svn: 227133
* SimplifyCFG: Omit range checks for switch lookup tables when default is ↵Hans Wennborg2015-01-261-7/+8
| | | | | | | | | | | unreachable The range check would get optimized away later, but we might as well not emit them in the first place. http://reviews.llvm.org/D6471 llvm-svn: 227126
* SimplifyCFG: don't remove unreachable default switch destinationsHans Wennborg2015-01-261-89/+92
| | | | | | | | | | | | | | | An unreachable default destination can be exploited by other optimizations and allows for more efficient lowering. Both the SDag switch lowering and LowerSwitch can exploit unreachable defaults. Also make TurnSwitchRangeICmp handle switches with unreachable default. This is kind of separate change, but it cannot be tested without the change above, and I don't want to land the change above without this since that would regress other tests. Differential Revision: http://reviews.llvm.org/D6471 llvm-svn: 227125
* Make ConstantFoldTerminator() handle switches with unreachable default.Hans Wennborg2015-01-261-4/+10
| | | | | | | | Tested by Transforms/SimplifyCFG/switch-to-br.ll's @unreachable function. Differential Revision: http://reviews.llvm.org/D6471 llvm-svn: 227124
* [NVPTX] Generate a more optimal sequence for select of i1Justin Holewinski2015-01-263-5/+23
| | | | | | | | | Instead of creating a pattern like "(p && a) || ((!p) && b)", just expand the i8 operands to i32 and perform the selp on them. Fixes PR22246 llvm-svn: 227123
* Add a UTF8 to UTF16 conversion wrapper for use in the pdb dumperReid Kleckner2015-01-261-0/+31
| | | | | | | | | This can also be used instead of the WindowsSupport.h ConvertUTF8ToUTF16 helpers, but that will require massaging some character types. The Windows support routines want wchar_t output, but wchar_t is often 32 bits on non-Windows OSs. llvm-svn: 227122
* Cache the lookup of TargetLowering in the atomic expand pass.Eric Christopher2015-01-261-31/+17
| | | | llvm-svn: 227121
* [SelectionDAG] Fix assert message copypasta. NFC.Ahmed Bougacha2015-01-261-2/+2
| | | | llvm-svn: 227119
* [NVPTX] Handle floating-point conversion patterns that are not explicitly ↵Justin Holewinski2015-01-261-6/+13
| | | | | | | | ordered or unordered Fixes PR22322 llvm-svn: 227117
* Use a different encoding for debugtrap on PS4.Alex Rosenberg2015-01-263-3/+7
| | | | llvm-svn: 227116
* Move DataLayout back to the TargetMachine from TargetSubtargetInfoEric Christopher2015-01-2693-451/+447
| | | | | | | | | | | | | | | | | | | derived classes. Since global data alignment, layout, and mangling is often based on the DataLayout, move it to the TargetMachine. This ensures that global data is going to be layed out and mangled consistently if the subtarget changes on a per function basis. Prior to this all targets(*) have had subtarget dependent code moved out and onto the TargetMachine. *One target hasn't been migrated as part of this change: R600. The R600 port has, as a subtarget feature, the size of pointers and this affects global data layout. I've currently hacked in a FIXME to enable progress, but the port needs to be updated to either pass the 64-bitness to the TargetMachine, or fix the DataLayout to avoid subtarget dependent features. llvm-svn: 227113
* Refine memory dependence's notion of volatile semanticsPhilip Reames2015-01-261-16/+27
| | | | | | | | | | According to my reading of the LangRef, volatiles are only ordered with respect to other volatiles. It is entirely legal and profitable to forward unrelated loads over the volatile load. This patch implements this for GVN by refining the transition rules MemoryDependenceAnalysis uses when encountering a volatile. The added test cases show where the extra flexibility is profitable for local dependence optimizations. I have a related change (227110) which will extend this to non-local dependence (i.e. PRE), but that's essentially orthogonal to the semantic change in this patch. I have tested the two together and can confirm that PRE works over a volatile load with both changes. I will be submitting a PRE w/volatiles test case seperately in the near future. Differential Revision: http://reviews.llvm.org/D6901 llvm-svn: 227112
* Model sqrtsd as a binary operation with one source operand tied to the ↵Sanjay Patel2015-01-261-13/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | destination (PR14221) This patch fixes the following miscompile: define void @sqrtsd(<2 x double> %a) nounwind uwtable ssp { %0 = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %a) nounwind %a0 = extractelement <2 x double> %0, i32 0 %conv = fptrunc double %a0 to float %a1 = extractelement <2 x double> %0, i32 1 %conv3 = fptrunc double %a1 to float tail call void @callee2(float %conv, float %conv3) nounwind ret void } Current codegen: sqrtsd %xmm0, %xmm1 ## high element of %xmm1 is undef here xorps %xmm0, %xmm0 cvtsd2ss %xmm1, %xmm0 shufpd $1, %xmm1, %xmm1 cvtsd2ss %xmm1, %xmm1 ## operating on undef value jmp _callee This is a continuation of http://llvm.org/viewvc/llvm-project?view=revision&revision=224624 ( http://reviews.llvm.org/D6330 ) which was itself a continuation of r167064 ( http://llvm.org/viewvc/llvm-project?view=revision&revision=167064 ). All of these patches are partial fixes for PR14221 ( http://llvm.org/bugs/show_bug.cgi?id=14221 ); this should be the final patch needed to resolve that bug. Differential Revision: http://reviews.llvm.org/D6885 llvm-svn: 227111
* Pass QueryInst down through non-local dependency calculationPhilip Reames2015-01-261-8/+13
| | | | | | | | | | | | | | This change is mostly motivated by exposing information about the original query instruction to the actual scanning work in getPointerDependencyFrom when used by GVN PRE. In a follow up change, I will use this to be more precise with regards to the semantics of volatile instructions encountered in the scan of a basic block. Worth noting, is that this change (despite appearing quite simple) is not semantically preserving. By providing more information to the helper routine, we allow some optimizations to kick in that weren't previously able to (when called from this code path.) In particular, we see that treatment of !invariant.load becomes more precise. In theory, we might see a difference with an ordered/atomic instruction as well, but I'm having a hard time actually finding a test case which shows that. Test wise, I've included new tests for !invariant.load which illustrate this difference. I've also included some updated TBAA tests which highlight that this change isn't needed for that optimization to kick in - it's handled inside alias analysis itself. Eventually, it would be nice to factor the !invariant.load handling inside alias analysis as well. Differential Revision: http://reviews.llvm.org/D6895 llvm-svn: 227110
* Revert GCStrategy ownership changesPhilip Reames2015-01-2615-63/+33
| | | | | | | | | | | | This change reverts the interesting parts of 226311 (and 227046). This change introduced two problems, and I've been convinced that an alternate approach is preferrable anyways. The bugs were: - Registery appears to require all users be within the same linkage unit. After this change, asking for "statepoint-example" in Transform/ would sometimes get you nullptr, whereas asking the same question in CodeGen would return the right GCStrategy. The correct long term fix is to get rid of the utter hack which is Registry, but I don't have time for that right now. 227046 appears to have been an attempt to fix this, but I don't believe it does so completely. - GCMetadataPrinter::finishAssembly was being called more than once per GCStrategy. Each Strategy was being added to the GCModuleInfo multiple times. Once I get time again, I'm going to split GCModuleInfo into the gc.root specific part and a GCStrategy owning Analysis pass. I'm probably also going to kill off the Registry. Once that's done, I'll move the new GCStrategyAnalysis and all built in GCStrategies into Analysis. (As original suggested by Chandler.) This will accomplish my original goal of being able to access GCStrategy from Transform/ without adding all of the builtin GCs to IR/. llvm-svn: 227109
* Teach raw_ostream to support hex formatting without a prefix '0x'.Zachary Turner2015-01-261-2/+5
| | | | | | | | | | Previously using format_hex() would always print a 0x prior to the hex characters. This allows this to be optional, so that one can choose to print (e.g.) 255 as either 0xFF or just FF. Differential Revision: http://reviews.llvm.org/D7151 llvm-svn: 227108
* Remove trailing whitespace. NFC ®Alex Rosenberg2015-01-261-1/+1
| | | | llvm-svn: 227105
* Move the Mips target to storing the ABI in the TargetMachine ratherEric Christopher2015-01-2616-115/+196
| | | | | | | | | | | | | | | | | | | | | | | | | | | than on MipsSubtargetInfo. This required a bit of massaging in the MC level to handle this since MC is a) largely a collection of disparate classes with no hierarchy, and b) there's no overarching equivalent to the TargetMachine, instead only the subtarget via MCSubtargetInfo (which is the base class of TargetSubtargetInfo). We're now storing the ABI in both the TargetMachine level and in the MC level because the AsmParser and the TargetStreamer both need to know what ABI we have to parse assembly and emit objects. The target streamer has a pointer to the one in the asm parser and is updated when the asm parser is created. This is fragile as the FIXME comment notes, but shouldn't be a problem in practice since we always create an asm parser before attempting to emit object code via the assembler. The TargetMachine now contains the ABI so that the DataLayout can be constructed dependent upon ABI. All testcases have been updated to use the -target-abi command line flag so that we can set the ABI without using a subtarget feature. Should be no change visible externally here. llvm-svn: 227102
* Store the passed in CPU name string so that it can be accessed later.Eric Christopher2015-01-261-1/+2
| | | | llvm-svn: 227101
* Fix incorrect partial aliasingDaniel Berlin2015-01-261-7/+20
| | | | | | Update testcases llvm-svn: 227099
* Fix delegationDaniel Berlin2015-01-261-2/+5
| | | | llvm-svn: 227098
* [Support][Windows] Disable error dialog boxes when stack trace printing is ↵Michael J. Spencer2015-01-261-0/+8
| | | | | | enabled. llvm-svn: 227094
* Putting all the standard tool options into a "Generic" category.Chris Bieneman2015-01-261-9/+16
| | | | | | | | | | | | | | | Summary: This puts all the options that CommandLine.cpp implements into a category so that the APIs to hide options can not hide based on the generic category instead of string matching a partial list of argument strings. This patch is pretty simple and straight forward but it does impact the -help output of all tools using cl::opt. Specifically the options implemented in CommandLine.cpp (help, help-list, help-hidden, help-list-hidden, print-options, print-all-options, version) are all grouped together into an Option category, and these options are never hidden by the cl::HideUnrelatedOptions API. Reviewers: dexonsmith, chandlerc, majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7150 llvm-svn: 227093
* [mips] Enable arithmetic and binary operations for the i128 data type.Vasileios Kalintiris2015-01-264-30/+66
| | | | | | | | | | | | | | | | | | Summary: This patch adds support for some operations that were missing from 128-bit integer types (add/sub/mul/sdiv/udiv... etc.). With these changes we can support the __int128_t and __uint128_t data types from C/C++. Depends on D7125 Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7143 llvm-svn: 227089
* The canonical CPU variant for ARM according to config.guess uses aJoerg Sonnenberger2015-01-261-5/+21
| | | | | | | | | | | | | | | | suffix it seems: # ./config.guess earmv7hfeb-unknown-netbsd7.99.4 Extend the triple parsing to support this. Avoid running the ARM parser multiple times because StringSwitch is not lazy. Reviewers: Renato Golin, Tim Northover Differential Revision: http://reviews.llvm.org/D7166 llvm-svn: 227085
* When disassembler meets compact jump instructions for r6 it crashes as the ↵Vladimir Medic2015-01-261-1/+0
| | | | | | access to operands array is out of range. This patch removes dedicated decoder method that wrongly handles decoding of these instructions. llvm-svn: 227084
* Revert "[mips] Fix assertion on i128 addition/subtraction on MIPS64"Vasileios Kalintiris2015-01-262-37/+5
| | | | | | | | This reverts commit r227003. Support for addition/subtraction and various other operations for the i128 data type will be added in a future commit based on the review D7143. llvm-svn: 227082
* SLPVectorizer: fix wrong scheduling of atomic load/stores.Erik Eckstein2015-01-261-1/+12
| | | | | | This fixes PR22306. llvm-svn: 227077
* Correct the header guard for MipsABIInfo.h.Eric Christopher2015-01-261-2/+2
| | | | llvm-svn: 227076
* Fix a problem where the AArch64 ELF assembler was failing withEric Christopher2015-01-261-1/+2
| | | | | | | | | -no-exec-stack. This was due to it not deriving from the correct asm info base class and missing the override for the exec stack section query. Added another line to the noexec test line to make sure this doesn't regress. llvm-svn: 227074
* [X86] Use i8 immediate for comparison type on AVX512 packed integer ↵Craig Topper2015-01-251-0/+75
| | | | | | instructions. This matches floating point equivalents. Includes autoupgrade support to convert old code. llvm-svn: 227063
* Add the triple for the Sony Playstation®4.Alex Rosenberg2015-01-251-0/+2
| | | | | | Lots more to follow. llvm-svn: 227060
* Debug info: Fix PR22296 by omitting the DW_AT_location if we lost theAdrian Prantl2015-01-252-4/+10
| | | | | | | | | | | physical register that is described in a DBG_VALUE. In the testcase the DBG_VALUE describing "p5" becomes unavailable because the register its address is in is clobbered and we (currently) aren't smart enough to realize that the value is rematerialized immediately after the DBG_VALUE and/or is actually a stack slot. llvm-svn: 227056
* [PowerPC] Reset the baseline for ppc64le to be equivalent to pwr8Bill Schmidt2015-01-251-14/+30
| | | | | | | | | | | | | | | | | | | | | Test by Nemanja Ivanovic. Since ppc64le implies POWER8 as a minimum, it makes sense that the same features are included. Since the pwr8 processor model will likely be getting new features until the implementation is complete, I created a new list to add these updates to. This will include them in both pwr8 and ppc64le. Furthermore, it seems that it would make sense to compose the feature lists for other processor models (pwr3 and up). Per discussion in the review, I will make this change in a subsequent patch. In order to test the changes, I've added an additional run step to test cases that specify -march=ppc64le -mcpu=pwr8 to omit the -mcpu option. Since the feature lists are the same, the behaviour should be unchanged. llvm-svn: 227053
* Instantiate Registry<GCStrategy> in LLVMCore, to let it available on Win32 DLL.NAKAMURA Takumi2015-01-251-0/+2
| | | | llvm-svn: 227046
* [ELFYAML] Support mips64 relocation record format in yaml2obj/obj2yamlSimon Atanasyan2015-01-251-1/+48
| | | | | | | | | | | | | | | | | | | MIPS64 ELF file has a very specific relocation record format. Each record might specify up to three relocation operations. So the `r_info` field in fact consists of three relocation type sub-fields and optional code of "special" symbols. http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf page 40 The patch implements support of the MIPS64 relocation record format in yaml2obj/obj2yaml tools by introducing new optional Relocation fields: Type2, Type3, and SpecSym. These fields are recognized only if the object/YAML file relates to the MIPS64 target. Differential Revision: http://reviews.llvm.org/D7136 llvm-svn: 227044
* AVX-512: Changes in operations on masks registers for KNL and SKXElena Demikhovsky2015-01-253-14/+53
| | | | | | | | | - Added KSHIFTB/D/Q for skx - Added KORTESTB/D/Q for skx - Fixed store operation for v8i1 type for KNL - Store size of v8i1, v4i1 and v2i1 are changed to 8 bits llvm-svn: 227043
* OrcJIT: Avoid non-static initializers.NAKAMURA Takumi2015-01-251-1/+1
| | | | llvm-svn: 227041
* Orc/LLVMBuild.txt: Prune redundant "Target" in libdeps.NAKAMURA Takumi2015-01-251-1/+1
| | | | llvm-svn: 227040
* [X86] Give scalar VRNDSCALE instructions priority in AVX512 mode.Craig Topper2015-01-252-20/+26
| | | | llvm-svn: 227039
* Simplify a multiclass. No functional change.Craig Topper2015-01-251-14/+18
| | | | llvm-svn: 227038
* Remove tab characters. NFCCraig Topper2015-01-251-1/+1
| | | | llvm-svn: 227036
* Implemented cost model for masked load/store operations.Elena Demikhovsky2015-01-253-0/+73
| | | | llvm-svn: 227035
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