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* GlobalOpt: Aliases don't have sections, don't copy them when replacingReid Kleckner2014-02-131-1/+2
| | | | | | | | | | | | | | | | | | | | | As defined in LangRef, aliases do not have sections. However, LLVM's GlobalAlias class inherits from GlobalValue, which means we can read and set its section. We should probably ban that as a separate change, since it doesn't make much sense for an alias to have a section that differs from its aliasee. Fixes PR18757, where the section was being lost on the global in code from Clang like: extern "C" { __attribute__((used, section("CUSTOM"))) static int in_custom_section; } Reviewers: rafael.espindola Differential Revision: http://llvm-reviews.chandlerc.com/D2758 llvm-svn: 201286
* Remove a very old instcombine where we would turn sequences of selects intoOwen Anderson2014-02-121-25/+0
| | | | | | | | | | | | | logical operations on the i1's driving them. This is a bad idea for every target I can think of (confirmed with micro tests on all of: x86-64, ARM, AArch64, Mips, and PowerPC) because it forces the i1 to be materialized into a general purpose register, whereas consuming it directly into a select generally allows it to exist only transiently in a predicate or flags register. Chandler ran a set of performance tests with this change, and reported no measurable change on x86-64. llvm-svn: 201275
* [Vectorizer] Add a new 'OperandValueKind' in TargetTransformInfo calledAndrea Di Biagio2014-02-125-12/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | 'OK_NonUniformConstValue' to identify operands which are constants but not constant splats. The cost model now allows returning 'OK_NonUniformConstValue' for non splat operands that are instances of ConstantVector or ConstantDataVector. With this change, targets are now able to compute different costs for instructions with non-uniform constant operands. For example, On X86 the cost of a vector shift may vary depending on whether the second operand is a uniform or non-uniform constant. This patch applies the following changes: - The cost model computation now takes into account non-uniform constants; - The cost of vector shift instructions has been improved in X86TargetTransformInfo analysis pass; - BBVectorize, SLPVectorizer and LoopVectorize now know how to distinguish between non-uniform and uniform constant operands. Added a new test to verify that the output of opt '-cost-model -analyze' is valid in the following configurations: SSE2, SSE4.1, AVX, AVX2. llvm-svn: 201272
* [X86] Teach the backend how to lower vector shift left into multiply rather ↵Andrea Di Biagio2014-02-121-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | than scalarizing it. Instead of expanding a packed shift into a sequence of scalar shifts, the backend now tries (when possible) to convert the vector shift into a vector multiply. Before this change, a shift of a MVT::v8i16 vector by a build_vector of constants was always scalarized into a long sequence of "vector extracts + scalar shifts + vector insert". With this change, if there is SSE2 support, we emit a single vector multiply. This change also affects SSE4.1, AVX, AVX2 shifts: - A shift of a MVT::v4i32 vector by a build_vector of non uniform constants is now lowered when possible into a single SSE4.1 vector multiply. - Packed v16i16 shift left by constant build_vector are now expanded when possible into a single AVX2 vpmullw. This change also improves the lowering of AVX512f vector shifts. Added test CodeGen/X86/vec_shift6.ll with some code examples that are affected by this change. llvm-svn: 201271
* Reformat a few lines with clang-format.Eric Christopher2014-02-121-4/+8
| | | | llvm-svn: 201265
* 80-col.Eric Christopher2014-02-121-1/+2
| | | | llvm-svn: 201264
* [Stackmaps] Improve the stackmap lowering code in the SelectionDAGBuilder.Juergen Ributzka2014-02-121-33/+33
| | | | | | | | | | We are now no longer relying on the target-specific call lowering implementation to lower a stackmap intrinsic call. Instead we perform the call lowering in a target-independent way directly in the stackmap lowering code. This simplifies the code and removes the need to fixup the code after the target-specific call lowering. llvm-svn: 201263
* [Stackmaps] Fix the ID type to be i64 also for stackmaps (as we claim in the ↵Juergen Ributzka2014-02-121-6/+7
| | | | | | | | | | | documenation) The ID type for the stackmap and patchpoint intrinsics are in both cases i64. This fixes an zero extend in the SelectionDAGBuilder that still used i32. This also updates the target independent instructions STACKMAP and PATCHPOINT to use the correct type. llvm-svn: 201262
* Extend RTDyld API to enable optionally precomputing the total amount of memoryLang Hames2014-02-123-65/+205
| | | | | | | | | | | | | | | | | | required for all sections in a module. This can be useful when targets or code-models place strict requirements on how sections must be laid out in memory. If RTDyldMemoryManger::needsToReserveAllocationSpace() is overridden to return true then the JIT will call the following method on the memory manager, which can be used to preallocate the necessary memory. void RTDyldMemoryManager::reserveAllocationSpace(uintptr_t CodeSize, uintptr_t DataSizeRO, uintptr_t DataSizeRW) Patch by Vaidas Gasiunas. Thanks very much Viadas! llvm-svn: 201259
* Rename Windows.h to WindowsSupport.h to avoid ambiguityReid Kleckner2014-02-1214-15/+18
| | | | llvm-svn: 201258
* _CS_DARWIN_USER macros available on darwin>=9. Thanks, Dave Odell!David Fang2014-02-121-1/+2
| | | | llvm-svn: 201255
* Debug info: Bugfix for r201190: DW_OP_piece takes bytes, not bits.Adrian Prantl2014-02-122-3/+5
| | | | | | rdar://problem/16015314 llvm-svn: 201253
* Pass edges weights to MachineBasicBlock::addSuccessor in TailDuplicatePass toAkira Hatanaka2014-02-121-2/+14
| | | | | | | | preserve branch probability information. <rdar://problem/15893208> llvm-svn: 201245
* Revert r201237+r201238: Demote EmitRawText call in ↵Daniel Sanders2014-02-1212-64/+7
| | | | | | | | AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call It introduced multiple test failures in the buildbots. llvm-svn: 201241
* Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove ↵Daniel Sanders2014-02-1212-7/+64
| | | | | | | | | | | | | | | | | | | | | hasRawTextSupport() call Summary: AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output. The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as. All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler. Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2686 llvm-svn: 201237
* Windows/Path.inc: Move <shlobj.h> after "Windows.h" for some API available.NAKAMURA Takumi2014-02-121-2/+3
| | | | | | | | | | | | | | | I found that swapping the order of some header files helped fix a build issue that we're seeing on mingw32. Without the swap, windows.h was being included before _WIN32_WINNT was being defined and the CreateHardLinkW function was #ifdef'd out. It looks like the header is mainly used to get the SHGetFolderPathW function, so I don't think that there'll be much fallout from the switch. Suggested by Alex Crichton. Thanks! llvm-svn: 201230
* R600: Always implement both versions of isTruncateFree and add a sanity check.Benjamin Kramer2014-02-122-5/+12
| | | | llvm-svn: 201222
* Mark XACQUIRE_PREFIX/XRELEASE_PREFIX as isAsmParserOnly so they'll disappear ↵Craig Topper2014-02-121-1/+2
| | | | | | from the disassembler table build without custom filtering code. llvm-svn: 201215
* DwarfUnit: Include type unit's file strings in the defining compile unit's ↵David Blaikie2014-02-121-1/+2
| | | | | | | | | | file_names table There's still one piece missing here, which is adding the DW_AT_stmt_list to the type unit that refer's to the compile unit's line table. Working on that. llvm-svn: 201198
* Fix some formatting in my last commit (r201196)David Blaikie2014-02-122-10/+7
| | | | llvm-svn: 201197
* DwarfUnit: Provide a reference to a defining DwarfCompileUnit from ↵David Blaikie2014-02-124-14/+26
| | | | | | | | | DwarfTypeUnit. Type units need to insert their file strings into the compile unit's line/file table. This is preliminary work to that end. llvm-svn: 201196
* DwarfUnit: Refactor DW_AT_file creation into a common function.David Blaikie2014-02-122-51/+20
| | | | | | | | This is preliminary work to fix type unit file strings so they appear in their originating CU's line table - but it's also just good/simple cleanup, so I'm committing it ahead of time. llvm-svn: 201195
* DwarfUnit: Replace unnecessary conditionals with asserts.David Blaikie2014-02-111-18/+6
| | | | | | | | We used to be pretty vague about what debug entities were what, with many conditionals to silently drop/skip/accept things. These don't seem to be relevant anymore. llvm-svn: 201194
* Tweak ARM fastcc by adopting these two AAPCS rules:Evan Cheng2014-02-111-0/+7
| | | | | | | | | | | | | | * CPRCs may be allocated to co-processor registers or the stack – they may never be allocated to core registers * When a CPRC is allocated to the stack, all other VFP registers should be marked as unavailable The difference is only noticeable in rare cases where there are a large number of floating point arguments (e.g. 7 doubles + additional float, double arguments). Although it's probably still better to avoid vmov as it can cause stalls in some older ARM cores. The other, more subtle benefit, is to minimize difference between the various calling conventions. rdar://16039676 llvm-svn: 201193
* Reapply r201180 with an additional error path.Adrian Prantl2014-02-112-4/+61
| | | | | | | | | | | | Debug info: Emit values in subregisters that do not have a separate DWARF register number by emitting a super-register + DW_OP_bit_piece. This is necessary because on x86_64, there are no DWARF register numbers for i386-style subregisters. Fixes a bunch of FIXMEs. rdar://problem/16015314 llvm-svn: 201190
* Revert "Debug info: Emit values in subregisters that do not have a separate"Adrian Prantl2014-02-112-56/+4
| | | | | | This reverts commit r201179 for buildbot breakage. llvm-svn: 201188
* DebugInfo: Don't include the name of the CU file in the line table file list ↵David Blaikie2014-02-111-3/+0
| | | | | | | | | | when it's unneeded This comes up in empty files or files containing #file directives that never reference the actual source file name. Came up in a small test of line tables I was playing with. llvm-svn: 201187
* whitespaceAdrian Prantl2014-02-111-1/+1
| | | | llvm-svn: 201181
* Debug info: Emit values in subregisters that do not have a separateAdrian Prantl2014-02-112-4/+56
| | | | | | | | | | | DWARF register number by emitting a super-register + DW_OP_bit_piece. This is necessary because on x86_64, there are no DWARF register numbers for i386-style subregisters. Fixes a bunch of FIXMEs. rdar://problem/16015314 llvm-svn: 201180
* make llvm-dwarfdump a little more resilient when parsing .debug_locAdrian Prantl2014-02-111-1/+3
| | | | | | | | sections. The call to data.getUnsigned(&Offset, AddressSize) only increments Offset if the read succeeds, which will result in an infinite loop. llvm-svn: 201179
* R600/SI: Fix assertion on infinite loops.Matt Arsenault2014-02-111-2/+4
| | | | | | | This isn't the most useful case to fix in the real world, but bugpoint runs into this. llvm-svn: 201177
* InstCombine: Teach icmp merging about the equivalence of bit tests and ↵Benjamin Kramer2014-02-111-23/+38
| | | | | | | | | UGE/ULT with a power of 2. This happens in bitfield code. While there reorganize the existing code a bit. llvm-svn: 201176
* ARM: Thumb2 LDR(literal) can target SP.Jim Grosbach2014-02-111-1/+1
| | | | | | | | | Fix a slightly overzealous destination register restriction for the 'without .w' alias. Add some explicit testcases. rdar://16033140 llvm-svn: 201173
* SCEV: Cast switched values to make -Wswitch more useful.Benjamin Kramer2014-02-111-16/+16
| | | | llvm-svn: 201170
* ScalarEvolution: Analyze trip count of loops with a switch guarding the exit.Benjamin Kramer2014-02-111-15/+53
| | | | llvm-svn: 201159
* Teach the DAGCombiner how to fold concat_vector nodes when the input is twoRobert Lougher2014-02-111-0/+20
| | | | | | | | | | | | | BUILD_VECTOR nodes, e.g.: (concat_vectors (BUILD_VECTOR a1, a2, a3, a4), (BUILD_VECTOR b1, b2, b3, b4)) -> (BUILD_VECTOR a1, a2, a3, a4, b1, b2, b3, b4) This fixes an issue with AVX, where a sequence was not recognized as a 256-bit vbroadcast due to the concat_vectors. llvm-svn: 201158
* [AArch64] Add missing PCRel relocations for AArch64 in RuntimeDyldELFBradley Smith2014-02-111-0/+42
| | | | llvm-svn: 201149
* [LPM] Switch LICM to actively use LCSSA in addition to preserving it.Chandler Carruth2014-02-111-152/+90
| | | | | | | | | | | | | | | | | | | | | | | Fixes PR18753 and PR18782. This is necessary for LICM to preserve LCSSA correctly and efficiently. There is still some active discussion about whether we should be using LCSSA, but we can't just immediately stop using it and we *need* LICM to preserve it while we are using it. We can restore the old SSAUpdater driven code if and when there is a serious effort to remove the reliance on LCSSA from all of the loop passes. However, this also serves as a great example of why LCSSA is very nice to have. This change significantly simplifies the process of sinking instructions for LICM, and makes it quite a bit less expensive. It wouldn't even be as complex as it is except that I had to start the process of removing the big recursive LCSSA formation hammer in order to switch even this much of the re-forming code to asserting that LCSSA was preserved. I'll fully remove that next just to tidy things up until the LCSSA debate settles one way or the other. llvm-svn: 201148
* XCore target: fix const section handlingRobert Lytton2014-02-113-28/+40
| | | | | | | | | | | | Xcore target ABI requires const data that is externally visible to be handled differently if it has C-language linkage rather than C++ language linkage. Clang now emits ".cp.rodata" section information. All other externally visible constant data will be placed in the DP section. llvm-svn: 201144
* XCore target: Lower ATOMIC_LOAD & ATOMIC_STORERobert Lytton2014-02-112-0/+70
| | | | llvm-svn: 201143
* AVX: fixed a bug in LowerVECTOR_SHUFFLEElena Demikhovsky2014-02-111-1/+5
| | | | llvm-svn: 201140
* Remove TimeValue::toPosixTime() -- it is buggy, semantics are unclear, and itsDmitri Gribenko2014-02-111-2/+2
| | | | | | only current user should be using toEpochTime() instead. llvm-svn: 201136
* AVX-512: Optimized BUILD_VECTOR pattern; Elena Demikhovsky2014-02-112-4/+6
| | | | | | fixed encoding of VEXTRACTPS instruction. llvm-svn: 201134
* In RuntimeDyldImpl::emitSection, make Allocate (section size to be allocated) aLang Hames2014-02-111-1/+1
| | | | | | | | | | | | | uintptr_t. An unsigned could overflow for large sections. No test case - anything big enough to overflow an unsigned is going to take an appreciable time to zero when the test passes. The choice of uintptr_t was made to match the RTDyldMemoryManager APIs, but these should probably be hardcoded to uint64_ts: It is legitimate to JIT for 64-bit targets from a 32-bit host/compiler. llvm-svn: 201127
* Using the helper API for random number generation.Aaron Ballman2014-02-113-14/+2
| | | | llvm-svn: 201125
* Hopefully fixing the MinGW 32 build, which was broken by r200767. Not using ↵Aaron Ballman2014-02-112-9/+11
| | | | | | rand_s() since MinGW does not have an implementation for it, but instead using the underlying CryptGenRandom APIs. llvm-svn: 201124
* [CodeGenPrepare] Undo changes that happened for the profitability check.Quentin Colombet2014-02-111-0/+7
| | | | | | | | | | | | | | | | | The addressing mode matcher checks at some point the profitability of folding an instruction into the addressing mode. When the instruction to be folded has several uses, it checks that the instruction can be folded in each use. To do so, it creates a new matcher for each use and check if the instruction is in the list of the matched instructions of this new matcher. The new matchers may promote some instructions and this has to be undone to keep the state of the original matcher consistent. A test case will follow. <rdar://problem/16020230> llvm-svn: 201121
* DebugInfo: Use existing symbol rather than creating it again.David Blaikie2014-02-111-1/+1
| | | | llvm-svn: 201119
* [Stackmaps] Cleanup code. No functional change intended.Juergen Ributzka2014-02-101-25/+16
| | | | llvm-svn: 201115
* LTO API: add lto_module_create_from_memory_with_path.Manman Ren2014-02-101-5/+6
| | | | | | | | | | | | | This function adds an extra path argument to lto_module_create_from_memory. The path argument will be passed to makeBuffer to make sure the MemoryBuffer has a name and the created module has a module identifier. This is mainly for emitting warning messages from the linker. When we emit warning message on a module, we can use the module identifier. rdar://15985737 llvm-svn: 201114
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