summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* Revert r200431 due to bot failures.Manman Ren2014-01-302-65/+12
| | | | llvm-svn: 200434
* PGO branch weight: update edge weights in SelectionDAGBuilder.Manman Ren2014-01-302-12/+65
| | | | | | | | When converting from "or + br" to two branches, or converting from "and + br" to two branches, we correctly update the edge weights of the two branches. llvm-svn: 200431
* PGO branch weight: update edge weights in IfConverter.Manman Ren2014-01-292-0/+54
| | | | | | | | | | | | | This commit only handles IfConvertTriangle. To update edge weights of a successor, one interface is added to MachineBasicBlock: /// Set successor weight of a given iterator. setSuccWeight(succ_iterator I, uint32_t weight) An existing testing case test/CodeGen/Thumb2/v8_IT_5.ll is updated, since we now correctly update the edge weights, the cold block is placed at the end of the function and we jump to the cold block. llvm-svn: 200428
* Move range handling for a function to endFunction rather thanEric Christopher2014-01-291-5/+5
| | | | | | when we create the subprogram DIE. llvm-svn: 200426
* If we use DW_AT_ranges we need to specify a base address that rangesEric Christopher2014-01-291-2/+8
| | | | | | | | are relative to in the compile unit. Currently let's just use 0... Thanks to Greg Clayton for the catch! llvm-svn: 200425
* Turn on CU ranges if we've got multiple compile units in the sameEric Christopher2014-01-291-4/+6
| | | | | | | | module since there's no range guarantee that we could make given output order. This also fixes up the testcases that have multiple CUs to have the correct range offset. llvm-svn: 200422
* Make the compile unit map a MapVector so that we can assume a stableEric Christopher2014-01-292-3/+5
| | | | | | output ordering. llvm-svn: 200421
* Fix formatting of comment.Eric Christopher2014-01-291-4/+2
| | | | llvm-svn: 200420
* MC: Better management of macro argumentsDavid Majnemer2014-01-291-55/+22
| | | | | | | | | | | | The linux kernel makes uses of a GAS `feature' which substitutes nothing for macro arguments which aren't specified. Proper support for these kind of macro arguments necessitated a cleanup of differences between `GAS' and `Darwin' dialect macro processing. Differential Revision: http://llvm-reviews.chandlerc.com/D2634 llvm-svn: 200409
* [CommandLine] Aliases require an value if their target requires a value.Jordan Rose2014-01-291-0/+7
| | | | | | | | | This can still be overridden by explicitly setting a value requirement on the alias option, but by default it should be the same. PR18649 llvm-svn: 200407
* Add support for PC-relative non-extern relocations to RuntimeDyldMachO.Lang Hames2014-01-291-0/+2
| | | | | | | | | Also replaces testcase for r180790 (support for absolute non-externs relocs) with a more robust version. <rdar://problem/15864721> llvm-svn: 200404
* [X86][SchedModel] Fix typos in the definitions of the ports for Haswell.Quentin Colombet2014-01-291-6/+8
| | | | llvm-svn: 200403
* Test commitOliver Stannard2014-01-291-0/+1
| | | | llvm-svn: 200401
* [mips][msa] Add fill.d instruction.Matheus Almeida2014-01-292-1/+16
| | | | | | | This instruction is only available on Mips64 cores that implement the MSA ASE. llvm-svn: 200400
* [mips][msa] Add copy_{u,s}.d.Matheus Almeida2014-01-293-14/+52
| | | | | | | These instructions are only available on Mips64 cores that implement the MSA ASE. llvm-svn: 200398
* [LPM] Fix PR18643, another scary place where loop transforms failed toChandler Carruth2014-01-292-49/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | preserve loop simplify of enclosing loops. The problem here starts with LoopRotation which ends up cloning code out of the latch into the new preheader it is buidling. This can create a new edge from the preheader into the exit block of the loop which breaks LoopSimplify form. The code tries to fix this by splitting the critical edge between the latch and the exit block to get a new exit block that only the latch dominates. This sadly isn't sufficient. The exit block may be an exit block for multiple nested loops. When we clone an edge from the latch of the inner loop to the new preheader being built in the outer loop, we create an exiting edge from the outer loop to this exit block. Despite breaking the LoopSimplify form for the inner loop, this is fine for the outer loop. However, when we split the edge from the inner loop to the exit block, we create a new block which is in neither the inner nor outer loop as the new exit block. This is a predecessor to the old exit block, and so the split itself takes the outer loop out of LoopSimplify form. We need to split every edge entering the exit block from inside a loop nested more deeply than the exit block in order to preserve all of the loop simplify constraints. Once we try to do that, a problem with splitting critical edges surfaces. Previously, we tried a very brute force to update LoopSimplify form by re-computing it for all exit blocks. We don't need to do this, and doing this much will sometimes but not always overlap with the LoopRotate bug fix. Instead, the code needs to specifically handle the cases which can start to violate LoopSimplify -- they aren't that common. We need to see if the destination of the split edge was a loop exit block in simplified form for the loop of the source of the edge. For this to be true, all the predecessors need to be in the exact same loop as the source of the edge being split. If the dest block was originally in this form, we have to split all of the deges back into this loop to recover it. The old mechanism of doing this was conservatively correct because at least *one* of the exiting blocks it rewrote was the DestBB and so the DestBB's predecessors were fixed. But this is a much more targeted way of doing it. Making it targeted is important, because ballooning the set of edges touched prevents LoopRotate from being able to split edges *it* needs to split to preserve loop simplify in a coherent way -- the critical edge splitting would sometimes find the other edges in need of splitting but not others. Many, *many* thanks for help from Nick reducing these test cases mightily. And helping lots with the analysis here as this one was quite tricky to track down. llvm-svn: 200393
* Enable EHABI by defaultRenato Golin2014-01-295-27/+35
| | | | | | | | | | | | | | | | | | | | | | After all hard work to implement the EHABI and with the test-suite passing, it's time to turn it on by default and allow users to disable it as a work-around while we fix the eventual bugs that show up. This commit also remove the -arm-enable-ehabi-descriptors, since we want the tables to be printed every time the EHABI is turned on for non-Darwin ARM targets. Although MCJIT EHABI is not working yet (needs linking with the right libraries), this commit also fixes some relocations on MCJIT regarding the EH tables/lib calls, and update some tests to avoid using EH tables when none are needed. The EH tests in the test-suite that were previously disabled on ARM now pass with these changes, so a follow-up commit on the test-suite will re-enable them. llvm-svn: 200388
* [Sparc] Use %r_disp32 for pc_rel entries in FDE as well.Venkatraman Govindaraju2014-01-292-0/+16
| | | | | | This makes MCAsmInfo::getExprForFDESymbol() a virtual function and overrides it in SparcMCAsmInfo. llvm-svn: 200376
* Revert r200340, "Add line table debug info to COFF files when using a win32 ↵NAKAMURA Takumi2014-01-296-500/+28
| | | | | | | | triple." It was incompatible with --target=i686-win32. llvm-svn: 200375
* [Sparc] Use %r_disp32 for pc_rel entries in gcc_except_table and eh_frame.Venkatraman Govindaraju2014-01-298-7/+107
| | | | | | | | Otherwise, assembler (gas) fails to assemble them with error message "operation combines symbols in different segments". This is because MC computes pc_rel entries with subtract expression between labels from different sections. llvm-svn: 200373
* [LPM] Fix PR18642, a pretty nasty bug in IndVars that "never mattered"Chandler Carruth2014-01-291-7/+23
| | | | | | | | | | | | | | | | | | | | | | | because of the inside-out run of LoopSimplify in the LoopPassManager and the fact that LoopSimplify couldn't be "preserved" across two independent LoopPassManagers. Anyways, in that case, IndVars wasn't correctly preserving an LCSSA PHI node because it thought it was rewriting (via SCEV) the incoming value to a loop invariant value. While it may well be invariant for the current loop, it may be rewritten in terms of an enclosing loop's values. This in and of itself is fine, as the LCSSA PHI node in the enclosing loop for the inner loop value we're rewriting will have its own LCSSA PHI node if used outside of the enclosing loop. With me so far? Well, the current loop and the enclosing loop may share an exiting block and exit block, and when they do they also share LCSSA PHI nodes. In this case, its not valid to RAUW through the LCSSA PHI node. Expected crazy test included. llvm-svn: 200372
* LoopVectorizer: Don't count the induction variable multiple timesArnold Schwaighofer2014-01-291-0/+9
| | | | | | | | When estimating register pressure, don't count the induction variable mulitple times. It is unlikely to be unrolled. This is currently disabled and hidden behind a flag ("enable-ind-var-reg-heur"). llvm-svn: 200371
* [SparcV9] Use correct register class (I64RegClass) to hold the address of ↵Venkatraman Govindaraju2014-01-292-3/+4
| | | | | | _GLOBAL_OFFSET_TABLE_ in sparcv9. llvm-svn: 200368
* Use a raw_stream to implement the mangler.Rafael Espindola2014-01-291-61/+73
| | | | | | | | | This is a bit more convenient for some callers, but more importantly, it is easier to implement correctly. Doing this removes the patching of already printed data that was used for fastcall, fixing a crash with private fastcall symbols. llvm-svn: 200367
* [AArch64 NEON] Lower SELECT_CC with vector operand.Kevin Qin2014-01-292-56/+182
| | | | | | | | When the scalar compare is between floating point and operands are vector, we custom lower SELECT_CC to use NEON SIMD compare for generating less instructions. llvm-svn: 200365
* Remove unnecessary call to pthread_mutexattr_setpshared()Mark Seaborn2014-01-291-7/+0
| | | | | | | | | | | | | | | | | | | The default value of this attribute is PTHREAD_PROCESS_PRIVATE, so there's no point in calling pthread_mutexattr_setpshared() to set that. See: http://pubs.opengroup.org/onlinepubs/9699919799/functions/pthread_mutexattr_getpshared.html This removes some ifdefs that tend to need to be extended for other platforms (e.g. for NaCl). Note that this call was in the first implementation of Mutex, added in r22403, so it doesn't appear to have been added in response to a performance problem. Differential Revision: http://llvm-reviews.chandlerc.com/D2633 llvm-svn: 200360
* MC: Clean up error paths in AsmParser::parseMacroArgumentDavid Majnemer2014-01-291-10/+20
| | | | | | | | | Use an RAII object Instead of inserting a call to AsmLexer::setSkipSpace(true) in all error paths. No functional change. llvm-svn: 200358
* Make createObjectFile's signature a bit less error prone.Rafael Espindola2014-01-291-1/+1
| | | | | | | This will be better with c++11, but right now file_magic converts to bool, which makes the api really easy to misuse. llvm-svn: 200357
* [Sparc] Fix breakage in r200345David Woodhouse2014-01-281-9/+10
| | | | | | Oops. Don't do build tests on patches like that with --enable-targets=x86_64 llvm-svn: 200355
* Delete MCSubtargetInfo data members from target MCCodeEmitter classesDavid Woodhouse2014-01-286-107/+99
| | | | | | | | The subtarget info is explicitly passed to the EncodeInstruction method and we should use that subtarget info to influence any encoding decisions. llvm-svn: 200350
* Propagate MCSubtargetInfo through TableGen's getBinaryCodeForInstr()David Woodhouse2014-01-289-310/+545
| | | | llvm-svn: 200349
* Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction()David Woodhouse2014-01-2817-29/+49
| | | | llvm-svn: 200348
* Keep the MCSubtargetInfo in the MCRelxableFragment class.David Woodhouse2014-01-282-2/+2
| | | | | | | | | | | Needed to fix PR18303 to correctly re-encode the instruction if it is relaxed. We keep a copy of the MCSubtargetInfo to make sure that we are not effected by future changes to the subtarget info coming from the assembler (e.g. when parsing .code 16 directived). llvm-svn: 200347
* Modify MCObjectStreamer EmitInstTo* interfaceDavid Woodhouse2014-01-285-14/+21
| | | | | | | | Add MCSubtargetInfo parameter virtual void EmitInstToFragment(const MCInst &Inst, const MCSubtargetInfo &); virtual void EmitInstToData(const MCInst &Inst, const MCSubtargetInfo &); llvm-svn: 200346
* Change MCStreamer EmitInstruction interface to take subtarget infoDavid Woodhouse2014-01-2826-153/+171
| | | | llvm-svn: 200345
* Add line table debug info to COFF files when using a win32 triple.Timur Iskhodzhanov2014-01-286-28/+500
| | | | | | Reviewed at http://llvm-reviews.chandlerc.com/D2232 llvm-svn: 200340
* [mips] Fix ELF header flags.Matheus Almeida2014-01-281-1/+8
| | | | | | | As opposed to GCC/GAS the default ABI for Mips64 is n64. Compatibility bit should be set if o32 ABI is used when targeting Mips64. llvm-svn: 200332
* [NVPTX] Fix emitting aggregate parametersGautam Chakrabarti2014-01-281-3/+3
| | | | | | | | The code was missing the case for aggregate parameters and hence was emitting them as .b0 type. Also fixed a couple of comments. llvm-svn: 200325
* [X86] Add extra rules for combining vselect dag nodes into movsd.Andrea Di Biagio2014-01-281-0/+40
| | | | | | | | | | | | | | | | | | | This improves the fix committed at revision 199683 adding the following new target specific combine rules: 1) fold (v4i32: vselect <0,0,-1,-1>, A, B) -> (v4i32 (bitcast (movsd (v2i64 (bitcast A)), (v2i64 (bitcast B))) )) 2) fold (v4f32: vselect <0,0,-1,-1>, A, B) -> (v4f32 (bitcast (movsd (v2f64 (bitcast A)), (v2f64 (bitcast B))) )) 3) fold (v4i32: vselect <-1,-1,0,0>, A, B) -> (v4i32 (bitcast (movsd (v2i64 (bitcast B)), (v2i64 (bitcast A))) )) 4) fold (v4f32: vselect <-1,-1,0,0>, A, B) -> (v4f32 (bitcast (movsd (v2i64 (bitcast B)), (v2i64 (bitcast A))) )) llvm-svn: 200324
* typoAdrian Prantl2014-01-281-1/+1
| | | | llvm-svn: 200323
* Fix pr14893.Rafael Espindola2014-01-282-0/+53
| | | | | | | | | | | When simplifycfg moves an instruction, it must drop metadata it doesn't know is still valid with the preconditions changes. In particular, it must drop the range and tbaa metadata. The patch implements this with an utility function to drop all metadata not in a white list. llvm-svn: 200322
* [DAGCombiner] Avoid introducing an illegal build_vector when folding a ↵Andrea Di Biagio2014-01-281-9/+15
| | | | | | | | | | | | | | | | | sign_extend. Make sure that we don't introduce illegal build_vector dag nodes when trying to fold a sign_extend of a build_vector. This fixes a regression introduced by r200234. Added test CodeGen/X86/fold-vector-sext-crash.ll to verify that llc no longer crashes with an assertion failure due to an illegal build_vector of type MVT::v4i64. Thanks to Ilia Filippov for spotting this regression and for providing a reproducible test case. llvm-svn: 200313
* Provide a stub Target Streamer implementation for PPC MachOIain Sandoe2014-01-281-2/+17
| | | | | | At present, this handles .tc (error) and needs to be expanded to deal properly with .machine llvm-svn: 200309
* [vectorizer] Completely disable the block frequency guidance of the loopChandler Carruth2014-01-281-3/+13
| | | | | | | | | | | | | | | vectorizer, placing it behind an off-by-default flag. It turns out that block frequency isn't what we want at all, here or elsewhere. This has been I think a nagging feeling for several of us working with it, but Arnold has given some really nice simple examples where the results are so comprehensively wrong that they aren't useful. I'm planning to email the dev list with a summary of why its not really useful and a couple of ideas about how to better structure these types of heuristics. llvm-svn: 200294
* Handle spilling the PPC GPRC_NOR0 register classHal Finkel2014-01-281-4/+8
| | | | | | | GPRC_NOR0 is not a subclass of GPRC (because it also contains the ZERO pseudo register). As a result, we also need to check for it in the spilling code. llvm-svn: 200288
* MC: Add a .debug section that we'll soon use to emit debug info into COFF filesTimur Iskhodzhanov2014-01-281-0/+7
| | | | llvm-svn: 200285
* R600/SI: Add pattern for truncating i32 to i1Michel Danzer2014-01-281-0/+5
| | | | | | | Fixes half a dozen piglit tests with radeonsi. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 200283
* Fix the DWARF EH encodings for Sparc PIC code.Jakob Stoklund Olesen2014-01-282-0/+47
| | | | | | | Also emit the stubs that were generated for references to typeinfo symbols. llvm-svn: 200282
* Update optimization passes to handle inalloca argumentsReid Kleckner2014-01-2810-20/+38
| | | | | | | | | | | | | | | Summary: I searched Transforms/ and Analysis/ for 'ByVal' and updated those call sites to check for inalloca if appropriate. I added tests for any change that would allow an optimization to fire on inalloca. Reviewers: nlewycky Differential Revision: http://llvm-reviews.chandlerc.com/D2449 llvm-svn: 200281
* x86: add implicit defs for cpuidReid Kleckner2014-01-281-2/+7
| | | | | | | This avoids miscompiling MS inline asm in LLVM where we have to infer clobbers. Test case forthcoming in Clang. llvm-svn: 200279
OpenPOWER on IntegriCloud