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* The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed ↵Jack Carter2012-10-026-56/+54
| | | | | | | | | | | | by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands. If the code is generated as assembler, this transformation does not occur assuming that it will occur later in the assembler. This code was originally called from MipsAsmPrinter.cpp and we needed to check for OutStreamer.hasRawTextSupport(). This was not a good place for it and has been moved to MCTargetDesc/MipsMCCodeEmitter.cpp where both direct object and the assembler use it it automagically. The test cases have been checked in for a number of weeks now. llvm-svn: 165067
* Teach the new SROA to handle cases where an alloca that has already beenChandler Carruth2012-10-021-0/+4
| | | | | | | | | | | | | | | | scheduled for processing on the worklist eventually gets deleted while we are processing another alloca, fixing the original test case in PR13990. To facilitate this, add a remove_if helper to the SetVector abstraction. It's not easy to use the standard abstractions for this because of the specifics of SetVectors types and implementation. Finally, a nice small test case is included. Thanks to Benjamin for the fantastic reduced test case here! All I had to do was delete some empty basic blocks! llvm-svn: 165065
* Make sure to put our sret argument into %rax on x86-64. Fixes PR13563!Nick Lewycky2012-10-021-2/+16
| | | | llvm-svn: 165063
* Remove the old coalescer algorithm.Jakob Stoklund Olesen2012-10-021-344/+1
| | | | | | | The new algorithm has been enabled by default for almost a week now and seems to be stable. llvm-svn: 165062
* Handle reserved registers more accurately in handleMove().Jakob Stoklund Olesen2012-10-021-8/+7
| | | | | | | | | | | | Reserved register live ranges look like a set of dead defs - any uses of reserved registers are ignored. Instead of skipping the updating of reserved register operands entirely, just ignore the use operands and treat the def operands normally. No test case, handleMove() is not commonly used yet. llvm-svn: 165060
* [ms-inline asm] Add basic support for wildcard MCParsedAsmOperands. This typeChad Rosier2012-10-021-8/+26
| | | | | | | | | | | | | of operand is specific to MS-style inline assembly and should not be generated when parsing normal assembly. The purpose of the wildcard operands are to allow the AsmParser to match multiple instructions (i.e., MCInsts) to a given ms-style asm statement. For the time being the matcher just returns the first match. This patch only implements wildcard matches for memory operands. Support for register wildcards will be added in the near future. llvm-svn: 165057
* Make sure the whole live range is covered when values are pruned twice.Jakob Stoklund Olesen2012-10-021-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | JoinVals::pruneValues() calls LIS->pruneValue() to avoid conflicts when overlapping two different values. This produces a set of live range end points that are used to reconstruct the live range (with SSA update) after joining the two registers. When a value is pruned twice, the set of end points was insufficient: v1 = DEF v1 = REPLACE1 v1 = REPLACE2 KILL v1 The end point at KILL would only reconstruct the live range from REPLACE2 to KILL, leaving the range REPLACE1-REPLACE2 dead. Add REPLACE2 as an end point in this case so the full live range is reconstructed. This fixes PR13999. llvm-svn: 165056
* 80-col.Eric Christopher2012-10-021-2/+2
| | | | llvm-svn: 165054
* Clean-up of memory buffer and object ownership model in MCJITAndrew Kaylor2012-10-0211-158/+157
| | | | llvm-svn: 165053
* Don't use a debug location for frame setup instructions in theEric Christopher2012-10-022-5/+4
| | | | | | | prologue. Also skip frame setup instructions when looking for the first location. llvm-svn: 165052
* Use the existing DebugLoc.Eric Christopher2012-10-021-1/+1
| | | | llvm-svn: 165051
* Make the location a parameter since we may not want the next oneEric Christopher2012-10-021-7/+10
| | | | | | in the block. llvm-svn: 165050
* Remove the SavePoint infrastructure from fast isel, replaceEric Christopher2012-10-022-13/+18
| | | | | | | with just an insert point from the MachineBasicBlock and let the location be updated as we access it. llvm-svn: 165049
* Improve overflow detection in StringRef::getAsUnsignedInteger().Nick Kledzik2012-10-021-2/+2
| | | | llvm-svn: 165038
* Fix another crasher in SROA, reported by Joel.Chandler Carruth2012-10-021-9/+32
| | | | | | | | | | | | | | | | | | We require that the indices into the use lists are stable in order to build fast lookup tables to locate a particular partition use from an operand of a PHI or select. This is (obviously in hind sight) incompatible with erasing elements from the array. Really, we don't want to erase anyways. It is expensive, and a rare operation. Instead, simply weaken the contract of the PartitionUse structure to allow null Use pointers to represent dead uses. Now we can clear out the pointer to mark things as dead, and all it requires is adding some 'continue' checks to the various loops. I'm still reducing a test case for this, as the test case I have is huge. I think this one I can get a nice test case for though, as it was much more deterministic. llvm-svn: 165032
* Support for generating ELF objects on Windows.Andrew Kaylor2012-10-026-9/+26
| | | | | | This adds 'elf' as a recognized target triple environment value and overrides the default generated object format on Windows platforms if that value is present. This patch also enables MCJIT tests on Windows using the new environment value. llvm-svn: 165030
* Fix a silly coding error on my part. The whole point of the speculatorChandler Carruth2012-10-021-16/+28
| | | | | | | | | | | | | | | being separate was that it can grow the use list. As a consequence, we can't use the iterator-pair interface, we need an index based interface. Expose such an interface from the AllocaPartitioning, and use it in the speculator. This should at least fix a use-after-free bug found by Duncan, and may fix some of the other crashers. I don't have a nice deterministic test case yet, but if I get a good one, I'll add it. llvm-svn: 165027
* Fix PR13991: legalizing an overflowing multiplication operation is harder thanDuncan Sands2012-10-021-7/+15
| | | | | | | the add/sub case since in the case of multiplication you also have to check that the operation in the larger type did not overflow. llvm-svn: 165017
* Turn the new SROA pass back on. Let's see if it sticks this time. =]Chandler Carruth2012-10-021-1/+1
| | | | | | Again, let me know if anything breaks due to this! llvm-svn: 164986
* [ms-inline asm] Add the convertToMapAndConstraints() function that is used toChad Rosier2012-10-014-35/+47
| | | | | | | | | | | map constraints and MCInst operands to inline asm operands. This replaces the getMCInstOperandNum() function. The logic to determine the constraints are not in place, so we still default to a register constraint (i.e., "r"). Also, we no longer build the MCInst but rather return just the opcode to get the MCInstrDesc. llvm-svn: 164979
* MachO: direct-to-object attribute for data-in-code markers.Jim Grosbach2012-10-013-6/+9
| | | | | | | | | | The target backend can support data-in-code load commands even when the assembler doesn't, or vice-versa. Allow targets to opt-in for direct-to-object. PR13973. llvm-svn: 164974
* Add in support for SPIR to LLVM core. This adds a new target and two new ↵Micah Villmow2012-10-014-0/+16
| | | | | | calling conventions. llvm-svn: 164948
* Provide a shortcut for MCObjectStreamer when emitting fills.Benjamin Kramer2012-10-011-0/+8
| | | | | | | Reduces runtime of i386-large-relocations.s by 10x in Release builds, even more in Debug+Asserts builds. llvm-svn: 164945
* Make this plural. Spotted by Duncan in review (and a very old typo, thisChandler Carruth2012-10-011-1/+1
| | | | | | is the second time I've moved this comment around...) llvm-svn: 164939
* Prune some unnecessary includes.Chandler Carruth2012-10-011-4/+0
| | | | llvm-svn: 164938
* Fix several issues with alignment. We weren't always accounting for typeChandler Carruth2012-10-011-31/+32
| | | | | | | | | | alignment requirements of the new alloca. As one consequence which was reported as a bug by Duncan, we overaligned memcpy calls to ranges of allocas after they were rewritten to types with lower alignment requirements. Other consquences are possible, but I don't have any test cases for them. llvm-svn: 164937
* SimplifyCFG: Don't crash when forming a switch bitmap with an undef default ↵Benjamin Kramer2012-10-011-2/+5
| | | | | | | | value. Fixes PR13985. llvm-svn: 164934
* Factor the PHI and select speculation into a separate rewriter. ThisChandler Carruth2012-10-011-263/+294
| | | | | | | | | | | | | | | could probably be factored still further to hoist this logic into a generic helper, but currently I don't have particularly clean ideas about how to handle that. This at least allows us to drop custom load rewriting from the speculation logic, which in turn allows the existing load rewriting logic to fire. In theory, this could enable vector promotion or other tricks after speculation occurs, but I've not dug into such issues. This is primarily just cleaning up the factoring of the code and the resulting logic. llvm-svn: 164933
* Use constants for all return values in switch. Allows clang to optimize it ↵Craig Topper2012-10-011-3/+8
| | | | | | into a lookup table. llvm-svn: 164926
* Refactor the PartitionUse structure to actually use the Use* instead ofChandler Carruth2012-10-011-85/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a pair of instructions, one for the used pointer and the second for the user. This simplifies the representation and also makes it more dense. This was noticed because of the miscompile in PR13926. In that case, we were running up against a fundamental "bad idea" in the speculation of PHI and select instructions: the speculation and rewriting are interleaved, which requires phi speculation to also perform load rewriting! This is bad, and causes us to miss opportunities to do (for example) vector rewriting only exposed after PHI speculation, etc etc. It also, in the old system, required us to insert *new* load uses into the current partition's use list, which would then be ignored during rewriting because we had already extracted an end iterator for the use list. The appending behavior (and much of the other oddities) stem from the strange de-duplication strategy in the PartitionUse builder. Amusingly, all this went without notice for so long because it could only be triggered by having *different* GEPs into the same partition of the same alloca, where both different GEPs were operands of a single PHI, and where the GEP which was not encountered first also had multiple uses within that same PHI node... Hence the insane steps required to reproduce. So, step one in fixing this fundamental bad idea is to make the PartitionUse actually contain a Use*, and to make the builder do proper deduplication instead of funky de-duplication. This is enough to remove the appending behavior, and fix the miscompile in PR13926, but there is more work to be done here. Subsequent commits will lift the speculation into its own visitor. It'll be a useful step toward potentially extracting all of the speculation logic into a generic utility transform. The existing PHI test case for repeated operands has been made more extreme to catch even these issues. This test case, run through the old pass, will exactly reproduce the miscompile from PR13926. ;] We were so close here! llvm-svn: 164925
* Use dyn_cast instead of isa and cast.Jakub Staszak2012-09-301-10/+8
| | | | | | No functionality change. llvm-svn: 164924
* SimplifyCFG: Enumerating all predecessors of a BB can be expensive ↵Benjamin Kramer2012-09-301-3/+7
| | | | | | | | (switches), avoid it if possible. No functionality change. llvm-svn: 164923
* Change getX86SubSuperRegister to take an MVT::SimpleValueType rather than an ↵Craig Topper2012-09-304-11/+12
| | | | | | EVT and add llvm_unreachable to the switches. Helps it compile to dramatically better code. llvm-svn: 164919
* ArgumentPromotion: Remove ancient workaround for a bug in the C backend.Benjamin Kramer2012-09-301-19/+1
| | | | | | Fun fact: The CBE learned how to deal with this situation before it was removed. llvm-svn: 164918
* Ignore apparent buffer overruns on external or weak globals. This is a majorDuncan Sands2012-09-301-7/+11
| | | | | | | source of false positives due to globals being declared in a header with some kind of incomplete (small) type, but the actual definition being bigger. llvm-svn: 164912
* Revert r164910 because it causes failures to several phase2 builds.Nadav Rotem2012-09-301-254/+0
| | | | llvm-svn: 164911
* A DAGCombine optimization for merging consecutive stores. This optimization ↵Nadav Rotem2012-09-301-0/+254
| | | | | | | | | | | | | | | | | | | is not profitable in many cases because moden processos can store multiple values in parallel, and preparing the consecutive store requires some work. We only handle these cases: 1. Consecutive stores where the values and consecutive loads. For example: int a = p->a; int b = p->b; q->a = a; q->b = b; 2. Consecutive stores where the values are constants. Foe example: q->a = 4; q->b = 5; llvm-svn: 164910
* Add LLVM support for Swift.Bob Wilson2012-09-2918-63/+1810
| | | | llvm-svn: 164899
* Whitespace.Bob Wilson2012-09-291-1/+1
| | | | llvm-svn: 164898
* Shrink TargetAlignElem a bit, we do a lot of searches on them.Benjamin Kramer2012-09-291-0/+2
| | | | llvm-svn: 164897
* Fix a somewhat surprising miscompile where code relying on an ABIChandler Carruth2012-09-291-3/+13
| | | | | | | | | | | | | | | alignment could lose it due to the alloca type moving down to a much smaller alignment guarantee. Now SROA will actively compute a proper alignment, factoring the target data, any explicit alignment, and the offset within the struct. This will in some cases lower the alignment requirements, but when we lower them below those of the type, we drop the alignment entirely to give freedom to the code generator to align it however is convenient. Thanks to Duncan for the lovely test case that pinned this down. =] llvm-svn: 164891
* Speculatively revert commit 164885 (nadav) in the hope of ressurecting a pile ofDuncan Sands2012-09-291-252/+0
| | | | | | | | | | | | | | | | | | | | buildbots. Original commit message: A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases because moden processos can store multiple values in parallel, and preparing the consecutive store requires some work. We only handle these cases: 1. Consecutive stores where the values and consecutive loads. For example: int a = p->a; int b = p->b; q->a = a; q->b = b; 2. Consecutive stores where the values are constants. Foe example: q->a = 4; q->b = 5; llvm-svn: 164890
* Tidy up to match coding standards. Remove 'else' after 'return' and moving ↵Craig Topper2012-09-291-27/+24
| | | | | | operators to end of preceding line. No functional change intended. llvm-svn: 164887
* Replace a couple if/elses around similar calls with conditional operators on ↵Craig Topper2012-09-291-17/+6
| | | | | | the varying arguments. No functional change. llvm-svn: 164886
* A DAGCombine optimization for merging consecutive stores. This optimization ↵Nadav Rotem2012-09-291-0/+252
| | | | | | | | | | | | | | | | | | | is not profitable in many cases because moden processos can store multiple values in parallel, and preparing the consecutive store requires some work. We only handle these cases: 1. Consecutive stores where the values and consecutive loads. For example: int a = p->a; int b = p->b; q->a = a; q->b = b; 2. Consecutive stores where the values are constants. Foe example: q->a = 4; q->b = 5; llvm-svn: 164885
* Do not delete BBs if their addresses are taken. rdar://12396696Evan Cheng2012-09-281-2/+3
| | | | llvm-svn: 164866
* Don't use bit-wise operations to query for inclusion/exclusion of attributes.Bill Wendling2012-09-281-14/+49
| | | | llvm-svn: 164860
* GlobalDCE should be run at -O2 / -Os to eliminate unused dtor, etc. ↵Evan Cheng2012-09-281-4/+3
| | | | | | rdar://9142819 llvm-svn: 164850
* MIPS DSP: other miscellaneous instructions.Akira Hatanaka2012-09-282-0/+136
| | | | llvm-svn: 164845
* MIPS DSP: ADDUH.QB instruction sub-class.Akira Hatanaka2012-09-282-0/+112
| | | | llvm-svn: 164840
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