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* X86: when replacing SUB with TEST in ISelDAGToDAG, only replace uses of theManman Ren2012-09-281-5/+28
| | | | | | | | second output of SUB with first output of TEST. PR13966 llvm-svn: 164835
* Removing dependency on third party library for Intel JIT event support.Andrew Kaylor2012-09-288-10/+1350
| | | | | | Patch committed on behalf of Kirill Uhanov llvm-svn: 164831
* Replace the use of strncpy() and sprintf() with std::string and LLVM streams.Dmitri Gribenko2012-09-281-4/+7
| | | | | | Patch by Martinez, Javier E. llvm-svn: 164822
* CorrelatedPropagation: BasicBlock::removePredecessor can simplify PHI nodes. ↵Benjamin Kramer2012-09-281-0/+5
| | | | | | | | If the it's the condition of a SwitchInst, reload it. Fixes PR13972. llvm-svn: 164818
* Make backtraces work again with both the configure and cmake build.Benjamin Kramer2012-09-281-1/+1
| | | | llvm-svn: 164817
* GlobalOpt: non-constexpr bitcasts or GEPs can occur even if the global value ↵Benjamin Kramer2012-09-281-1/+3
| | | | | | | | is only stored once. Fixes PR13968. llvm-svn: 164815
* Surprisingly, we missed a trivial case here. Fix that!Nick Lewycky2012-09-281-0/+4
| | | | llvm-svn: 164814
* 1. Add load/store words from the stackReed Kotler2012-09-283-34/+86
| | | | | | | | | 2. As part of this, added assembly format FEXT_RI16_SP_explicit_ins and moved other lines for FEXT_RI16 formats to be in the right place in the code. 3. Added mayLoad and mayStore assignements for the load/store instructions added and for ones already there that did not have this assignment. 4. Another patch will deal with the problem of load/store byte/halfword to the stack. This is a particular Mips16 problem. llvm-svn: 164811
* Remove <def,read-undef> flags from partial redefinitions.Jakob Stoklund Olesen2012-09-271-0/+6
| | | | | | | | | The new coalescer can turn a full virtual register definition into a partial redef by merging another value into an unused vector lane. Make sure to clear the <read-undef> flag on such defs. llvm-svn: 164807
* Enable the new coalescer algorithm by default.Jakob Stoklund Olesen2012-09-271-1/+1
| | | | | | | The new coalescer is better at merging values into unused vector lanes, improving NEON code. llvm-svn: 164794
* Don't dereference begin() on an empty vector.Jakob Stoklund Olesen2012-09-271-1/+1
| | | | | | | | The fix is obvious and the only test case I have is horrible, so I am not including it. The problem shows up when self-hosting clang on i386 with -new-coalescer enabled. llvm-svn: 164793
* MIPS DSP: ABSQ_S.PH instruction sub-class.Akira Hatanaka2012-09-272-0/+162
| | | | llvm-svn: 164787
* MIPS DSP: SHLL.QB instruction sub-class.Akira Hatanaka2012-09-272-0/+151
| | | | llvm-svn: 164786
* Fix a integer overflow in SimplifyCFG's look up table formation logic.Benjamin Kramer2012-09-271-0/+4
| | | | | | | | If the width is very large it gets truncated from uint64_t to uint32_t when passed to TD->fitsInLegalInteger. The truncated value can fit in a register. This manifested in massive memory usage or crashes (PR13946). llvm-svn: 164784
* Avoid dereferencing a NULL pointer.Jakob Stoklund Olesen2012-09-271-1/+1
| | | | | | Fixes PR13943. llvm-svn: 164778
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. ↵Sylvestre Ledru2012-09-2742-128/+128
| | | | | | See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 llvm-svn: 164768
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-2742-128/+128
| | | | llvm-svn: 164767
* Prefer shuffles to selects. Backends love shuffles!Nick Lewycky2012-09-271-1/+19
| | | | llvm-svn: 164763
* [arm-fast-isel] Add support for ELF PIC.Jush Lu2012-09-275-2/+123
| | | | | | | This is a preliminary step towards ELF support; currently ARMFastISel hasn't been used for ELF object files yet. llvm-svn: 164759
* MIPS DSP: rddsp (instruction which reads DSPControl register fields to a GPR).Akira Hatanaka2012-09-272-0/+26
| | | | llvm-svn: 164756
* MIPS DSP: CMPU.EQ.QB instruction sub-class.Akira Hatanaka2012-09-272-0/+224
| | | | llvm-svn: 164755
* MIPS DSP: ADDU.QB instruction sub-class.Akira Hatanaka2012-09-272-0/+195
| | | | llvm-svn: 164754
* MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos ↵Akira Hatanaka2012-09-274-0/+103
| | | | | | Field instruction. llvm-svn: 164751
* MIPS DSP: all the remaining instructions which read or write accumulators.Akira Hatanaka2012-09-273-0/+444
| | | | llvm-svn: 164750
* MIPS DSP: add support for extract-word instructions.Akira Hatanaka2012-09-274-0/+224
| | | | llvm-svn: 164749
* MIPS DSP: add functions which decode DSP and accumulator registers.Akira Hatanaka2012-09-271-0/+29
| | | | llvm-svn: 164748
* MIPS DSP: add code necessary for pseudo instruction lowering.Akira Hatanaka2012-09-275-2/+22
| | | | llvm-svn: 164747
* MIPS DSP: add bitcast patterns between vectors and int.Akira Hatanaka2012-09-271-0/+10
| | | | | | No test cases. These patterns will get tested along with dsp intrinsics. llvm-svn: 164746
* MIPS DSP: add vector load/store patterns.Akira Hatanaka2012-09-272-0/+18
| | | | llvm-svn: 164744
* Fix of hang during Intel JIT profilingAndrew Kaylor2012-09-261-11/+9
| | | | | | Committed on behalf of Kirill Uhanov llvm-svn: 164736
* Disable the new SROA pass to get the tree back in working order. We don't yetNick Lewycky2012-09-261-1/+1
| | | | | | have testcases for the current problems. llvm-svn: 164731
* Add IRBuilder code for adding !tbaa.struct metadata tags to llvm.memcpy calls.Dan Gohman2012-09-261-1/+5
| | | | llvm-svn: 164728
* Query the parameter attributes directly instead of using the Attribute symbols.Bill Wendling2012-09-261-5/+5
| | | | llvm-svn: 164727
* Remove the `hasFnAttr' method from Function.Bill Wendling2012-09-2630-52/+52
| | | | | | | The hasFnAttr method has been replaced by querying the Attributes explicitly. No intended functionality change. llvm-svn: 164725
* X86_32: Large Symbol+Offset relocations.Jim Grosbach2012-09-261-8/+40
| | | | | | | | | | If the offset is more than 24-bits, it won't fit in a scattered relocation offset field, so we fall back to using a non-scattered relocation. rdar://12358909 llvm-svn: 164724
* Initial commit for the AttributesImpl class.Bill Wendling2012-09-264-1/+84
| | | | | | | | This opaque class will contain all of the attributes. All attribute queries will go through this object. This object will also be uniqued in the LLVMContext. Currently not used, so no implementation change. llvm-svn: 164722
* Add case clauses for returning dsp accumulator encoding values in functionAkira Hatanaka2012-09-261-2/+4
| | | | | | getMipsRegisterNumbering. llvm-svn: 164720
* Add DSP accumulator registers and register class. Remove hi/lo registers.Akira Hatanaka2012-09-261-33/+9
| | | | llvm-svn: 164719
* Delete member MipsFunctionInfo::OutArgFIRange and code that accesses it.Akira Hatanaka2012-09-263-31/+8
| | | | llvm-svn: 164718
* Add support for detecting some corei7-class Xeons.Benjamin Kramer2012-09-261-0/+2
| | | | llvm-svn: 164714
* Now that invoke of an intrinsic is possible (for the llvm.do.nothing intrinsic)Duncan Sands2012-09-261-4/+5
| | | | | | | teach the callgraph logic to not create callgraph edges to intrinsics for invoke instructions; it already skips this for call instructions. Fixes PR13903. llvm-svn: 164707
* YAMLParser: Fix invalid reads when encountering incorrectly quoted scalar.Benjamin Kramer2012-09-261-0/+7
| | | | | | Fixes PR12632. llvm-svn: 164701
* APFloat::roundToIntegral: Special values don't keep the exponent value up to ↵Benjamin Kramer2012-09-261-1/+1
| | | | | | | | date, don't rely on it. Add a couple of unit tests for special floats. Fixes 13929, found by MemorySanitizer. llvm-svn: 164698
* Address Duncan's comments on r164684:Hans Wennborg2012-09-261-9/+5
| | | | | | | | - Put statistics in alphabetical order - Don't use getZextValue when building TableInt, just use APInts - Introduce Create{Z,S}ExtOrTrunc in IRBuilder. llvm-svn: 164696
* Address Duncan's comments on r164682:Hans Wennborg2012-09-261-6/+4
| | | | | | | - Finish assert messages with exclamation mark - Move overflow checking into ShouldBuildLookupTable. llvm-svn: 164692
* Analogous fix to memset and memcpy rewriting. Don't have a test caseChandler Carruth2012-09-261-0/+16
| | | | | | | contrived for these yet, as I spotted them by inspection and the test cases are a bit more tricky to phrase. llvm-svn: 164691
* When rewriting the pointer operand to a load or store which hasChandler Carruth2012-09-261-0/+6
| | | | | | | alignment guarantees attached, re-compute the alignment so that we consider offsets which impact alignment. llvm-svn: 164690
* Teach all of the loads, stores, memsets and memcpys created by theChandler Carruth2012-09-261-32/+49
| | | | | | | | | | | | | rewriter in SROA to carry a proper alignment. This involves interrogating various sources of alignment, etc. This is a more complete and principled fix to PR13920 as well as related bugs pointed out by Eli in review and by inspection in the area. Also by inspection fix the integer and vector promotion paths to create aligned loads and stores. I still need to work up test cases for these... Sorry for the delay, they were found purely by inspection. llvm-svn: 164689
* Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.James Molloy2012-09-261-2/+2
| | | | llvm-svn: 164685
* SimplifyCFG: Make the switch-to-lookup table transformation store theHans Wennborg2012-09-261-12/+89
| | | | | | | | | | | | | | | | tables in bitmaps when they fit in a target-legal register. This saves some space, and it also allows for building tables that would otherwise be deemed too sparse. One interesting case that this hits is example 7 from http://blog.regehr.org/archives/320. We currently generate good code for this when lowering the switch to the selection DAG: we build a bitmask to decide whether to jump to one block or the other. My patch will result in the same bitmask, but it removes the need for the jump, as the return value can just be retrieved from the mask. llvm-svn: 164684
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