| Commit message (Collapse) | Author | Age | Files | Lines |
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Patch by Nathan Jeffords!
llvm-svn: 126425
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Limit the folding of any_ext and sext into the load operation to scalars.
Limit the active-bits trunc optimization to scalars.
Document vector trunc and vector sext in LangRef.
Similar to commit 126080 (for enabling zext).
llvm-svn: 126424
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The problem was codegen guessing the wrong values and printing
.section .eh_frame,"aMS",@progbits,4
It is not clear at all if Codegen should try to guess, MC is the
one that should know the default flags.
llvm-svn: 126421
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llvm-svn: 126398
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llvm-svn: 126397
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llvm-svn: 126384
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- Don't leak parsed operands during tokenization.
- Don't leak printed insts in llvm-mc.
llvm-svn: 126381
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registers at phis. This enables us to eliminate a lot of pointless zexts during
the DAGCombine phase. This fixes <rdar://problem/8760114>.
llvm-svn: 126380
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llvm-svn: 126379
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a block is visited before all of its predecessors.
llvm-svn: 126378
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llvm-svn: 126377
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and make the actual map private.
llvm-svn: 126376
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allows for the information propagated across basic blocks to be merged at phis.
llvm-svn: 126375
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trivial places. This pass needs a lot of work.
llvm-svn: 126367
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to reduce nesting. This needs to be turned into a table.
llvm-svn: 126366
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function prototype into a call to a varargs prototype. We do
allow the xform if we have a definition, but otherwise we don't
want to risk that we're changing the abi in a subtle way. On
X86-64, for example, varargs require passing stuff in %al.
llvm-svn: 126363
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operands starts at index 2, not 1.
rdar://9045024
PR9305
llvm-svn: 126359
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register.
This avoids some silly stack slot shuffling when both sides of a copy get
spilled.
llvm-svn: 126353
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DW_LANG_lo_user=0x8000 to DW_LANG_hi_user=0xffff range.
llvm-svn: 126339
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enabled for all targets. Non-X86 targets should not have this behavior
enabled by default.
Joerg, if you would like to resubmit with the behavior conditionalized to be
X86-ELF only, that's fine.
llvm-svn: 126336
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Fixes PR9292.
llvm-svn: 126330
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llvm-svn: 126322
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events on the thread and wait until a resource is ready to event. The vector
of the resource that is ready is returned.
llvm-svn: 126320
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No code will be inserted after the split point anyway.
llvm-svn: 126319
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llvm-svn: 126315
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llvm-svn: 126314
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llvm-svn: 126313
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it to ignore valid uses of FS and GS as additional
base registers in address computations. Added a test
case for this.
llvm-svn: 126302
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llvm-svn: 126298
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r124468. Patch by Rafael Avila de Espindola!
llvm-svn: 126297
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The previous codegen for the slow path (when values are in VFP / NEON
registers) was incorrect if the source is NaN.
The new codegen uses NEON vbsl instruction to copy the sign bit. e.g.
vmov.i32 d1, #0x80000000
vbsl d1, d2, d0
If NEON is not available, it uses integer instructions to copy the sign bit.
rdar://9034702
llvm-svn: 126295
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new ranges.
When a large live range is evicted, it will usually be split when it comes
around again. By deferring evicted live ranges, the splitting happens at a time
when the interference pattern is more realistic. This prevents repeated
splitting and evictions.
llvm-svn: 126282
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llvm-svn: 126277
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Use interval sizes instead of spill weights to determine if it is legal to evict
interference. A smaller interval can evict interference if all interfering live
ranges are larger.
Allow multiple interferences to be evicted as along as they are all larger than
the live range being allocated.
Spill weights are still used to select the preferred eviction candidate.
llvm-svn: 126276
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llvm-svn: 126264
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allocated first.
This is based on the observation that long live ranges are more difficult to
allocate, so there is a better chance of solving the puzzle by handling the big
pieces first. The allocator will evict and split long alive ranges when they get
in the way.
RABasic is still using spill weights for its priority queue, so the interface to
the queue has been virtualized.
llvm-svn: 126259
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llvm-svn: 126258
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values from all of the loop's exiting blocks are equal. Patch by Andrew Clinton.
llvm-svn: 126253
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llvm-svn: 126244
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Cortex-A8 only.
llvm-svn: 126238
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clang uses DBuilder, so it requries corresponding change.
llvm-svn: 126231
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llvm-svn: 126226
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parser.
llvm-svn: 126225
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share entries. Add a DenseSet to MachineConstantPool for the MachineCPVs that
it owns.
This will hopefully fix the MC/ARM/elf-reloc-01.ll failure on the leaks bots.
llvm-svn: 126218
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llvm-svn: 126192
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rdar://9027648.
llvm-svn: 126191
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Apparently it's ok for multiple operands to "kill" the same register.
Fixes PR9237.
llvm-svn: 126190
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llvm-svn: 126185
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up by the dynamic linker, but it's better to use the correct instruction
to begin with.
Fixes rdar://9011034
llvm-svn: 126176
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registers
at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.
llvm-svn: 126170
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