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* [DWARF parser] Use enums instead of bitfields in DILineInfoSpecifier.Alexey Samsonov2014-05-155-53/+55
| | | | | | | | | | | | It is more appropriate than the current situation, when one flag (AbsoluteFilePath) is relevant only if another flag is set. This refactoring would also simplify fetching the short function name (stored in DW_AT_name) instead of a linkage name returned currently. No functionality change. llvm-svn: 208921
* Don't insert lifetime.end markers between a musttail call and retReid Kleckner2014-05-151-2/+12
| | | | | | | | | | | | | The allocas going out of scope are immediately killed by the return instruction. This is a resend of r208912, which was committed accidentally. Reviewers: chandlerc Differential Revision: http://reviews.llvm.org/D3792 llvm-svn: 208920
* Revert "Don't insert lifetime.end markers between a musttail call and ret"Reid Kleckner2014-05-151-12/+2
| | | | | | | | This reverts commit r208912. It was committed accidentally without review. llvm-svn: 208914
* Remove unused variable in inlinerReid Kleckner2014-05-151-7/+4
| | | | | | | | | We have to iterate over all the calls that were inlined to find out if any were musttail. Sink another variable down to where its used. llvm-svn: 208913
* Don't insert lifetime.end markers between a musttail call and retReid Kleckner2014-05-151-2/+12
| | | | | | | | | | | The allocas going out of scope are immediately killed by the return instruction. Reviewers: chandlerc Differential Revision: http://reviews.llvm.org/D3630 llvm-svn: 208912
* DebugInfo: Simplify retrieving filename/directory name for line table entry ↵David Blaikie2014-05-151-26/+6
| | | | | | building. llvm-svn: 208911
* Teach the inliner how to preserve musttail invariantsReid Kleckner2014-05-151-26/+112
| | | | | | | | | | | | | | | | | | | | The interesting case is what happens when you inline a musttail call through a musttail call site. In this case, we can't break perfect forwarding or allow any stack growth. Instead of merging control flow from the inlined return instruction after a musttail call into the body of the caller, leave the inlined return instruction in the caller so that the musttail call stays in the tail position. More work is required in http://reviews.llvm.org/D3630 to handle the case where the inlined function has dynamic allocas or byval arguments. Reviewers: chandlerc Differential Revision: http://reviews.llvm.org/D3491 llvm-svn: 208910
* DebugInfo: Add FIXME regarding DILexicalBlock uniquing fields.David Blaikie2014-05-151-0/+7
| | | | llvm-svn: 208909
* [obj2yaml][ELF] Do not print empty Link and Info fields for ELF sections.Simon Atanasyan2014-05-151-2/+2
| | | | llvm-svn: 208905
* Revert "[PM] Add pass run listeners to the pass manager."Juergen Ributzka2014-05-156-111/+1
| | | | | | | Revert the current implementation and C API. New implementation and C APIs are in the works. llvm-svn: 208904
* [ARM64] Improve diagnostics for Cn operands in SYS instructionsBradley Smith2014-05-151-69/+24
| | | | llvm-svn: 208902
* [X86] Teach the backend how to fold SSE4.1/AVX/AVX2 blend intrinsics.Andrea Di Biagio2014-05-151-2/+54
| | | | | | | | | | | | | Added target specific combine rules to fold blend intrinsics according to the following rules: 1) fold(blend A, A, Mask) -> A; 2) fold(blend A, B, <allZeros>) -> A; 3) fold(blend A, B, <allOnes>) -> B. Added two new tests to verify that the new folding rules work for all the optimized blend intrinsics. llvm-svn: 208895
* [mips][mips64r6] Add CLASS.fmt instructionsZoran Jovanovic2014-05-151-5/+9
| | | | | | Differential Revision: http://reviews.llvm.org/D3712 llvm-svn: 208894
* [mips][mips64r6] Add RINT.fmt instructionsZoran Jovanovic2014-05-152-2/+29
| | | | | | Differential Revision: http://reviews.llvm.org/D3711 llvm-svn: 208892
* [mips][mips64r6] Add SELEQZ/SELNEZ.fmt instructionsZoran Jovanovic2014-05-151-4/+21
| | | | | | Differential Revision: http://reviews.llvm.org/D3710 llvm-svn: 208891
* [mips][mips64r6] Add MAX/MIN/MAXA/MINA.fmt instructionsZoran Jovanovic2014-05-151-7/+35
| | | | | | Differential Revision: http://reviews.llvm.org/D3709 llvm-svn: 208890
* R600/SI: Stop using VSrc_* as the default register class for types.Tom Stellard2014-05-152-63/+11
| | | | | | | | | | We now use SReg_* for integer types and VReg_* for floating-point types. This should help simplify the SIFixSGPRCopies pass and no longer causes ISel to insert a COPY after termiator instuctions that output a value. This change is covered by exisitng tests. llvm-svn: 208888
* R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopiesTom Stellard2014-05-152-7/+28
| | | | | | This prevents a future commit from regressing the load-i1.ll test. llvm-svn: 208887
* R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0Tom Stellard2014-05-151-5/+6
| | | | llvm-svn: 208886
* R600/SI: Use VALU instructions for i1 opsTom Stellard2014-05-152-11/+29
| | | | llvm-svn: 208885
* TableGen: use correct MIOperand when printing aliasesTim Northover2014-05-153-36/+20
| | | | | | | | | | | | | | Previously, TableGen assumed that every aliased operand consumed precisely 1 MachineInstr slot (this was reasonable because until a couple of days ago, nothing more complicated was eligible for printing). This allows a couple more ARM64 aliases to print so we can remove the special code. On the X86 side, I've gone for explicit AT&T size specifiers as the default, so turned off a few of the aliases that would have just started printing. llvm-svn: 208880
* [mips][mips64r6] Add bitswap, and dbitswapDaniel Sanders2014-05-153-4/+32
| | | | | | | | | | | | Summary: Depends on D3728 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3729 llvm-svn: 208877
* Instead of littering asserts throughout the code after every call toJay Foad2014-05-153-93/+59
| | | | | | | computeKnownBits, consolidate them into one assert at the end of computeKnownBits itself. llvm-svn: 208876
* ARM64: print correct aliases for NEON mov & mvn instructionsTim Northover2014-05-152-15/+7
| | | | | | | | In all cases, if a "mov" alias exists, it is the canonical form of the instruction. Now that TableGen can support aliases containing syntax variants, we can enable them and improve the quality of the asm output. llvm-svn: 208874
* [mips][mips64r6] Add align and dalignDaniel Sanders2014-05-155-10/+64
| | | | | | | | | | | | Summary: Depends on D3689 Reviewers: vmedic, zoran.jovanovic, jkolek Reviewed By: jkolek Differential Revision: http://reviews.llvm.org/D3728 llvm-svn: 208872
* TableGen/ARM64: print aliases even if they have syntax variants.Tim Northover2014-05-155-40/+47
| | | | | | | To get at least one use of the change (and some actual tests) in with its commit, I've enabled the AArch64 & ARM64 NEON mov aliases. llvm-svn: 208867
* ARM64: add correct vector registers during asm parsingTim Northover2014-05-152-5/+23
| | | | | | | | | Previously, we ignored the difference between V64 and V128 when parsing assembly: they both got mapped to registers in the FPR128 class. This is basically harmless at the moment because they both print and encode the same way. However, it will affect the printing of aliases. llvm-svn: 208866
* [ARM64] Improve load/store diagnostics and forbid 32-bit register addressesBradley Smith2014-05-151-2/+11
| | | | llvm-svn: 208864
* [ARM64] Parse fixed vector lanes properly so that diagnostics can be emittedBradley Smith2014-05-153-81/+92
| | | | llvm-svn: 208863
* [ARM64] Add/Fixup diagnostics for floating point immediatesBradley Smith2014-05-152-3/+18
| | | | llvm-svn: 208862
* [ARM64] Add condition code operand type such that proper diagnostics can be ↵Bradley Smith2014-05-154-32/+62
| | | | | | emitted llvm-svn: 208861
* [ARM64] Add more simple diagnostics for immediate/shift rangesBradley Smith2014-05-152-10/+25
| | | | llvm-svn: 208860
* [mips][mips64r6] Add addiupc, aluipc, and auipcDaniel Sanders2014-05-157-4/+93
| | | | | | | | | | | | | | | | Summary: No support for symbols in place of the immediate yet since it requires new relocations. Depends on D3671 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3689 llvm-svn: 208858
* [mips][mips64r6] Add aui, daui, dahi, and datiDaniel Sanders2014-05-153-5/+59
| | | | | | | | | | | | Summary: Depends on D3671 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3759 llvm-svn: 208857
* Teach the constant folder to look through bitcast constant expressionsChandler Carruth2014-05-151-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | much more effectively when trying to constant fold a load of a constant. Previously, we only handled bitcasts by trying to find a totally generic byte representation of the constant and use that. Now, we look through the bitcast to see what constant we might fold the load into, and then try to form a constant expression cast of the found value that would be equivalent to loading the value. You might wonder why on earth this actually matters. Well, turns out that the Itanium ABI causes us to create a single array for a vtable where the first elements are virtual base offsets, followed by the virtual function pointers. Because the array is homogenous the element type is consistently i8* and we inttoptr the virtual base offsets into the initial elements. Then constructors bitcast these pointers to i64 pointers prior to loading them. Boom, no more constant folding of virtual base offsets. This is the first fix to LLVM to address the *insane* performance Eric Niebler discovered with Clang on his range comprehensions[1]. There is more to come though, this doesn't *really* fix the problem fully. [1]: http://ericniebler.com/2014/04/27/range-comprehensions/ llvm-svn: 208856
* [mips][mips64r6] Test that branch likelies are not accepted on MIPS64r6.Daniel Sanders2014-05-151-2/+0
| | | | | | | | | | | | | | | Summary: They aren't implemented for any ISA at the moment. Depends on D3670 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3671 llvm-svn: 208855
* Reverting r208848, reason: build failure: ↵Dinesh Dwivedi2014-05-151-37/+5
| | | | | | sanitizer-x86_64-linux-bootstrap/builds/3399 llvm-svn: 208852
* Added instcombine for 'MIN(MIN(A, 27), 93)' and 'MAX(MAX(A, 93), 27)'Dinesh Dwivedi2014-05-151-2/+18
| | | | | | | | | MIN(MIN(A, 23), 97) -> MIN(A, 23) MAX(MAX(A, 97), 23) -> MAX(A, 97) Differential Revision: http://reviews.llvm.org/D3629 llvm-svn: 208849
* Added inst combine transforms for single bit tests from Chris's noteDinesh Dwivedi2014-05-151-5/+37
| | | | | | | | | | | | | | | if ((x & C) == 0) x |= C becomes x |= C if ((x & C) != 0) x ^= C becomes x &= ~C if ((x & C) == 0) x ^= C becomes x |= C if ((x & C) != 0) x &= ~C becomes x &= ~C if ((x & C) == 0) x &= ~C becomes nothing Z3 Verifications code for above transform http://rise4fun.com/Z3/Pmsh Differential Revision: http://reviews.llvm.org/D3717 llvm-svn: 208848
* Fix some dyslexia in an assert messageJonathan Roelofs2014-05-151-2/+2
| | | | llvm-svn: 208842
* Fix typosAlp Toker2014-05-156-10/+10
| | | | llvm-svn: 208839
* [ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out ↵Jiangning Liu2014-05-155-101/+377
| | | | | | argument stack from callee. llvm-svn: 208837
* Move the TargetMachine MC options to MCTargetOptions. No functionalEric Christopher2014-05-152-5/+3
| | | | | | change. llvm-svn: 208832
* InstCombine: Optimize -x s< cstDavid Majnemer2014-05-151-0/+10
| | | | | | | | | | | | | | Summary: This gets rid of a sub instruction by moving the negation to the constant when valid. Reviewers: nicholas Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D3773 llvm-svn: 208827
* DwarfDebug: Don't set frame index locations on abstract variables.David Blaikie2014-05-141-2/+0
| | | | | | | | Abstract variables should never have/use locations. In this case the data wasn't used, so no functional change intended here, just simplification. llvm-svn: 208820
* DebugInfo: Sure up subprogram variable list handling with more assertions ↵David Blaikie2014-05-141-33/+31
| | | | | | | | | | | | and fewer conditionals. Many old tests using prior schemas still had some brokenness here (both indirect arrays and arrays with single bogus elements). Fixed those up so they don't hit the new assertions. Also reduced nesting in some places, etc. llvm-svn: 208817
* DebugInfo: Assert that a CU's subprogram list contains only subprograms.David Blaikie2014-05-141-2/+2
| | | | llvm-svn: 208816
* Teach llvm-nm to know about fat archives (aka MachOUniversal filesKevin Enderby2014-05-141-0/+20
| | | | | | containing archives). First step as other tools will be updated next. llvm-svn: 208812
* Rename ComputeMaskedBits to computeKnownBits. "Masked" has beenJay Foad2014-05-1438-292/+291
| | | | | | inappropriate since it lost its Mask parameter in r154011. llvm-svn: 208811
* InstSimplify: Optimize signed icmp of -(zext V)David Majnemer2014-05-141-0/+22
| | | | | | | | | | | | | | | | Summary: We know that -(zext V) will always be <= zero, simplify signed icmps that have these. Uncovered using http://www.cs.utah.edu/~regehr/souper/ Reviewers: nicholas Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D3754 llvm-svn: 208809
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