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* Fix some significant problems with constant pools that resulted in ↵Evan Cheng2009-03-1316-116/+128
| | | | | | | | | | | | | | | | | | | | | | | unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues. 1. ConstantPoolSDNode alignment field is log2 value of the alignment requirement. This is not consistent with other SDNode variants. 2. MachineConstantPool alignment field is also a log2 value. 3. However, some places are creating ConstantPoolSDNode with alignment value rather than log2 values. This creates entries with artificially large alignments, e.g. 256 for SSE vector values. 4. Constant pool entry offsets are computed when they are created. However, asm printer group them by sections. That means the offsets are no longer valid. However, asm printer uses them to determine size of padding between entries. 5. Asm printer uses expensive data structure multimap to track constant pool entries by sections. 6. Asm printer iterate over SmallPtrSet when it's emitting constant pool entries. This is non-deterministic. Solutions: 1. ConstantPoolSDNode alignment field is changed to keep non-log2 value. 2. MachineConstantPool alignment field is also changed to keep non-log2 value. 3. Functions that create ConstantPool nodes are passing in non-log2 alignments. 4. MachineConstantPoolEntry no longer keeps an offset field. It's replaced with an alignment field. Offsets are not computed when constant pool entries are created. They are computed on the fly in asm printer and JIT. 5. Asm printer uses cheaper data structure to group constant pool entries. 6. Asm printer compute entry offsets after grouping is done. 7. Change JIT code to compute entry offsets on the fly. llvm-svn: 66875
* Convert VirtRegMap to a MachineFunctionPass.Owen Anderson2009-03-134-28/+63
| | | | llvm-svn: 66870
* generalize the previous code to use the full generality of LEAChris Lattner2009-03-131-13/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | for i32/i64 expressions (we could also do i16 on cpus where i16 lea is fast, but I didn't add this). On the example, we now generate: _test: movl 4(%esp), %eax cmpl $42, (%eax) setl %al movzbl %al, %eax leal 4(%eax,%eax,8), %eax ret instead of: _test: movl 4(%esp), %eax cmpl $41, (%eax) movl $4, %ecx movl $13, %eax cmovg %ecx, %eax ret llvm-svn: 66869
* optimize the case of cond ? 42 : 41 and friends. This compiles theChris Lattner2009-03-131-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | example to: _test: movl 4(%esp), %eax cmpl $41, (%eax) setg %al movzbl %al, %eax orl $4294967294, %eax ret instead of: movl 4(%esp), %eax cmpl $41, (%eax) movl $4294967294, %ecx movl $4294967295, %eax cmova %ecx, %eax ret which is smaller in code size and faster. rdar://6668608 llvm-svn: 66868
* Oops...I committed too much.Bill Wendling2009-03-1312-228/+203
| | | | llvm-svn: 66867
* Temporarily XFAIL this test.Bill Wendling2009-03-1312-203/+228
| | | | llvm-svn: 66866
* Enhance address-mode folding of ISD::ADD to handle cases where theDan Gohman2009-03-131-0/+13
| | | | | | | | | | operands can't both be fully folded at the same time. For example, in the included testcase, a global variable is being added with an add of two values. The global variable wants RIP-relative addressing, so it can't share the address with another base register, but it's still possible to fold the initial add. llvm-svn: 66865
* Fix one more place where debug info affectedDale Johannesen2009-03-131-2/+5
| | | | | | codegen (speculative execution). llvm-svn: 66859
* just initialize the first element, we don't need to set the rest to zeros.Chris Lattner2009-03-131-3/+3
| | | | llvm-svn: 66850
* Eliminate a 9640 byte static mutable initialized data item by moving itChris Lattner2009-03-131-2/+2
| | | | | | to the stack. This shrinks all llvm tools by 9k, and improves reentrancy. llvm-svn: 66847
* static functions don't need an anonymous namespace.Chris Lattner2009-03-121-373/+371
| | | | llvm-svn: 66845
* Fix a typo in a comment.Dan Gohman2009-03-121-1/+1
| | | | llvm-svn: 66843
* Previous debug info fix to this code wasn't quiteDale Johannesen2009-03-121-5/+4
| | | | | | | | right; did the wrong thing when there are exactly 11 non-debug instructions, followed by debug info. Remove a FIXME since it's apparently been fixed along the way. llvm-svn: 66840
* Revert commit 66140 since it caused several failuresDuncan Sands2009-03-121-6/+0
| | | | | | | | | | | in the Ada testcase. Reverting this only covers up the real problem, which is a nasty conceptual difficulty in the phi elimination pass: when eliminating phi nodes in landing pads, the register copies need to come before the invoke, not at the end of the basic block which is too late... See PR3784. llvm-svn: 66826
* There already was a class to force deterministicDale Johannesen2009-03-121-23/+14
| | | | | | sorting of ConstantInt's; unreinvent wheel. llvm-svn: 66824
* Rearrange operands of the BranchInst, to be able toGabor Greif2009-03-123-30/+105
| | | | | | | | | | | | | | | | | | | | | | | | | access each with a fixed negative index from op_end(). This has two important implications: - getUser() will work faster, because there are less iterations for the waymarking algorithm to perform. This is important when running various analyses that want to determine callers of basic blocks. - getSuccessor() now runs faster, because the indirection via OperandList is not necessary: Uses corresponding to the successors are at fixed offset to "this". The price we pay is the slightly more complicated logic in the operator User::delete, as it has to pick up the information whether it has to free the memory of an original unconditional BranchInst or a BranchInst that was originally conditional, but has been shortened to unconditional. I was not able to come up with a nicer solution to this problem. (And rest assured, I tried *a lot*). Similar reorderings will follow for InvokeInst and CallInst. After that some optimizations to pred_iterator and CallSite will fall out naturally. llvm-svn: 66815
* Re-apply 66024 with fixes: 1. Fixed indirect call to immediate address ↵Evan Cheng2009-03-124-6/+16
| | | | | | assembly. 2. Fixed JIT encoding by making the address pc-relative. llvm-svn: 66803
* Another missing check for debug intrinsics.Dale Johannesen2009-03-121-1/+1
| | | | llvm-svn: 66800
* Reorganize some #include's.Owen Anderson2009-03-122-5/+4
| | | | llvm-svn: 66780
* Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))"Chris Lattner2009-03-124-100/+189
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | related transformations out of target-specific dag combine into the ARM backend. These were added by Evan in r37685 with no testcases and only seems to help ARM (e.g. test/CodeGen/ARM/select_xform.ll). Add some simple X86-specific (for now) DAG combines that turn things like cond ? 8 : 0 -> (zext(cond) << 3). This happens frequently with the recently added cp constant select optimization, but is a very general xform. For example, we now compile the second example in const-select.ll to: _test: movsd LCPI2_0, %xmm0 ucomisd 8(%esp), %xmm0 seta %al movzbl %al, %eax movl 4(%esp), %ecx movsbl (%ecx,%eax,4), %eax ret instead of: _test: movl 4(%esp), %eax leal 4(%eax), %ecx movsd LCPI2_0, %xmm0 ucomisd 8(%esp), %xmm0 cmovbe %eax, %ecx movsbl (%ecx), %eax ret This passes multisource and dejagnu. llvm-svn: 66779
* improve comment.Chris Lattner2009-03-121-4/+4
| | | | llvm-svn: 66778
* Enable Chris' value propagation change. It make available known sign, zero, ↵Evan Cheng2009-03-121-3/+1
| | | | | | one bits information for values that are live out of basic blocks. The goal is to eliminate unnecessary sext, zext, truncate of values that are live-in to blocks. This does not handle PHI nodes yet. llvm-svn: 66777
* On x86, if the only use of a i64 load is a i64 store, generate a pair of ↵Evan Cheng2009-03-121-48/+67
| | | | | | double load and store instead. llvm-svn: 66776
* Forgot to check-in this as part of 7761.Sanjiv Gupta2009-03-121-3/+2
| | | | llvm-svn: 66763
* Banksel optimization is now based on the section names of symbols, since the ↵Sanjiv Gupta2009-03-121-44/+52
| | | | | | symbols in one section will always be put into one bank. llvm-svn: 66761
* Allow for switch values bigger than 64 bits.Dale Johannesen2009-03-121-1/+1
| | | | llvm-svn: 66751
* Fix some nondeterministic behavior when forwardingDale Johannesen2009-03-121-3/+13
| | | | | | | | | from a switch table. Multiple table entries that branch to the same place were being sorted by the pointer value of the ConstantInt*; changed to sort by the actual value of the ConstantInt. llvm-svn: 66749
* Revert r66024. The JIT encoding for CALLpcrel32 is wrong -- see PR3773, and theDan Gohman2009-03-113-9/+4
| | | | | | assembly text output uses an indirect call ("call *") instead of a direct call. llvm-svn: 66735
* updateGabor Greif2009-03-111-0/+1
| | | | llvm-svn: 66733
* optimize i8 and i16 tls values.Rafael Espindola2009-03-111-0/+18
| | | | llvm-svn: 66725
* Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. ↵Owen Anderson2009-03-116-1886/+1971
| | | | | | No (intended) functionality change. llvm-svn: 66720
* Add a -no-implicit-float flag. This acts like -soft-float, but may generateBill Wendling2009-03-112-76/+73
| | | | | | floating point instructions that are explicitly specified by the user. llvm-svn: 66719
* Skip interleaved debug info when fast-forwarding throughDale Johannesen2009-03-111-2/+2
| | | | | | | | allocations. Apparently the assumption is there is an instruction (terminator?) following the allocation so I am allowing the same assumption. llvm-svn: 66716
* My last coalescer fix introduced a subtler one. It's aborting a commuting ↵Evan Cheng2009-03-111-5/+11
| | | | | | optimization too late and left the live intervals to be out of sync with instructions. This fixes 8b10b. llvm-svn: 66715
* Debug intriniscs should be skipped when lookingDale Johannesen2009-03-111-1/+1
| | | | | | for a dependency, not terminate the search. llvm-svn: 66709
* Make Print callable from a pass's print method: add const qualifier. NoTorok Edwin2009-03-111-1/+1
| | | | | | functionality change. llvm-svn: 66700
* I should definitely read make docs someday :(Anton Korobeynikov2009-03-111-2/+3
| | | | llvm-svn: 66699
* Unbreak the build. Dunno, why it did not fail on mingw :(Anton Korobeynikov2009-03-111-1/+1
| | | | llvm-svn: 66692
* It makes no sense to have a ODR version of commonDuncan Sands2009-03-1117-40/+19
| | | | | | linkage, so remove it. llvm-svn: 66690
* Disable plugins / shared stuff generation on windows targets.Anton Korobeynikov2009-03-111-0/+5
| | | | | | | This fixes fallout from recent PIC/delibtoolize changes and unbreaks build on cygming. llvm-svn: 66686
* For yonah, fix a vector shuffle case for v16i8 where we didn't properly ↵Mon P Wang2009-03-111-2/+19
| | | | | | clear some bits. llvm-svn: 66684
* fix PR3785, a valgrind error on test/CodeGen/ARM/pr3502.llChris Lattner2009-03-111-1/+5
| | | | llvm-svn: 66660
* Add parentheses to pacify gcc-4.3.Duncan Sands2009-03-111-1/+1
| | | | llvm-svn: 66653
* Remove the one-definition-rule version of extern_weakDuncan Sands2009-03-118-27/+14
| | | | | | | linkage: this linkage type only applies to declarations, but ODR is only relevant to globals with definitions. llvm-svn: 66650
* Allow cross-process JIT to handle MachineRelocations of the ExternalSymbolNate Begeman2009-03-111-13/+82
| | | | | | | variety. For example, an i64 div might turn into a call to __divdi3 during legalization. llvm-svn: 66646
* Fixed a v8i16 shuffle case that should generate a pshufb instead of a ↵Mon P Wang2009-03-111-1/+4
| | | | | | pshuflw/hw. llvm-svn: 66645
* formatting change, reduce indentation. No functionality change.Chris Lattner2009-03-111-82/+80
| | | | llvm-svn: 66642
* reapply my previous patch (r66358) with a tweak to set theChris Lattner2009-03-111-2/+55
| | | | | | | | | alignment of the generated constant pool entry to the desired alignment of a type. If we don't do this, we end up trying to do movsd from 4-byte alignment memory. This fixes 450.soplex and 456.hmmer. llvm-svn: 66641
* Put the assignment back at the top of this method.Bill Wendling2009-03-111-2/+2
| | | | llvm-svn: 66611
* Two coalescer fixes in one.Evan Cheng2009-03-112-8/+61
| | | | | | | 1. Use the same value# to represent unknown values being merged into sub-registers. 2. When coalescer commute an instruction and the destination is a physical register, update its sub-registers by merging in the extended ranges. llvm-svn: 66610
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