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* Add support to the ARM asm parser for the register-shifted-register forms of ↵Owen Anderson2011-03-182-26/+94
| | | | | | basic instructions like ADD. More work left to be done to support other instances of shifter ops in the ISA. llvm-svn: 127917
* Beginnings of MC-JIT code generation.Jim Grosbach2011-03-183-6/+73
| | | | | | | | | | | Proof-of-concept code that code-gens a module to an in-memory MachO object. This will be hooked up to a run-time dynamic linker library (see: llvm-rtdyld for similarly conceptual work for that part) which will take the compiled object and link it together with the rest of the system, providing back to the JIT a table of available symbols which will be used to respond to the getPointerTo*() queries. llvm-svn: 127916
* Match a few more obvious patterns to revsh. rdar://9147637.Evan Cheng2011-03-182-2/+16
| | | | llvm-svn: 127913
* Extend live debug values down the dominator tree by following copies.Jakob Stoklund Olesen2011-03-181-24/+136
| | | | | | | | | | | | | | | | | The llvm.dbg.value intrinsic refers to SSA values, not virtual registers, so we should be able to extend the range of a value by tracking that value through register copies. This greatly improves the debug value tracking for function arguments that for some reason are copied to a second virtual register at the end of the entry block. We only extend the debug value range where its register is killed. All original llvm.dbg.value locations are still respected. Copies from physical registers are ignored. That should not be a problem since the entry block already adds DBG_VALUE instructions for the virtual registers holding the function arguments. llvm-svn: 127912
* Revert r127852; it's apparently causing an ICE on mingw.Eli Friedman2011-03-181-73/+4
| | | | llvm-svn: 127909
* Clean whitespace.Owen Anderson2011-03-181-8/+8
| | | | llvm-svn: 127900
* Reduce code duplication.Owen Anderson2011-03-181-31/+13
| | | | llvm-svn: 127899
* PTX: Fix various codegen issuesJustin Holewinski2011-03-184-4/+33
| | | | | | | | - Emit mad instead of mad.rn for shader model 1.0 - Emit explicit mov.u32 instructions for reading global variables - (most PTX instructions cannot take global variable immediates) llvm-svn: 127895
* setExecutable() should default to success if there's nothing custom for it.Jim Grosbach2011-03-181-1/+1
| | | | llvm-svn: 127891
* Thumb2 PC-relative loads require a fixup rather than just an immediate.Owen Anderson2011-03-181-1/+7
| | | | llvm-svn: 127888
* Avoid creating canonical induction variables for non-native types.Andrew Trick2011-03-181-1/+6
| | | | | | | | For example, on 32-bit architecture, don't promote all uses of the IV to 64-bits just because one use is a 64-bit cast. Alternate implementation of the patch by Arnaud de Grandmaison. llvm-svn: 127884
* Support explicit argument forms for the X86 string instructions.Joerg Sonnenberger2011-03-181-1/+126
| | | | | | For now, only the default segments are supported. llvm-svn: 127875
* ptx: fix parameter order that is reversedChe-Liang Chiou2011-03-181-5/+4
| | | | llvm-svn: 127874
* ptx: add unconditional and conditional branchChe-Liang Chiou2011-03-185-26/+57
| | | | llvm-svn: 127873
* raw_ostream: [PR6745] Tweak formatting (double)%e for Windows hosts.NAKAMURA Takumi2011-03-181-0/+30
| | | | | | | On MSVCRT and compatible, output of %e is incompatible to Posix by default. Number of exponent digits should be at least 2. "%+03d" FIXME: Implement our formatter in future! llvm-svn: 127872
* Initialize the only-used-with-PPC-double-double parts of the APFloat class. ThisBill Wendling2011-03-181-13/+10
| | | | | | | makes valgrind stop complaining about uninitialized variables being read when it accesses a bitfield (category) that shares its bits with these variables. llvm-svn: 127871
* Hoist spills when the same value is known to be in less loopy sibling registers.Jakob Stoklund Olesen2011-03-181-22/+148
| | | | | | | | | | | | | | Stack slot real estate is virtually free compared to registers, so it is advantageous to spill earlier even though the same value is now kept in both a register and a stack slot. Also eliminate redundant spills by extending the stack slot live range underneath reloaded registers. This can trigger a dead code elimination, removing copies and even reloads that were only feeding spills. llvm-svn: 127868
* Accept instructions that read undefined values.Jakob Stoklund Olesen2011-03-181-1/+9
| | | | | | | This is not supposed to happen, but I have seen the x86 rematter getting confused when rematerializing partial redefs. llvm-svn: 127857
* Be more accurate about the slot index reading a register when dealing with defsJakob Stoklund Olesen2011-03-181-4/+20
| | | | | | | | and early clobbers. Assert when trying to find an undefined value. llvm-svn: 127856
* Check RequiresNullTerminator first, or we might read from an invalid address.Rafael Espindola2011-03-181-1/+1
| | | | llvm-svn: 127853
* Add a target-specific branchless method for double-width relationalEli Friedman2011-03-181-4/+73
| | | | | | | | | | | comparisons on x86. Essentially, the way this works is that SUB+SBB sets the relevant flags the same way a double-width CMP would. This is a substantial improvement over the generic lowering in LLVM. The output is also shorter than the gcc-generated output; I haven't done any detailed benchmarking, though. llvm-svn: 127852
* Augment CrashRecoveryContext to have registered "cleanup" objects that can ↵Ted Kremenek2011-03-181-0/+38
| | | | | | be used to release resources during a crash. llvm-svn: 127849
* The disassembler for Thumb was wrongly adding 4 to the computed imm32 offset.Johnny Chen2011-03-181-10/+2
| | | | | | Remove the offending logic and update the test cases. llvm-svn: 127843
* Remove TargetData and ValueTracking includes. I didn't mean for them to ↵Andrew Trick2011-03-181-4/+0
| | | | | | sneak in my last checkin. llvm-svn: 127842
* There are two pseudos in this case that are Thumb mode, not one.Owen Anderson2011-03-171-1/+1
| | | | llvm-svn: 127840
* Added isValidRewrite() to check the result of ScalarEvolutionExpander.Andrew Trick2011-03-172-37/+112
| | | | | | | | | SCEV may generate expressions composed of multiple pointers, which can lead to invalid GEP expansion. Until we can teach SCEV to follow strict pointer rules, make sure no bad GEPs creep into IR. Fixes rdar://problem/9038671. llvm-svn: 127839
* whitespaceAndrew Trick2011-03-171-18/+18
| | | | llvm-svn: 127837
* Use RequiresNullTerminator to create buffers without a null terminatorRafael Espindola2011-03-171-2/+4
| | | | | | instead of copying. llvm-svn: 127835
* Try to not lose variable's debug info during instcombine.Devang Patel2011-03-172-0/+30
| | | | | | | This is done by lowering dbg.declare intrinsic into dbg.value intrinsic. Radar 9143931. llvm-svn: 127834
* It used to be that t_addrmode_s4 was used for both:Johnny Chen2011-03-171-16/+13
| | | | | | | | | | | o A8.6.195 STR (register) -- Encoding T1 o A8.6.193 STR (immediate, Thumb) -- Encoding T1 It has been changed so that now they use different addressing modes and thus different MC representation (Operand Infos). Modify the disassembler to reflect the change, and add relevant tests. llvm-svn: 127833
* Refactor into a separate utility function.Devang Patel2011-03-172-29/+42
| | | | llvm-svn: 127832
* BuildUDIV: If the divisor is even we can simplify the fixup of the ↵Benjamin Kramer2011-03-171-9/+22
| | | | | | | | | | | | | | | | | | | | | | | multiplied value by introducing an early shift. This allows us to compile "unsigned foo(unsigned x) { return x/28; }" into shrl $2, %edi imulq $613566757, %rdi, %rax shrq $32, %rax ret instead of movl %edi, %eax imulq $613566757, %rax, %rcx shrq $32, %rcx subl %ecx, %eax shrl %eax addl %ecx, %eax shrl $4, %eax on x86_64 llvm-svn: 127829
* Add an argument to APInt's magic udiv calculation to specify the number of ↵Benjamin Kramer2011-03-171-2/+4
| | | | | | | | bits that are known zero in the divided number. This will come in handy soon. llvm-svn: 127828
* Dead code elimination may separate the live interval into multiple connected ↵Jakob Stoklund Olesen2011-03-175-22/+44
| | | | | | | | | components. I have convinced myself that it can only happen when a phi value dies. When it happens, allocate new virtual registers for the components. llvm-svn: 127827
* Add XCore intrinsic for setpsc.Richard Osborne2011-03-171-1/+5
| | | | llvm-svn: 127821
* MC/Mach-O: Fix regression introduced in r126127, this assignment shouldn't haveDaniel Dunbar2011-03-171-1/+2
| | | | | | been removed. llvm-svn: 127812
* Move more logic into getTypeForExtArgOrReturn.Cameron Zwarich2011-03-173-12/+14
| | | | llvm-svn: 127809
* Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn().Cameron Zwarich2011-03-173-4/+4
| | | | llvm-svn: 127807
* Add comments for the demanglings. Correct mangled form of operator delete!Nick Lewycky2011-03-171-4/+6
| | | | llvm-svn: 127801
* Add "swi" which is an obsolete mnemonic for "svc".Nick Lewycky2011-03-171-0/+1
| | | | llvm-svn: 127788
* A couple new README entries.Eli Friedman2011-03-171-0/+36
| | | | llvm-svn: 127786
* Fix handling of @IDNTPOFF relocations, they need to get STT_TLS.Joerg Sonnenberger2011-03-171-2/+5
| | | | | | While here, add VK_ARM_TPOFF and VK_ARM_GOTTPOFF, too. llvm-svn: 127780
* Rewrite instructions as part of ConnectedVNInfoEqClasses::Distribute.Jakob Stoklund Olesen2011-03-173-47/+34
| | | | llvm-svn: 127779
* Add a LiveRangeEdit delegate callback before shrinking a live range.Jakob Stoklund Olesen2011-03-163-1/+19
| | | | | | The register allocator needs to adjust its live interval unions when that happens. llvm-svn: 127774
* Erase virtual registers that are unused after DCE.Jakob Stoklund Olesen2011-03-161-4/+12
| | | | llvm-svn: 127773
* Tag cached interference with a user-provided tag instead of the virtual ↵Jakob Stoklund Olesen2011-03-163-7/+16
| | | | | | | | | register number. The live range of a virtual register may change which invalidates the cached interference information. llvm-svn: 127772
* Clarify debugging output.Jakob Stoklund Olesen2011-03-163-7/+17
| | | | llvm-svn: 127771
* The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byteCameron Zwarich2011-03-163-5/+14
| | | | | | | | | | | rather than an int. Thankfully, this only causes LLVM to miss optimizations, not generate incorrect code. This just fixes the zext at the return. We still insert an i32 ZextAssert when reading a function's arguments, but it is followed by a truncate and another i8 ZextAssert so it is not optimized. llvm-svn: 127766
* Don't recompute something that we already have in a local variable.Cameron Zwarich2011-03-161-2/+2
| | | | llvm-svn: 127764
* Revert r127757, "Patch to a fix dwarf relocation problem on ARM. One-line fixDaniel Dunbar2011-03-161-5/+2
| | | | | | | plus the test where it used to break.", which broke Clang self-host of a Debug+Asserts compiler, on OS X. llvm-svn: 127763
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