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* Fix -fast-isel-abort to check the right instruction.Dan Gohman2010-07-071-1/+1
| | | | llvm-svn: 107839
* use PrintEscapedString to handle attribute section with escapes in it,Chris Lattner2010-07-071-6/+11
| | | | | | | PR7399. The asm parser already handles this. This is of dubious utility (see the PR) but the asmprinter was clearly broken here. llvm-svn: 107834
* fix copies to/from GR8_ABCD_H even moreJakob Stoklund Olesen2010-07-071-1/+3
| | | | llvm-svn: 107832
* grammarJim Grosbach2010-07-071-1/+1
| | | | llvm-svn: 107831
* Handle cases where the post-RA scheduler may move instructions between theJim Grosbach2010-07-071-6/+21
| | | | | | | | | address calculation instructions leading up to a jump table when we're trying to convert them into a TB[H] instruction in Thumb2. This realistically shouldn't happen much, if at all, for well formed inputs, but it's more correct to handle it. rdar://7387682 llvm-svn: 107830
* finish up support for callw: PR7195Chris Lattner2010-07-072-1/+3
| | | | llvm-svn: 107826
* Implement the major chunk of PR7195: support for 'callw'Chris Lattner2010-07-076-11/+36
| | | | | | | in the integrated assembler. Still some discussion to be done. llvm-svn: 107825
* Add more assembly opcodes for SSE compare instructionsBruno Cardoso Lopes2010-07-071-8/+32
| | | | llvm-svn: 107823
* One MDNode may be used to create regular DIE as well as abstract DIE.Devang Patel2010-07-072-1/+17
| | | | | | Keep track of abstract subprogram DIEs. llvm-svn: 107822
* Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument ↵Evan Cheng2010-07-0712-79/+81
| | | | | | for consistency sake. llvm-svn: 107820
* Print undefined/unknown debug value as "undef".Devang Patel2010-07-071-1/+6
| | | | llvm-svn: 107818
* Not all custom inserters create new basic blocks. If the inserterDan Gohman2010-07-071-2/+5
| | | | | | didn't create a new block, don't reset the insert position. llvm-svn: 107813
* grammar and trailing whitespaceJim Grosbach2010-07-071-6/+6
| | | | llvm-svn: 107811
* Rename couple of maps.Devang Patel2010-07-071-11/+9
| | | | llvm-svn: 107810
* Allow copies between GR8_ABCD_L and GR8_ABCD_H.Jakob Stoklund Olesen2010-07-071-0/+3
| | | | | | This fixes PR7540. llvm-svn: 107809
* 80 cols.Devang Patel2010-07-071-12/+21
| | | | llvm-svn: 107807
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-076-99/+142
| | | | | | a separate DCE pass over MachineInstrs. llvm-svn: 107804
* Add X86FastISel support for return statements. This entails refactoringDan Gohman2010-07-078-91/+152
| | | | | | | a bunch of stuff, to allow the target-independent calling convention logic to be employed. llvm-svn: 107800
* Add AVX AES instructionsBruno Cardoso Lopes2010-07-071-26/+70
| | | | llvm-svn: 107798
* Update the insert position after scheduling, which may change theDan Gohman2010-07-071-0/+1
| | | | | | | position when emitting multiple blocks when executing a custom inserter. llvm-svn: 107797
* Update comment.Devang Patel2010-07-071-3/+4
| | | | llvm-svn: 107796
* Fix debugging strings.Dan Gohman2010-07-071-2/+2
| | | | llvm-svn: 107795
* Give FunctionLoweringInfo an MBB member, avoiding the need to pass itDan Gohman2010-07-073-166/+224
| | | | | | | | around everywhere, and also give it an InsertPt member, to enable isel to operate at an arbitrary position within a block, rather than just appending to a block. llvm-svn: 107791
* Simplify FastISel's constructor by giving it a FunctionLoweringInfoDan Gohman2010-07-075-118/+46
| | | | | | | | | instance, rather than pointers to all of FunctionLoweringInfo's members. This eliminates an NDEBUG ABI sensitivity. llvm-svn: 107789
* Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This willDan Gohman2010-07-075-148/+4
| | | | | | allow target-specific fast-isel code to make use of it directly. llvm-svn: 107787
* Split the SDValue out of OutputArg so that SelectionDAG-independentDan Gohman2010-07-0728-94/+137
| | | | | | code can do calling-convention queries. This obviates OutputArgReg. llvm-svn: 107786
* add some triple for minix, patch by Kees van Reeuwijk from PR7582Chris Lattner2010-07-073-3/+6
| | | | llvm-svn: 107785
* Move CallingConvLower.cpp out of the SelectionDAG directory.Dan Gohman2010-07-073-1/+1
| | | | llvm-svn: 107781
* Fix more places assuming subregisters have live intervalsJakob Stoklund Olesen2010-07-071-1/+6
| | | | llvm-svn: 107780
* Add a getFirstNonPHI utility function.Dan Gohman2010-07-071-0/+7
| | | | llvm-svn: 107778
* Minore code simplification.Dan Gohman2010-07-071-17/+15
| | | | llvm-svn: 107777
* Remove interprocedural-basic-aa and associated code. The AliasAnalysisDan Gohman2010-07-073-183/+58
| | | | | | | | | | | interface needs implementations to be consistent, so any code which wants to support different semantics must use a different interface. It's not currently worthwhile to add a new interface for this new concept. Document that AliasAnalysis doesn't support cross-function queries. llvm-svn: 107776
* conditionalize by CallInst::ArgOffsetGabor Greif2010-07-071-2/+2
| | | | llvm-svn: 107767
* Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts"Duncan Sands2010-07-071-1/+1
| | | | | | | | | | | | | builds to "Release". The default build is unchanged (optimization on, assertions on), however it is now called Release+Asserts. The intent is that future LLVM releases released via llvm.org will be Release builds in the new sense, i.e. will have assertions disabled (currently they have assertions enabled, for a more than 20% slowdown). This will bring them in line with MacOS releases, which ship with assertions disabled. It also means that "Release" now means the same things in make and cmake builds: cmake already disables assertions for "Release" builds AFAICS. llvm-svn: 107758
* Add AVX SSE4.2 instructionsBruno Cardoso Lopes2010-07-071-114/+179
| | | | llvm-svn: 107752
* Use only one multiclass to pinsrq instructionsBruno Cardoso Lopes2010-07-072-38/+20
| | | | llvm-svn: 107750
* Now that almost all SSE4.1 AVX instructions are added, move code around to ↵Bruno Cardoso Lopes2010-07-072-361/+374
| | | | | | more appropriate sections. No functionality changes llvm-svn: 107749
* Add AVX SSE4.1 insertps, ptest and movntdqa instructionsBruno Cardoso Lopes2010-07-071-18/+39
| | | | llvm-svn: 107747
* Add AVX SSE4.1 extractps and pinsr instructionsBruno Cardoso Lopes2010-07-071-35/+67
| | | | llvm-svn: 107746
* Revert "Remove references to INSERT_SUBREG after de-SSA" r107725.Jakob Stoklund Olesen2010-07-077-9/+136
| | | | | | Buildbot breakage. llvm-svn: 107744
* Also use REG_SEQUENCE for VTBX instructions.Bob Wilson2010-07-072-24/+30
| | | | llvm-svn: 107743
* Mark eh.sjlj.set/longjmp custom lowerings as Darwin-only since that's whereJim Grosbach2010-07-071-2/+4
| | | | | | they've been tested to work. llvm-svn: 107742
* Add AVX SSE4.1 Extract Integer instructionsBruno Cardoso Lopes2010-07-071-0/+11
| | | | llvm-svn: 107740
* By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing ratherJim Grosbach2010-07-062-2/+9
| | | | | | | than assuming a target will custom lower them. Targets which do so should exlicitly mark them as having custom lowerings. PR7454. llvm-svn: 107734
* Remove references to INSERT_SUBREG after de-SSAJakob Stoklund Olesen2010-07-067-136/+9
| | | | llvm-svn: 107732
* Use REG_SEQUENCE nodes to make the table registers for VTBL instructions beBob Wilson2010-07-062-10/+61
| | | | | | allocated to consecutive registers. llvm-svn: 107730
* Accept RIP-relative symbols with 'i' constraint, andDale Johannesen2010-07-062-2/+3
| | | | | | | print the (%rip) only if the 'a' modifier is present. PR 7528. llvm-svn: 107727
* Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass.Jakob Stoklund Olesen2010-07-063-2/+35
| | | | | | | | | INSERT_SUBREG will now only appear in SSA machine instructions. Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant since partial redef COPY instructions appear. llvm-svn: 107726
* Track defs for all aliases in NEONMoveFix.Jakob Stoklund Olesen2010-07-061-2/+2
| | | | | | | This means that an instruction defining an S register will affect the domain of the parent D register. llvm-svn: 107725
* Add the rest of AVX SSE4.1 packed move with sign/zero extend instructionsBruno Cardoso Lopes2010-07-061-0/+17
| | | | llvm-svn: 107723
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