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* [GlobalISel] Get rid of the ifdefs in TargetLowering.Quentin Colombet2016-02-168-91/+163
| | | | | | | Introduce a new API used only by GlobalISel: CallLowering. This API will contain target hooks dedicated to call lowering. llvm-svn: 260922
* Deprecate LLVMGetDataLayout and replace it by LLVMGetDataLayoutStrAmaury Sechet2016-02-161-1/+5
| | | | | | | | | | | | Summary: The name is confusing as it matche another method on the module. Reviewers: joker.eph, Wallbraker, echristo Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D17283 llvm-svn: 260920
* Kill LLVMAddTargetDataAmaury Sechet2016-02-161-3/+0
| | | | | | | | | | | | Summary: It's red, it's dead. Reviewers: joker.eph, Wallbraker, echristo Subscribers: llvm-commits, axw Differential Revision: http://reviews.llvm.org/D17282 llvm-svn: 260919
* Implemented stack symbol table ordering/packing optimization to improve data ↵Zia Ansari2016-02-153-3/+163
| | | | | | | | locality and code size from SP/FP offset encoding. Differential Revision: http://reviews.llvm.org/D15393 llvm-svn: 260917
* Rename LLVMSetDataLayout's argument to match what they stand forAmaury Sechet2016-02-151-2/+2
| | | | llvm-svn: 260916
* SmallPtrSet: Avoid initializing Array in the small case.Matthias Braun2016-02-151-53/+50
| | | | | | | | | | | This patch avoids the initial memset at the cost of making iterators slightly more complex. This should be beneficial as most SmallPtrSets hold no or only a few elements, while iterating over them is less common. Differential Revision: http://reviews.llvm.org/D16672 llvm-svn: 260913
* APInt: Slightly simplify countLeadingZerosSlowCase()Matthias Braun2016-02-151-19/+8
| | | | | | | | | We always clear the unused bits in the most signifant word so there is no need to mask them out in countLeadingZerosSlowCase(). Differential Revision: http://reviews.llvm.org/D16621 llvm-svn: 260911
* APInt: Further simplify APInt::EqualSlowCase as suggested by DuncanMatthias Braun2016-02-151-4/+1
| | | | llvm-svn: 260910
* [X86] Remove now-dead variable and redundant assert. NFC.Ahmed Bougacha2016-02-151-2/+0
| | | | | | | The variable was made dead in NDEBUG by r260901, but the assert was redundant anyway: get rid of both. llvm-svn: 260908
* LiveIntervalAnalysis: Support moving of subregister defs in handleMoveMatthias Braun2016-02-151-34/+153
| | | | | | | | | | | | | | | | | | | This is an updated version which fixes a bug that happened with uses tied to an earlyclobber operand which end at an unusual slotindex. If two definitions write to independent subregisters then they can be put in any order. LiveIntervalAnalysis::handleMove() did not support this previously because it looks like moving a definition of a vreg past another one. This is a modified version of a patch proposed (two years ago) by Vincent Lejeune! This version does not touch the read-undef flags and is extended for the case of moving a subregister def behind all uses - this can happen for subregister defs that are completely unused. Differential Revision: http://reviews.llvm.org/D9067 llvm-svn: 260906
* MachineVerifier: Add parameter to choose if MachineFunction::verify() abortsMatthias Braun2016-02-151-10/+13
| | | | | | | The abort on error behaviour is unpractical for debugger and unittest usage. llvm-svn: 260904
* [NFC] Fixing naming convention, lowercase start of function name.Colin LeMahieu2016-02-156-33/+33
| | | | llvm-svn: 260903
* [Hexagon] Wrapping all MCExprs inside MCOperands within HexagonMCExpr to ↵Colin LeMahieu2016-02-158-92/+169
| | | | | | simplify handling and allow flags on the expression. llvm-svn: 260902
* [CodeGen] Document and use getConstant's splat-building feature. NFC.Ahmed Bougacha2016-02-155-96/+36
| | | | | | Differential Revision: http://reviews.llvm.org/D17229 llvm-svn: 260901
* [ScheduleDAGInstrs] isUnsafeMemoryObject() removedJonas Paulsson2016-02-151-36/+5
| | | | | | | | | | | This function was basically useless, since volatile memacesses or MIs with unmodelled sideffects become global memory objects, and the other little checks are also done elsewhere. Reviewed by Andy Trick http://reviews.llvm.org/D16881 llvm-svn: 260899
* [mips] Implemented the .hword directive.Scott Egerton2016-02-152-0/+6
| | | | | | | | | | | | | | Summary: In order to pass the tests, this required marking R_MIPS_16 relocations as needing to point to the symbol and not the section. Reviewers: vkalintiris, dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D17200 llvm-svn: 260896
* [Hexagon] Use zero-extending loads for anyextKrzysztof Parzyszek2016-02-151-6/+6
| | | | llvm-svn: 260895
* [LV] Add support for insertelt/extractelt processing during type truncationSilviu Baranga2016-02-151-0/+14
| | | | | | | | | | | | | | | | | | Summary: While shrinking types according to the required bits, we can encounter insert/extract element instructions. This will cause us to reach an llvm_unreachable statement. This change adds support for truncating insert/extract element operations, and adds a regression test. Reviewers: jmolloy Subscribers: mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D17078 llvm-svn: 260893
* Tweak the LICM code to reuse the first sub-loop instead of creating a new oneRoman Gareev2016-02-151-14/+32
| | | | | | | | | | | | | LICM starts with an *empty* AST, and then merges in each sub-loop. While the add code is appropriate for sub-loop 2 and up, it's utterly unnecessary for sub-loop 1. If the AST starts off empty, we can just clone/move the contents of the subloop into the containing AST. Reviewed-by: Philip Reames <listmail@philipreames.com> Differential Revision: http://reviews.llvm.org/D16753 llvm-svn: 260892
* Reverted r260879 as it caused test failures in lld.Scott Egerton2016-02-151-1/+1
| | | | llvm-svn: 260880
* [mips] Removed the SHF_ALLOC flag from the .pdr section.Scott Egerton2016-02-151-1/+1
| | | | | | | | | | | | | | | | | Summary: This section is used for debug information and has no need to be in memory at runtime. With this patch, LLVM now emits the same flags as the GNU assembler. This patch also fixes an error when compiling the Linux kernel, The error is that there are relocations within the .pdr section in a VDSO. Reviewers: vkalintiris, dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D17199 llvm-svn: 260879
* AVX512: Change store size of kmask. Store size of v8i1, v4i1 , v2i1 and i1 ↵Igor Breger2016-02-153-20/+40
| | | | | | | | | | are changed to 16 bits. If KMOVB not supported (require AVX512DQ) only KMOVW can be used so store size should be 2 bytes. Differential Revision: http://reviews.llvm.org/D17138 llvm-svn: 260878
* [PM/AA] Wire BasicAA's new pass manager class up to the pass registry.Chandler Carruth2016-02-132-0/+2
| | | | | | | | This ensures that all of the various pieces are working. The next patch will wire up commandline-driven alias analysis chain building and allow BasicAA to work with the AAManager. llvm-svn: 260838
* [PM/AA] Actually wire the AAManager I built for the new pass managerChandler Carruth2016-02-133-0/+5
| | | | | | | | | | | | into the new pass manager and fix the latent bugs there. This lets everything live together nicely, but it isn't really useful yet. I never finished wiring the AA layer up for the new pass manager, and so subsequent patches will change this to do that wiring and get AA stuff more fully integrated into the new pass manager. Turns out this is necessary even to get functionattrs ported over. =] llvm-svn: 260836
* Support: Fix incremental build when re-configuring targetsDuncan P. N. Exon Smith2016-02-132-1/+2
| | | | | | | | | | | | | | r180893 added an indirect include of llvm/Config/Targets.def to llvm/Support/CodeGen.h, which in turn is included by things like llvm/IR/Module.h. After a full build of LLVM and Clang, ninja had to rebuild 1274 files after reconfiguring. This commit strips CodeGen.h back down to just a pile of enums and moves the expensive includes over to CodeGenCWrappers.h (which is only included in two places). This gets ninja down to 88 files if you reconfigure with, e.g., -DLLVM_TARGETS_TO_BUILD=X86. llvm-svn: 260835
* [X86][AVX] Lower shuffles as repeated lane shuffles then lane-crossing shufflesSimon Pilgrim2016-02-131-0/+166
| | | | | | | | | | | | | | | | | | This patch attempts to represent a shuffle as a repeating shuffle (recognisable by is128BitLaneRepeatedShuffleMask) with the source input(s) in their original lanes, followed by a single permutation of the 128-bit lanes to their final destinations. On AVX2 we can additionally attempt to match using 64-bit sub-lane permutation. AVX2 can also now match a similar 'broadcasted' repeating shuffle. This patch has several benefits: * Avoids prematurely matching with lowerVectorShuffleByMerging128BitLanes which can require both inputs to have their input lanes permuted before shuffling. * Can replace PERMPS/PERMD instructions - although these are useful for cross-lane unary shuffling, they require their shuffle mask to be pre-loaded (and increase register pressure). * Matching the repeating shuffle makes use of a lot of existing shuffle lowering. There is an outstanding minor AVX1 regression (combine_unneeded_subvector1 in vector-shuffle-combining.ll) of a previously 128-bit shuffle + subvector splat being converted to a subvector splat + (2 instruction) 256-bit shuffle, I intend to fix this in a followup patch for review. Differential Revision: http://reviews.llvm.org/D16537 llvm-svn: 260834
* Remove Proc feature flags for X86 processors that are used to inherit ↵Craig Topper2016-02-132-38/+34
| | | | | | features from one processor to another. This exposed extra features to the -mattr command line that we shouldn't. Replace with just inherited listconcats. llvm-svn: 260832
* [libFuzzer] remove std::vector operations from hot paths, NFCKostya Serebryany2016-02-135-31/+38
| | | | llvm-svn: 260829
* [x86-64] allow mfence even with -mno-sse (PR23203)Sanjay Patel2016-02-134-10/+11
| | | | | | | | | | | | | As shown in: https://llvm.org/bugs/show_bug.cgi?id=23203 ...we currently die because lowering believes that mfence is allowed without SSE2 on x86-64, but the instruction def doesn't know that. I don't know if allowing mfence without SSE is right, but if not, at least now it's consistently wrong. :) Differential Revision: http://reviews.llvm.org/D17219 llvm-svn: 260828
* [ConstantFolding] Reduce APInt and APFloat copying.Benjamin Kramer2016-02-132-8/+8
| | | | llvm-svn: 260826
* [AggressiveAntiDepBreaker] Skip some unnecessary BitVector copies.Benjamin Kramer2016-02-131-9/+11
| | | | llvm-svn: 260825
* Use ArrayRef to hide SmallVector details, kill a useless vector copy along ↵Benjamin Kramer2016-02-131-3/+2
| | | | | | the way. llvm-svn: 260824
* [Hexagon] Replace use of "std::map::emplace" with "insert"Krzysztof Parzyszek2016-02-131-1/+4
| | | | | | | Gcc 4.7.2-4 does not seem to have "emplace" in its implementation of map. This should fix the build failure on polly-amd64-linux. llvm-svn: 260816
* [attrs] Move the norecurse deduction to operate on the node set ratherChandler Carruth2016-02-131-15/+16
| | | | | | | | | | | | | | | | | | than the SCC object, and have it scan the instruction stream directly rather than relying on call records. This makes the behavior of this routine consistent between libc routines and LLVM intrinsics for libc routines. We can go and start teaching it about those being norecurse, but we should behave the same for the intrinsic and the libc routine rather than differently. I chatted with James Molloy and the inconsistency doesn't seem intentional and likely is due to intrinsic calls not being modelled in the call graph analyses. This also fixes a bug where we would deduce norecurse on optnone functions, when generally we try to handle optnone functions as-if they were replaceable and thus unanalyzable. llvm-svn: 260813
* HexagonFrameLowering.cpp: Appease msc18 to give an explicit constructor ↵NAKAMURA Takumi2016-02-131-2/+4
| | | | | | SlotInfo() instead of member initializers. llvm-svn: 260812
* [libFuzzer] don't require seed in fuzzer::Mutate, instead use the global ↵Kostya Serebryany2016-02-135-12/+21
| | | | | | Fuzzer object for fuzzer::Mutate. This makes custom mutators fast llvm-svn: 260810
* LiveIntervalAnalysis: Remove LiveVariables requirementMatthias Braun2016-02-133-7/+3
| | | | | | | | | This requirement was a huge hack to keep LiveVariables alive because it was optionally used by TwoAddressInstructionPass and PHIElimination. However we have AnalysisUsage::addUsedIfAvailable() which we can use in those passes. llvm-svn: 260806
* AMDGPU: Prepare for reducing private element size.Matt Arsenault2016-02-131-14/+48
| | | | | | | | | | | | Tests for the new scalarize all private access options will be included with a future commit. The only functional change is to make the split/scalarize behavior for private access of > 4 element vectors to be consistent with the flat/global handling. This makes the spilling worse in the two changed tests. llvm-svn: 260804
* [libFuzzer] remove the C++-ish variant of FuzzerDriver from the interfaceKostya Serebryany2016-02-132-12/+7
| | | | llvm-svn: 260801
* [libFuzzer] simplify CTOR of MutationDispatcherKostya Serebryany2016-02-132-21/+21
| | | | llvm-svn: 260800
* [libFuzzer] get rid of MutationDispatcher::Impl (simplify the code; NFC)Kostya Serebryany2016-02-132-136/+114
| | | | llvm-svn: 260799
* [libFuzzer] get rid of UserSuppliedFuzzer; NFCKostya Serebryany2016-02-139-97/+41
| | | | llvm-svn: 260798
* [libFuzzer] simplify the code around Random. NFCKostya Serebryany2016-02-135-87/+39
| | | | llvm-svn: 260797
* [libFuzzer] remove UserSuppliedFuzzer from the interface (it was a bad idea).Kostya Serebryany2016-02-136-160/+68
| | | | llvm-svn: 260796
* [libFuzzer] provide a plain C interface for custom mutators (experimental)Kostya Serebryany2016-02-136-2/+65
| | | | llvm-svn: 260794
* AMDGPU/SI: Add llvm.amdgcn.mov.dpp intrinsicTom Stellard2016-02-131-0/+11
| | | | | | | This intrinsic will be used to expose dpp functionality to higher-level languages. It will map to the dpp version of v_mov_b32. llvm-svn: 260792
* [Cloning] Clone every Function's Debug InfoKeno Fischer2016-02-132-2/+3
| | | | | | | | | | | | | | | | | | | | | | | Summary: Export the CloneDebugInfoMetadata utility, which clones all debug info associated with a function into the first module. Also use this function in CloneModule on each function we clone (the CloneFunction entrypoint already does this). Without this, cloning a module will lead to DI quality regressions, especially since r252219 reversed the Function <-> DISubprogram edge (before we could get lucky and have this edge preserved if the DISubprogram itself was, e.g. due to location metadata). This was verified to fix missing debug information in julia and a unittest to verify the new behavior is included. Patch by Yichao Yu! Thanks! Reviewers: loladiro, pcc Differential Revision: http://reviews.llvm.org/D17165 llvm-svn: 260791
* Add AMDGPU related triple vendors/OSesMatt Arsenault2016-02-131-0/+6
| | | | | | | | As support expands to more runtimes, we'll need to distinguish between more than just HSA and unknown. This also lets us stop using unknown everywhere. llvm-svn: 260790
* AMDGPU: Cleanup includes and random macrosMatt Arsenault2016-02-131-11/+4
| | | | llvm-svn: 260784
* AMDGPU: Add intrinsics for sin/cosMatt Arsenault2016-02-132-1/+18
| | | | | | | These provide direct access to the hardware instruction without the unit version required like llvm.sin/llvm.cos lowering requires. llvm-svn: 260782
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