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* [x86] Support i386-*-*-code16 triple for emitting 16-bit codeDavid Woodhouse2014-01-203-3/+10
| | | | llvm-svn: 199648
* [PM] Wire up the Verifier for the new pass manager and connect it to theChandler Carruth2014-01-202-10/+23
| | | | | | | | | | | | | | | | | | | | | | various opt verifier commandline options. Mostly mechanical wiring of the verifier to the new pass manager. Exercises one of the more unusual aspects of it -- a pass can be either a module or function pass interchangably. If this is ever problematic, we can make things more constrained, but for things like the verifier where there is an "obvious" applicability at both levels, it seems convenient. This is the next-to-last piece of basic functionality left to make the opt commandline driving of the new pass manager minimally functional for testing and further development. There is still a lot to be done there (notably the factoring into .def files to kill the current boilerplate code) but it is relatively uninteresting. The only interesting bit left for minimal functionality is supporting the registration of analyses. I'm planning on doing that on top of the .def file switch mostly because the boilerplate for the analyses would be significantly worse. llvm-svn: 199646
* ARM: add tlsldo relocationKai Nacke2014-01-202-0/+6
| | | | | | | | | Add support for the symbol(tlsldo) relocation. This is required in order to solve PR18554. Reviewed by R. Golin, A. Korobeynikov. llvm-svn: 199644
* [CMake] llvm_process_sources: Introduce a parameter, ADDITIONAL_HEADERS.NAKAMURA Takumi2014-01-201-0/+2
| | | | | | | | | | | | | | ADDITIONAL_HEADERS is intended to add header files for IDEs as hint. For example: add_llvm_library(LLVMSupport Host.cpp ADDITIONAL_HEADERS Unix/Host.inc Windows/Host.inc ) llvm-svn: 199639
* [ARM] Do not generate Tag_DIV_use=AllowDIVExt when hardware div is ↵Artyom Skrobov2014-01-201-6/+8
| | | | | | non-optional: it should have the default value of AllowDIVIfExists llvm-svn: 199638
* Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when ↵Chandler Carruth2014-01-201-21/+15
| | | | | | | | generating VEXT." This test fails the newly added regression tests. llvm-svn: 199631
* Fix a DenseMap iterator invalidation bug causing lots of crashes whenChandler Carruth2014-01-201-31/+35
| | | | | | | | | | | | | | | | | | | type units were enabled. The crux of the issue is that the addDwarfTypeUnitType routine can end up being indirectly recursive. In this case, the reference into the dense map (TU) became invalid by the time we popped all the way back and used it to add the DIE type signature. Instead, use early return in the case where we can bypass the recursive step and creating a type unit. Then use the pointer to the new type unit to set up the DIE type signature in the case where we have to. I tried really hard to reduce a testcase for this, but it's really annoying. You have to get this to be mid-recursion when the densemap grows. Even if we got a test case for this today, it'd be very unlikely to continue exercising this pattern. llvm-svn: 199630
* Fix all the remaining lost-fast-math-flags bugs I've been able to find. The ↵Owen Anderson2014-01-203-10/+49
| | | | | | | | most important of these are cases in the generic logic for combining BinaryOperators. This logic hadn't been updated to handle FastMathFlags, and it took me a while to detect it because it doesn't show up in a simple search for CreateFAdd. llvm-svn: 199629
* [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.Kevin Qin2014-01-201-15/+21
| | | | llvm-svn: 199628
* [AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point ↵Kevin Qin2014-01-202-14/+74
| | | | | | | | | | zero in asm parser. For FCMEQ, FCMGE, FCMGT, FCMLE and FCMLT, floating point zero will be printed as #0.0 instead of #0. To support the history codes using #0, we consider to let asm parser accept both #0.0 and #0. llvm-svn: 199621
* Move the retrieval of VT after all of the early exits from PerformOrCombine ↵Michael Gottesman2014-01-191-1/+1
| | | | | | that do not use VT. NFC. llvm-svn: 199612
* InstCombine: Modernize a bunch of cast combines.Benjamin Kramer2014-01-191-44/+23
| | | | | | Also make them vector-aware. llvm-svn: 199608
* InstCombine: Hoist 3 copies of AddOne/SubOne into a header.Benjamin Kramer2014-01-194-30/+9
| | | | llvm-svn: 199605
* InstCombine: Replace a hand-rolled version of isKnownToBeAPowerOfTwo with ↵Benjamin Kramer2014-01-191-21/+4
| | | | | | the real thing. llvm-svn: 199604
* InstCombine: Teach most integer add/sub/mul/div combines how to deal with ↵Benjamin Kramer2014-01-192-76/+82
| | | | | | vectors. llvm-svn: 199602
* InstCombine: Refactor fmul/fdiv combines to handle vectors.Benjamin Kramer2014-01-192-65/+78
| | | | llvm-svn: 199598
* Fix a really nasty SROA bug with how we handled out-of-bounds memcpyChandler Carruth2014-01-191-12/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | intrinsics. Reported on the list by Evan with a couple of attempts to fix, but it took a while to dig down to the root cause. There are two overlapping bugs here, both centering around the circumstance of discovering a memcpy operand which is known to be completely outside the bounds of the alloca. First, we need to kill the *other* side of the memcpy if it was added to this alloca. Otherwise we'll factor it into our slicing and try to rewrite it even though we know for a fact that it is dead. This is made more tricky because we can visit the sides in either order. So we have to both kill the other side and skip instructions marked as dead. The latter really should be goodness in every case, but here is a matter of correctness. Second, we need to actually remove the *uses* of the alloca by the memcpy when queuing it for later deletion. Otherwise it may still be using the alloca when we go to promote it (if the rewrite re-uses the existing alloca instruction). Do this by factoring out the use-clobbering used when for nixing a Phi argument and re-using it across the operands of a to-be-deleted instruction. llvm-svn: 199590
* ARM ELF: ensure that the tag types are correctedSaleem Abdulrasool2014-01-191-0/+3
| | | | | | | | Ensure that the tag types are reflected on a replacement. This is particularly important for the compatibility tag which has multiple representations where the last definition wins. llvm-svn: 199577
* ARM: update build attributes for ABI r2.09Saleem Abdulrasool2014-01-192-6/+6
| | | | | | | Update names for the names as per the current ABI errata. Mark deprecated tags as such. llvm-svn: 199576
* Move ARM build attributes into SupportSaleem Abdulrasool2014-01-197-184/+6
| | | | | | | | | | | | This moves the ARM build attributes definitions and support routines into the Support library. The support routines simply permit the conversion of the value to and from a string representation. The movement is prompted in order to permit access to the constants and string representations from readobj in order to facilitate decoding of the attributes section. llvm-svn: 199575
* ARM IAS: remove unnecessary special caseSaleem Abdulrasool2014-01-191-1/+1
| | | | | | | Tag_nodefaults is even and greater than 32 and thus does not need the special check to fall into the correct category. llvm-svn: 199574
* LoopVectorizer: A reduction that has multiple uses of the reduction value is notArnold Schwaighofer2014-01-191-2/+11
| | | | | | | | | | | | | | a reduction. Really. Under certain circumstances (the use list of an instruction has to be set up right - hence the extra pass in the test case) we would not recognize when a value in a potential reduction cycle was used multiple times by the reduction cycle. Fixes PR18526. radar://15851149 llvm-svn: 199570
* [PM] Make the verifier work independently of any pass manager.Chandler Carruth2014-01-193-157/+169
| | | | | | | | | | | | | | | | | | | | | | | This makes the 'verifyFunction' and 'verifyModule' functions totally independent operations on the LLVM IR. It also cleans up their API a bit by lifting the abort behavior into their clients and just using an optional raw_ostream parameter to control printing. The implementation of the verifier is now just an InstVisitor with no multiple inheritance. It also is significantly more const-correct, and hides the const violations internally. The two layers that force us to break const correctness are building a DomTree and dispatching through the InstVisitor. A new VerifierPass is used to implement the legacy pass manager interface in terms of the other pieces. The error messages produced may be slightly different now, and we may have slightly different short circuiting behavior with different usage models of the verifier, but generally everything works equivalently and this unblocks wiring the verifier up to the new pass manager. llvm-svn: 199569
* Add a const lookup routine to get a BlockAddress constant if there isChandler Carruth2014-01-192-2/+13
| | | | | | | | one, but not create one. This is useful in the verifier when we want to query the constant if it exists but not create one. To be used in an upcoming commit. llvm-svn: 199568
* Support AddrSpaceCast in ConstantExpr::getAsInstruction.Eli Bendersky2014-01-181-0/+1
| | | | | | | It's handled similarly to the other casts. CastInst::Create already knows how to handle it. llvm-svn: 199565
* Don't refuse to transform constexpr(call(arg, ...)) to call(constexpr(arg), ↵Nick Lewycky2014-01-181-3/+4
| | | | | | ...)) just because the function has multiple return values even if their return types are the same. Patch by Eduard Burtescu! llvm-svn: 199564
* ARM: Let the assembler reject v5 instructions in v4 mode.Benjamin Kramer2014-01-181-1/+2
| | | | | | PR18524. llvm-svn: 199559
* InstCombine: Make the (fmul X, -1.0) -> (fsub -0.0, X) transform handle ↵Benjamin Kramer2014-01-181-6/+4
| | | | | | | | vectors too. PR18532. llvm-svn: 199553
* Upgrade ConstantFP's negative zero and infinity getters to handle vector types.Benjamin Kramer2014-01-181-16/+18
| | | | | | Will be used soon. llvm-svn: 199552
* Debug info (LTO): Move the creation of accessibility flags toAdrian Prantl2014-01-181-15/+16
| | | | | | | | | getOrCreateSubprogramDIE to avoid attributes being added twice when DIEs are merged. rdar://problem/15842330. llvm-svn: 199536
* Fix more instances of dropped fast math flags when optimizing FADD ↵Owen Anderson2014-01-183-7/+33
| | | | | | instructions. All found by inspection (aka grep). llvm-svn: 199528
* Add an inalloca flag to allocasReid Kleckner2014-01-174-12/+32
| | | | | | | | | | | | | | | | Summary: The only current use of this flag is to mark the alloca as dynamic, even if its in the entry block. The stack adjustment for the alloca can never be folded into the prologue because the call may clear it and it has to be allocated at the top of the stack. Reviewers: majnemer CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2571 llvm-svn: 199525
* 80-column.Rui Ueyama2014-01-171-3/+6
| | | | llvm-svn: 199519
* llvm-objdump/COFF: Print ordinal base number.Rui Ueyama2014-01-171-0/+6
| | | | llvm-svn: 199518
* Add two new calling conventions for runtime callsJuergen Ributzka2014-01-176-0/+31
| | | | | | | | | | | | | | This patch adds two new target-independent calling conventions for runtime calls - PreserveMost and PreserveAll. The target-specific implementation for X86-64 is defined as following: - Arguments are passed as for the default C calling convention - The same applies for the return value(s) - PreserveMost preserves all GPRs - except R11 - PreserveAll preserves all GPRs and all XMMs/YMMs - except R11 Reviewed by Lang and Philip llvm-svn: 199508
* [mips][msa] Correct pattern for LSADaniel Sanders2014-01-171-2/+2
| | | | | | | | | | | | | | Summary: $rs and $rt were the wrong way round in the .td and the testcase wasn't strict enough to detect the mistake. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D2554 llvm-svn: 199498
* [mips] Split IIIdiv int II_DIV, II_DIVU, II_DDIV, and II_DDIVUDaniel Sanders2014-01-174-12/+22
| | | | | | No functional change since the InstrItinData's were duplicated llvm-svn: 199497
* [mips][sched] Split IIImul and IIImult into subclasses.Daniel Sanders2014-01-174-31/+46
| | | | | | | | | IIImul -> II_MUL IIImult -> II_MULT, II_MULTU, II_MADD, II_MADDU, II_MSUB, II_MSUBU, II_DMULT, II_DMULTU No functional change since the InstrItinData's have been duplicated. llvm-svn: 199495
* [mips][sched] Split IIHiLo into II_MFHI_MFLO and II_MTHI_MTLODaniel Sanders2014-01-172-7/+10
| | | | | | No functional change since the InstrItinData's have been duplicated. llvm-svn: 199493
* Add MLA alias for ARMv4 support.Renato Golin2014-01-171-9/+14
| | | | | | | | | | Fix MLA defs to use register class GPRnopc. Add encoding tests for multiply instructions. (Alias for MUL/SMLAL/UMLAL added by r199026.) Patch by Zhaoshi. llvm-svn: 199491
* [PM] [cleanup] Rename some of the Verifier's members, re-arrange them,Chandler Carruth2014-01-171-273/+269
| | | | | | | | | | | and tweak comments prior to more invasive surgery. Also clean up some other non-doxygen comments, and run clang-format over the parts that are going to change dramatically in subsequent commits so that those don't get cluttered with formatting changes. No functionality changed. llvm-svn: 199489
* [asan] extend asan-coverage (still experimental).Kostya Serebryany2014-01-171-31/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add a mode for collecting per-block coverage (-asan-coverage=2). So far the implementation is naive (all blocks are instrumented), the performance overhead on top of asan could be as high as 30%. - Make sure the one-time calls to __sanitizer_cov are moved to function buttom, which in turn required to copy the original debug info into the call insn. Here is the performance data on SPEC 2006 (train data, comparing asan with asan-coverage={0,1,2}): asan+cov0 asan+cov1 diff 0-1 asan+cov2 diff 0-2 diff 1-2 400.perlbench, 65.60, 65.80, 1.00, 76.20, 1.16, 1.16 401.bzip2, 65.10, 65.50, 1.01, 75.90, 1.17, 1.16 403.gcc, 1.64, 1.69, 1.03, 2.04, 1.24, 1.21 429.mcf, 21.90, 22.60, 1.03, 23.20, 1.06, 1.03 445.gobmk, 166.00, 169.00, 1.02, 205.00, 1.23, 1.21 456.hmmer, 88.30, 87.90, 1.00, 91.00, 1.03, 1.04 458.sjeng, 210.00, 222.00, 1.06, 258.00, 1.23, 1.16 462.libquantum, 1.73, 1.75, 1.01, 2.11, 1.22, 1.21 464.h264ref, 147.00, 152.00, 1.03, 160.00, 1.09, 1.05 471.omnetpp, 115.00, 116.00, 1.01, 140.00, 1.22, 1.21 473.astar, 133.00, 131.00, 0.98, 142.00, 1.07, 1.08 483.xalancbmk, 118.00, 120.00, 1.02, 154.00, 1.31, 1.28 433.milc, 19.80, 20.00, 1.01, 20.10, 1.02, 1.01 444.namd, 16.20, 16.20, 1.00, 17.60, 1.09, 1.09 447.dealII, 41.80, 42.20, 1.01, 43.50, 1.04, 1.03 450.soplex, 7.51, 7.82, 1.04, 8.25, 1.10, 1.05 453.povray, 14.00, 14.40, 1.03, 15.80, 1.13, 1.10 470.lbm, 33.30, 34.10, 1.02, 34.10, 1.02, 1.00 482.sphinx3, 12.40, 12.30, 0.99, 13.00, 1.05, 1.06 llvm-svn: 199488
* [PM] Remove the preverifier and directly compute the DominatorTree forChandler Carruth2014-01-172-54/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the verifier after ensuring the CFG is at least usefully formed. This fixes a number of problems: 1) The PreVerifier was missing the controls the Verifier provides over *how* an invalid module is handled -- it just aborted the program! Now it uses the same logic as the Verifier which is significantly more library-friendly. 2) The DominatorTree used previously could have been cached and not updated due to bugs in prior passes and we would silently use the stale tree. This could cause dominance errors to not be as quickly diagnosed. 3) We can now (in the next patch) pull the functionality of the verifier apart from the pass infrastructure so that you can verify IR without having any form of pass manager. This in turn frees the code to share logic between old and new pass manager variants. Along the way I fixed at least one annoying bug -- the state for 'Broken' wasn't being cleared from run to run causing all functions visited after the first broken function to be marked as broken regardless of whether *they* were a problem. Fortunately, I don't really know much of a way to observe this peculiarity. In case folks are worried about the runtime cost, its negligible. I looked at running the entire regression test suite (which should be a relatively good use of the verifier) before and after but was unable to even measure the time spent on the verifier and there was no regresion from before to after. I checked both with debug builds and optimized builds. llvm-svn: 199487
* [AArch64 NEON] Expand vector for UDIV/SDIV/UREM/SREM/FREM as neon doesn't ↵Kevin Qin2014-01-171-0/+55
| | | | | | support these operations. llvm-svn: 199485
* Switch a few instructions to use RI instead I so they don't require REX_W to ↵Craig Topper2014-01-173-19/+19
| | | | | | be explicitly specified. llvm-svn: 199479
* Add OpSize16 flags to 32-bit CRC32 instructions so they can be encoded ↵Craig Topper2014-01-171-2/+2
| | | | | | correctly in 16-bit mode. llvm-svn: 199478
* Teach x86 asm parser to handle 'opaque ptr' in Intel syntax.Craig Topper2014-01-171-0/+1
| | | | llvm-svn: 199477
* Teach X86 asm parser to understand 'ZMMWORD PTR' in Intel syntax.Craig Topper2014-01-171-0/+1
| | | | llvm-svn: 199476
* Fix intel syntax for 64-bit version of FXSAVE/FXRSTOR to use '64' suffix ↵Craig Topper2014-01-171-2/+2
| | | | | | instead of 'q' llvm-svn: 199474
* VEX_PREFIX_66 doesn't need to set the hasOpSize flag since VEX instructions ↵Craig Topper2014-01-171-11/+0
| | | | | | don't use the size fields it controls. llvm-svn: 199470
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