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* [MemorySSA] Rename uses when inserting memory uses.Alina Sbirlea2019-08-193-16/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When inserting uses from outside the MemorySSA creation, we don't normally need to rename uses, based on the assumption that there will be no inserted Phis (if Def existed that required a Phi, that Phi already exists). However, when dealing with unreachable blocks, MemorySSA will optimize away Phis whose incoming blocks are unreachable, and these Phis end up being re-added when inserting a Use. There are two potential solutions here: 1. Analyze the inserted Phis and clean them up if they are unneeded (current method for cleaning up trivial phis does not cover this) 2. Leave the Phi in place and rename uses, the same way as whe inserting defs. This patch use approach 2. Resolves first test in PR42940. Reviewers: george.burgess.iv Subscribers: Prazek, sanjoy.google, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66033 llvm-svn: 369291
* [X86] Teach lowerV4I32Shuffle to only use broadcasts if the mask has more ↵Craig Topper2019-08-191-9/+11
| | | | | | | | | | | | | | than one undef element. Prioritize shifts over broadcast in lowerV8I16Shuffle. The motivating case are the changes in vector-reduce-add.ll where we were doing extra work in the scalar domain instead of shuffling. There may be some one use check that needs to be looked into there, but this patch sidesteps the issue by avoiding broadcasts that aren't really broadcasting. Differential Revision: https://reviews.llvm.org/D66071 llvm-svn: 369287
* [CGP] Remove ModifiedDT from the makeBitReverse loopCraig Topper2019-08-191-1/+0
| | | | | | | | | | I don't think anything in this loop modifies the control flow and we don't restart any iteration after setting the flag. This code was added in http://reviews.llvm.org/D16893 but looking at the test case added there the code that caused the dominator tree to change was merging blocks with their predecessor not the bitreverse optimization. Differential Revision: https://reviews.llvm.org/D66366 llvm-svn: 369283
* Filesystem/Windows: fix inconsistency in readNativeFileSlice APIPavel Labath2019-08-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Summary: The windows version implementation of readNativeFileSlice, was trying to match the POSIX behavior of not treating EOF as an error, but it was only handling the case of reading from a pipe. Attempting to read past the end of a regular file returns a slightly different error code, which needs to be handled too. This patch adds ERROR_HANDLE_EOF to the list of error codes to be treated as an end of file, and adds some unit tests for the API. This issue was found while attempting to land D66224, which caused a bunch of lldb tests to start failing on windows. Reviewers: rnk, aganea Subscribers: kristina, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66344 llvm-svn: 369269
* [TargetLowering] x s% C == 0 fold: vector divisor with INT_MIN handlingRoman Lebedev2019-08-191-13/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The general fold is only valid for positive divisors. Which effectively means, it is invalid for `INT_MIN` divisors, and we currently bailout if we see them. But that is too strict, we can just fix-up the results. For that, let's do a second computation 'in parallel': ``` Name: srem -> and Pre: isPowerOf2(C) %o = srem i8 %X, C %r = icmp eq %o, 0 => %n = and i8 %X, C-1 %r = icmp eq %n, 0 ``` https://rise4fun.com/Alive/Sup And then just blend results: if the divisor was `INT_MIN`, pick the value we got via bit-test, else pick the value from general fold. There's interesting observation - `ISD::ROTR` is set to `LegalizeAction::Expand` before AVX512, so we should not treat `INT_MIN` divisor as even; and as it can be seen while `@test_srem_odd_even_one` improves on all run-lines, `@test_srem_odd_even_INT_MIN` only improves for AVX512. Reviewers: RKSimon, craig.topper, spatel Reviewed By: RKSimon Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66300 llvm-svn: 369268
* [nfc] Silent gcc warningSerge Guelton2019-08-191-3/+2
| | | | llvm-svn: 369266
* [Object/COFF.h] - Stop returning std::error_code in a few methods. NFCI.George Rimar2019-08-191-23/+0
| | | | | | | | | | There are 4 methods that return std::error_code now, though they do not have to because they are always succeed. I refactored them. This allows to simplify the code in tools a bit. llvm-svn: 369263
* [PeepholeOptimizer] Don't assume bitcast def always has inputJinsong Ji2019-08-192-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: If we have a MI marked with bitcast bits, but without input operands, PeepholeOptimizer might crash with assert. eg: If we apply the changes in PPCInstrVSX.td as in this patch: [(set v4i32:$XT, (bitconvert (v16i8 immAllOnesV)))]>; We will get assert in PeepholeOptimizer. ``` llvm-lit llvm-project/llvm/test/CodeGen/PowerPC/build-vector-tests.ll -v llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h:417: const llvm::MachineOperand &llvm::MachineInstr::getOperand(unsigned int) const: Assertion `i < getNumOperands() && "getOperand() out of range!"' failed. ``` The fix is to abort if we found out of bound access. Reviewers: qcolombet, MatzeB, hfinkel, arsenm Reviewed By: qcolombet Subscribers: wdng, arsenm, steven.zhang, wuzish, nemanjai, hiraditya, kbarton, MaskRay, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65542 llvm-svn: 369261
* [RISCV] Don't force absolute FK_Data_X fixups to relocsAlex Bradbury2019-08-191-0/+7
| | | | | | | | | | | | The current behavior of shouldForceRelocation forces relocations for the majority of fixups when relaxation is enabled. This makes sense for fixups which incorporate symbols but is unnecessary for simple data fixups where the fixup target is already resolved to an absolute value. Differential Revision: https://reviews.llvm.org/D63404 Patch by Edward Jones. llvm-svn: 369257
* [DebugInfo] Allow bundled calls in the MIR's call site infoDavid Stenberg2019-08-192-4/+5
| | | | | | | | | | | | | | | | | | Summary: Extend the MIR parser and writer so that the call site information can refer to calls that are bundled. Reviewers: aprantl, asowda, NikolaPrica, djtodoro, ivanbaev, vsk Reviewed By: aprantl Subscribers: arsenm, hiraditya, llvm-commits Tags: #debug-info, #llvm Differential Revision: https://reviews.llvm.org/D66145 llvm-svn: 369256
* [SLP] reduce duplicated code; NFCSanjay Patel2019-08-191-2/+4
| | | | llvm-svn: 369250
* [MC] Simplify ELFObjectWriter::recordRelocation. NFCFangrui Song2019-08-191-22/+16
| | | | llvm-svn: 369248
* [DebugInfo] Make postra sinking of DBG_VALUEs subregister-safeJeremy Morse2019-08-191-9/+28
| | | | | | | | | | | | | | | | | | | | | | | | Currently the machine instruction sinker identifies DBG_VALUE insts that also need to sink by comparing register numbers. Unfortunately this isn't safe, because (after register allocation) a DBG_VALUE may read a register that aliases what's being sunk. To fix this, identify the DBG_VALUEs that need to sink by recording & examining their register units. Register units gives us the following guarantee: "Two registers overlap if and only if they have a common register unit" [MCRegisterInfo.h] Thus we can always identify aliasing DBG_VALUEs if the set of register units read by the DBG_VALUE, and the register units of the instruction being sunk, intersect. (MachineSink already uses classes like "LiveRegUnits" for determining sinking validity anyway). The test added checks for super and subregister DBG_VALUE reads of a sunk copy being sunk as well. Differential Revision: https://reviews.llvm.org/D58191 llvm-svn: 369247
* [ARM] Add support for MVE vaddvSam Tebbs2019-08-194-0/+41
| | | | | | | | | This patch adds vecreduce_add and the relevant instruction selection for vaddv. Differential revision: https://reviews.llvm.org/D66085 llvm-svn: 369245
* [ARM] MVE sext costsDavid Green2019-08-191-0/+25
| | | | | | | | | This adds some sext costs for MVE, taken from the length of assembly sequences that we currently generate. Differential Revision: https://reviews.llvm.org/D66010 llvm-svn: 369244
* Revert [Attributor] Fix: Make sure we set the changed flagDavid L. Jones2019-08-191-4/+4
| | | | | | | | This reverts r369159 (git commit cbaf1fdea2de891bdbc49cdec89ae2077e6b9ed0) r369160 caused a test to fail under UBSAN. See thread on llvm-commits. llvm-svn: 369241
* [MC] Delete unnecessary diagnostic: "No relocation available to represent ↵Fangrui Song2019-08-191-15/+1
| | | | | | | | | | | | | | | | | | | | this relative expression" Replace - error: No relocation available to represent this relative expression with + error: symbol 'undef' can not be undefined in a subtraction expression or + error: Cannot represent a difference across sections Keep !IsPcRel as an assertion after the two diagnostic checks are done. llvm-svn: 369239
* Revert [Attributor] Fix: Do not partially resolve returned calls.David L. Jones2019-08-191-28/+11
| | | | | | | | This reverts r369160 (git commit f72d9b1c97b41fff48ad1eecbba59a29c171bff4) r369160 caused some tests to fail under UBSAN. See thread on llvm-commits. llvm-svn: 369236
* [MC] Don't emit .symver redirected symbols to the symbol tableFangrui Song2019-08-191-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GNU as keeps the original symbol in the symbol table for defined @ and @@, but suppresses it in other cases (@@@ or undefined). The original symbol is usually undesired: In a shared object, the original symbol can be localized with a version script, but it is hard to remove/localize in an archive: 1) a post-processing step removes the undesired original symbol 2) consumers (executable) of the archive are built with the version script Moreover, it can cause linker issues like binutils PR/18703 if the original symbol name and the base name of the versioned symbol is the same (both ld.bfd and gold have some code to work around defined @ and @@). In lld, if it sees f and f@v1: --version-script =(printf 'v1 {};') => f and f@v1 --version-script =(printf 'v1 { f; };') => f@v1 and f@@v1 It can be argued that @@@ added on 2000-11-13 corrected the @ and @@ mistake. This patch catches some more multiple version errors (defined @ and @@), and consistently suppress the original symbol. This addresses all the problems listed above. If the user wants other aliases to the versioned symbol, they can copy the original symbol to other symbol names with .set directive, e.g. .symver f, f@v1 # emit f@v1 but not f into .symtab .set f_impl, f # emit f_impl into .symtab llvm-svn: 369233
* [X86] Teach lower1BitShuffle to match right shifts with upper zero elements ↵Craig Topper2019-08-191-19/+20
| | | | | | | | | | on types that don't natively support KSHIFT. We can support these by widening to a supported type, then shifting all the way to the left and then back to the right to ensure that we shift in zeroes. llvm-svn: 369232
* [X86] Fix the lower1BitShuffle code added in r369215 to correctly pass the ↵Craig Topper2019-08-191-1/+1
| | | | | | | | | | widened vector to the KSHIFT node. Not sure how to test this as we have tests that exercise this code, but nothing failed for the types not matching. Since all the k-registers use equivalent register classes everything just ends up working. llvm-svn: 369228
* [X86] Teach lower1BitShuffle to match KSHIFTR that doesn't use Zeroable and ↵Craig Topper2019-08-191-0/+48
| | | | | | | | | | | only relies on undef. This allows us to widen the type when the KSHIFTR instruction doesn't exist for the type. If we need to shift in zeroes into the upper elements we would need more work to guarantee zeroes when widening. llvm-svn: 369227
* [X86] Teach lower1BitShuffle to recognize padding a subvector with zeros ↵Craig Topper2019-08-191-7/+16
| | | | | | | | | with V2 as the source and V1 as the zero vector. Shuffle canonicalization can swap the sources so the zero vector might be V1 and the subvector that's being padded can be V2. llvm-svn: 369226
* [X86] Add a special case to LowerCONCAT_VECTORSvXi1 to handle concatenating ↵Craig Topper2019-08-181-14/+30
| | | | | | | | | | zero vectors followed by one non-zero vector followed by undef vectors. For such a case we should only need a KSHIFTL, but we were previously generating a KSHIFTL followed by a KSHIFTR because we mistakenly believed we need to zero the undef elements. llvm-svn: 369224
* [X86] Replace uses of getZeroVector for vXi1 vectors with DAG.getConstant.Craig Topper2019-08-181-4/+4
| | | | | | vXi1 vectors don't need special handling. llvm-svn: 369222
* [X86] Improve lower1BitShuffle handling for KSHIFTL on narrow vectors.Craig Topper2019-08-181-8/+24
| | | | | | | We can insert the value into a larger legal type and shift that by the desired amount. llvm-svn: 369215
* Fix signed/unsigned comparison warning. NFCI.Simon Pilgrim2019-08-181-2/+2
| | | | llvm-svn: 369213
* [X86] isTargetShuffleEquivalent - add BUILD_VECTOR matchingSimon Pilgrim2019-08-181-3/+21
| | | | | | | | | | Add similar functionality to isShuffleEquivalent - if the mask elements don't match, try matching the BUILD_VECTOR scalars instead. As target shuffles need to handle SM_Sentinel values, this can get a bit tricky, so commit just adds actual mask element index handling - full SM_SentinelZero support will be added when the need arises. Also, enables support in matchVectorShuffleWithPACK llvm-svn: 369212
* [X86] isTargetShuffleEquivalent - early out on illegal shuffle masks. NFCI.Simon Pilgrim2019-08-181-8/+10
| | | | | | Simplifies shuffle mask comparisons by just bailing out if the shuffle mask has any out of range values - will make an upcoming patch much simpler. llvm-svn: 369211
* [InstCombine] Cherry-pick NFC cleanups of ↵Roman Lebedev2019-08-181-5/+8
| | | | | | foldShiftIntoShiftInAnotherHandOfAndInICmp() from D66383 llvm-svn: 369207
* [TargetLowering] Teach computeRegisterProperties to only widen v3i16/v3f16 ↵Craig Topper2019-08-181-11/+23
| | | | | | | | | | | | | | | | | | | | | vectors to the next power of 2 type if that's legal. These were recently made simple types. This restores their behavior back to something like their EVT legalization. We might be able to fix the code in type legalization where the assert was failing, but I didn't investigate too much as I had already looked at the computeRegisterProperties code during the review for v3i16/v3f16. Most of the test changes restore the X86 codegen back to what it looked like before the recent change. The test case in vec_setcc.ll and is a reduced version of the reproducer from the fuzzer. Fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=16490 llvm-svn: 369205
* [SelectionDAG] Add a node creation debug message to getMachineNode.Craig Topper2019-08-181-0/+1
| | | | llvm-svn: 369204
* AMDGPU: Fix iterator error when lowering SI_END_CFMatt Arsenault2019-08-181-4/+4
| | | | | | | If the instruction is the last in the block, there is no next instruction but the iteration still needs to look at the new block. llvm-svn: 369203
* AMDGPU: Disambiguate v3f16 format in load/store tablesMatt Arsenault2019-08-185-104/+119
| | | | | | | | | Currently the searchable tables report the number of dwords. These round to the same number for 3 and 4 component d16 instructions. Change this to report the number of elements so this isn't ambiguous. llvm-svn: 369202
* [X86] Add a one use check to the combineStore code that handles ↵Craig Topper2019-08-171-1/+1
| | | | | | | | | v16i16->v16i8 truncate+store by extending to v16i32 and then emitting a v16i32->v16i8 truncstore. This prevent us from emitting a separate truncate and a truncating store instruction. llvm-svn: 369200
* [BPF] Fix bpf llvm-objdump issues.Yonghong Song2019-08-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit https://reviews.llvm.org/D57939 ("[DWARF] Refactor RelocVisitor and fix computation of SHT_RELA-typed relocation entries) made a change for relocation resolution when operating on an object file. The change unfortunately broke BPF as given SymbolValue (S) and Addent (A), previously relocation is resolved to S + A and after the change, it is resolved to S This patch fixed the issue by resolving relocation correctly. It looks not all relocation resolution reaches here and I did not trace down exactly when. But I do find if the object file includes codes in two different ELF sections than default ".text", the above bug will be triggered. This patch included a trivial two function source code to demonstrate this issue. The relocation for .debug_loc is resolved incorrectly due to this and llvm-objdump cannot display source annotated assembly. Differential Revision: https://reviews.llvm.org/D66372 llvm-svn: 369199
* [CodeGen] Do the Simple Early Return in block-placement pass to optimize the ↵Kang Zhang2019-08-171-0/+40
| | | | | | | | | | | | | | | | | | blocks Summary: Fix a bug of preducessors. In `block-placement` pass, it will create some patterns for unconditional we can do the simple early retrun. But the `early-ret` pass is before `block-placement`, we don't want to run it again. This patch is to do the simple early return to optimize the blocks at the last of `block-placement`. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D63972 llvm-svn: 369191
* Revert Revert [AArch64InstrInfo] Stop getInstSizeInBytes returning non-zero ↵Paul Walker2019-08-171-6/+4
| | | | | | | | for meta instructions. This reverts r369132 (git commit 19301d75f086caae1a495d267f5d0264b225942d) llvm-svn: 369186
* Revert [AArch64InstrInfo] Stop getInstSizeInBytes returning non-zero for ↵Paul Walker2019-08-171-4/+6
| | | | | | | | meta instructions. This reverts r369133 (git commit 2632c677f85cba1ac2aef5d68aaf8af0f5b3c944) llvm-svn: 369185
* [MemorySSA] Loop passes should mark MSSA preserved when available.Alina Sbirlea2019-08-175-6/+6
| | | | | | | | This patch applies only to the new pass manager. Currently, when MSSA Analysis is available, and pass to each loop pass, it will be preserved by that loop pass. Hence, mark the analysis preserved based on that condition, vs the current `EnableMSSALoopDependency`. This leaves the global flag to affect only the entry point in the loop pass manager (in FunctionToLoopPassAdaptor). llvm-svn: 369181
* Revert r367891 - "[InstCombine] combine mul+shl separated by zext"Sanjay Patel2019-08-161-13/+2
| | | | | | | | | | | | | This reverts commit 5dbb90bfe14ace30224239cac7c61a1422fa5144. As noted in the post-commit thread for r367891, this can create a multiply that is lowered to a libcall that may not exist. We need to improve the backend decomposition for integer multiply before trying to re-land this (if it's still worthwhile after doing the backend work). llvm-svn: 369174
* Reland "[ARM] push LR before __gnu_mcount_nc"Jian Cai2019-08-166-1/+91
| | | | | | | | This relands r369147 with fixes to unit tests. https://reviews.llvm.org/D65019 llvm-svn: 369173
* [AArch64][GlobalISel] Fix an assertion during G_UNMERGE selection for s128 ↵Amara Emerson2019-08-161-1/+3
| | | | | | types. llvm-svn: 369172
* [CodeGenPrepare] Fix use-after-freeSanjay Patel2019-08-161-1/+2
| | | | | | | | | | | | | | | | | | | If OptimizeExtractBits() encountered a shift instruction with no operands at all, it would erase the instruction, but still return false. This previously didn’t matter because its caller would always return after processing the instruction, but https://reviews.llvm.org/D63233 changed the function’s caller to fall through if it returned false, which would then cause a use-after-free detectable by ASAN. This change makes OptimizeExtractBits return true if it removes a shift instruction with no users, terminating processing of the instruction. Patch by: @brentdax (Brent Royal-Gordon) Differential Revision: https://reviews.llvm.org/D66330 llvm-svn: 369168
* Revert [X86] SimplifyDemandedVectorElts - attempt to recombine target ↵Jordan Rupprecht2019-08-161-17/+0
| | | | | | | | | | shuffle using DemandedElts mask (reapplied) This reverts r368662 (git commit 1a8d790cf5f89c1df718844f13e934e39bef6ef5) The compile-time regression repro is in https://bugs.llvm.org/show_bug.cgi?id=43024 llvm-svn: 369167
* [ARM] Preserve liveness in ARMConstantIslands.Eli Friedman2019-08-161-3/+18
| | | | | | | | | | We currently don't use liveness information after this point, but it can be useful to catch bugs using -verify-machineinstrs, and optimizations could potentially use this information in the future. Differential Revision: https://reviews.llvm.org/D66319 llvm-svn: 369162
* [Attributor] Fix: Do not partially resolve returned calls.Johannes Doerfert2019-08-161-11/+28
| | | | | | | | | | By partially resolving returned calls we did not record that they were not fully resolved which caused odd behavior down the line. We could also end up with some, but not all, returned values of the callee in the returned values map of the caller, another odd behavior we want to avoid. llvm-svn: 369160
* [Attributor] Fix: Make sure we set the changed flagJohannes Doerfert2019-08-161-4/+4
| | | | | | | The flag was updated *before* we actually run the visitor callback so we might miss updates. llvm-svn: 369159
* [CaptureTracking] Allow null to be in either icmp operandJohannes Doerfert2019-08-161-5/+7
| | | | | | | | | | | | | | | | | Summary: Before we required the comparison against null to be "canonical", hence null to be operand #1. This patch allows null to be in either operand, similar to the handling of loaded globals that follows. Reviewers: sanjoy, hfinkel, aykevl, sstefan1, uenoku Subscribers: hiraditya, bollu, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66321 llvm-svn: 369158
* [Attributor] Add all missing attribute definitions/symbolsJohannes Doerfert2019-08-161-35/+117
| | | | | | | | | | | | | | | | As a preparation to "on-demand" abstract attribute generation we need implementations for all attributes (as they can be queried and then created on-demand where we now fail to find one). Reviewers: uenoku, sstefan1 Subscribers: hiraditya, bollu, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66129 llvm-svn: 369155
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