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* Clear the SCEVExpander's insertion point after making deletions,Dan Gohman2010-03-201-0/+4
| | | | | | | | | | | | | | so that the SCEVExpander doesn't retain a dangling pointer as its insert position. The dangling pointer in this case wasn't ever used to insert new instructions, but it was causing trouble with SCEVExpander's code for automatically advancing its insert position past debug intrinsics. This fixes use-after-free errors that valgrind noticed in test/Transforms/IndVarSimplify/2007-06-06-DeleteDanglesPtr.ll and test/Transforms/IndVarSimplify/exit_value_tests.ll. llvm-svn: 99036
* If call result is in ST0 and it is not being passed to the caller'sEvan Cheng2010-03-201-0/+22
| | | | | | | caller, then it is not safe to optimize the call into a sibcall since the call result has to be popped off the x87 stack. llvm-svn: 99032
* Better fix for r98994, MachObjectWriterImpl wasn't intended to be virtual.Daniel Dunbar2010-03-201-8/+5
| | | | llvm-svn: 99031
* Add NLdStFrm Format.Johnny Chen2010-03-201-6/+9
| | | | llvm-svn: 99014
* Revert r98679. The disassembler will be updated to depend on the existence ofJohnny Chen2010-03-191-6/+2
| | | | | | | IndexModeUpd and then populates the Inst{21}=1 while populating the instructions for disassembly. llvm-svn: 99013
* Revert this change, since it was causing ARM performance regressions.Bob Wilson2010-03-196-69/+79
| | | | | | | | | | | | --- Reverse-merging r98889 into '.': U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/ARMISelLowering.h U lib/Target/ARM/ARMInstrInfo.td U lib/Target/ARM/ARMInstrVFP.td U lib/Target/ARM/ARMISelLowering.cpp U lib/Target/ARM/ARMInstrFormats.td llvm-svn: 99010
* Fix more places to more thoroughly ignore debug intrinsics. This fixesDan Gohman2010-03-191-5/+13
| | | | | | | | use-before-def errors in SCEVExpander-produced code in sqlite3 when debug info with optimization is enabled, though the testcases for this are dependent on use-list order. llvm-svn: 99001
* remove the patterns that I commented out in r98930, Dan verified Chris Lattner2010-03-192-324/+0
| | | | | | that they are dead. llvm-svn: 99000
* Fix -Wnon-virtual-dtor warning.Rafael Espindola2010-03-191-0/+2
| | | | llvm-svn: 98994
* call void @llvm.dbg.declare(metadata !{i32* null}, metadata !1)Devang Patel2010-03-191-4/+0
| | | | | | is valid, but not useful, when variable identified by !1 is optimized away by the optimizer. llvm-svn: 98986
* Fixed the encoding problems of the crc32 instructions. All had the Operand sizeKevin Enderby2010-03-191-20/+31
| | | | | | | | | override prefix and only the r/m16 forms should have had that. Also for variant one, the AT&T syntax, added suffixes to all forms. Also added the missing 64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and tweaked one test case to add the needed suffixes. llvm-svn: 98980
* Stop trying to merge identical jump tables. This had been inadvertentlyBob Wilson2010-03-192-39/+6
| | | | | | | | | | | disabled for several months (since svn r88806) and no one noticed. My fix for pr6543 yesterday reenabled it, but broke the ARM port's code for using TBB/TBH. Rather than adding a target hook to disable merging for Thumb2 only, I'm just taking this out. It is not common to have identical jump tables, the code we used to merge them was O(N^2), and it only helps code size, not performance. llvm-svn: 98977
* MC/Mach-O/x86_64: Add relocation support.Daniel Dunbar2010-03-191-0/+213
| | | | | | | | - This is "extraordinarily" Darwin 'as' compatible. See the litany of FIXMEs littered about for more information. - There are a few cases which seem to clearly be 'as' bugs which I have left unsupported, and there is one cases where we diverge but should fix if it blocks diffing .o files (Darwin 'as' ends up widening a jump unnecessarily). - 403.gcc build, runs, and diffs equivalently to the 'as' built version now (using llvm-mc). However, it builds so slowly that I wouldn't recommend trying it quite yet. :) llvm-svn: 98974
* MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen ↵Daniel Dunbar2010-03-191-8/+16
| | | | | | only" so they don't get selected by the asm matcher. llvm-svn: 98972
* Renumber LdStExFrm from 28 to 11 and shift the existing format values to makeJohnny Chen2010-03-192-40/+40
| | | | | | | room for it. This is in preparation for another patch which is adding NEON subformats to facilitate disassembly. llvm-svn: 98967
* back out r98957, it broke ↵Gabor Greif2010-03-199-27/+19
| | | | | | http://smooshlab.apple.com:8010/builders/clang-x86_64-darwin10-fnt/builds/703 in the nightly test suite llvm-svn: 98958
* Recommit r80858 again (which has been backed out in r80871).Gabor Greif2010-03-199-19/+27
| | | | | | | | | | | This time I did a self-hosted bootstrap on Linux x86-64, with no problems. Let's see how darwin 64-bit self-hosting goes. At the first sign of failure I'll back this out. Maybe the valgrind bots give me a hint of what may be wrong (it at all). llvm-svn: 98957
* MC: Add TargetAsmBackend::createObjectWriter.Daniel Dunbar2010-03-192-7/+20
| | | | | | - MCAssembler is now object-file independent, although we will surely need more work to fully support ELF/COFF. llvm-svn: 98955
* MCCodeEmitter: Add target independent fixup flag for is-pc-relative.Daniel Dunbar2010-03-193-20/+12
| | | | llvm-svn: 98954
* MC: Sink code emitter into MCAssembler.Daniel Dunbar2010-03-192-8/+5
| | | | llvm-svn: 98953
* MC/Mach-O: Move to MachObjectWriter.{h,cpp}.Daniel Dunbar2010-03-194-821/+900
| | | | llvm-svn: 98952
* MC: Add TargetAsmBackend::isVirtualSection hook.Daniel Dunbar2010-03-192-17/+30
| | | | llvm-svn: 98950
* MC: Split MCObjectWriter out of MCAssembler.cpp.Daniel Dunbar2010-03-193-131/+46
| | | | llvm-svn: 98949
* MCAssembler: Pull out MCObjectWriter class.Daniel Dunbar2010-03-191-82/+126
| | | | llvm-svn: 98948
* MCAssembler: Move ApplyFixup to the TargetAsmBackend, this is a target ↵Daniel Dunbar2010-03-192-12/+27
| | | | | | specific not object writer specific task. llvm-svn: 98947
* MC/Mach-O: Lift the fixup evaluation and application up (to the same place), ↵Daniel Dunbar2010-03-191-35/+31
| | | | | | and eliminate MCAsmFixup::FixedValue. llvm-svn: 98944
* MC/Mach-O: Factor out ExecutePostLayoutBinding, to separate the post-layout ↵Daniel Dunbar2010-03-191-31/+33
| | | | | | changes the object writer may need to make to the assembler from the actual .o writing. llvm-svn: 98943
* MC/Mach-O: Lift relocation emission logic a bit higher to separate ↵Daniel Dunbar2010-03-191-56/+77
| | | | | | evaluation / relocation handling from the actual .o writing. llvm-svn: 98942
* Remove a memory leak from the CBackend.Jeffrey Yasskin2010-03-191-1/+4
| | | | llvm-svn: 98941
* fix an MCInstPrinter leak that jyasskin pointed out:Chris Lattner2010-03-191-1/+2
| | | | | | createAsmStreamer now takes ownership of the instprinter. llvm-svn: 98939
* set SDNPVariadic on nodes throughout the rest of the targets thatChris Lattner2010-03-198-15/+27
| | | | | | need them. llvm-svn: 98937
* Remove a memory leak from ThumbTargetMachine.Jeffrey Yasskin2010-03-191-2/+6
| | | | llvm-svn: 98936
* add a new SDNPVariadic SDNP node flag, and use it inChris Lattner2010-03-191-4/+5
| | | | | | | | dag isel gen instead of instruction properties. This allows the oh-so-useful behavior of matching a variadic non-root node. llvm-svn: 98934
* remove some damaged sign extend patterns that can never match.Chris Lattner2010-03-191-8/+6
| | | | llvm-svn: 98932
* disable some illegal blackfin patterns. sext from i32 to i32 can neverChris Lattner2010-03-191-5/+5
| | | | | | match. Jakob, please take a look when you get a chance. llvm-svn: 98931
* comment out a bunch of parallel store patterns that apparentlyChris Lattner2010-03-192-14/+44
| | | | | | | can't match or just have no testcases. Will remove after confirmation from dan that they really are dead. llvm-svn: 98930
* Fix -Asserts warnings.Daniel Dunbar2010-03-191-5/+4
| | | | llvm-svn: 98928
* MC/Mach-O: Add isScatteredFixupFullyResolved, which implements the correct ↵Daniel Dunbar2010-03-191-1/+59
| | | | | | | | algorithm (used on x86_64) for determining whether an evaluated fixup is fully resolved (doesn't need relocation). - Test cases will follow, once we have x86_64 relocation support. llvm-svn: 98926
* MC/Mach-O/x86_64: Add getAtom[ForAddress].Daniel Dunbar2010-03-191-0/+36
| | | | | | - These find the defining symbol which identifies the containing atom for a symbol or address. They are currently very slow, but will be eliminated eventually. llvm-svn: 98925
* MC/Mach-O: Factor out isScatteredFixupFullyResolvedSimple predicate, and fix ↵Daniel Dunbar2010-03-191-15/+52
| | | | | | some corner cases. llvm-svn: 98924
* MC/Mach-O: Factor out isSymbolLinkerVisible method; "linker visible" is a ↵Daniel Dunbar2010-03-191-10/+18
| | | | | | made up term to refer to non-temporary labels + temporary labels in sections-which-require symbols. For Darwin, it corresponds to symbols which effectively define an atom. llvm-svn: 98923
* Fixed a widening bug where we were not using the correct size for the loadMon P Wang2010-03-191-1/+1
| | | | llvm-svn: 98920
* X86: Fix encoding for TEST64rr.Daniel Dunbar2010-03-191-1/+1
| | | | llvm-svn: 98919
* FP16 constfoldingAnton Korobeynikov2010-03-191-0/+25
| | | | llvm-svn: 98911
* Now that tblgen can handle matching implicit defs of instructionsChris Lattner2010-03-194-131/+104
| | | | | | | | | | | | | | | | | | | | | | | | | to input patterns, we can fix X86ISD::CMP and X86ISD::BT as taking two inputs (which have to be the same type) and *returning an i32*. This is how the SDNodes get made in the graph, but we weren't able to model it this way due to deficiencies in the pattern language. Now we can change things like this: def UCOM_FpIr80: FpI_<(outs), (ins RFP80:$lhs, RFP80:$rhs), CompareFP, - [(X86cmp RFP80:$lhs, RFP80:$rhs), - (implicit EFLAGS)]>; // CC = ST(0) cmp ST(i) + [(set EFLAGS, (X86cmp RFP80:$lhs, RFP80:$rhs))]>; and fix terrible crimes like this: -def : Pat<(parallel (X86cmp GR8:$src1, 0), (implicit EFLAGS)), +def : Pat<(X86cmp GR8:$src1, 0), (TEST8rr GR8:$src1, GR8:$src1)>; This relies on matching the result of TEST8rr (which is EFLAGS, which is an implicit def) to the result of X86cmp, an i32. llvm-svn: 98903
* Update comment to refer to the right filename.Bob Wilson2010-03-181-1/+1
| | | | llvm-svn: 98902
* tidy upChris Lattner2010-03-181-2/+2
| | | | llvm-svn: 98901
* Get rid of target-specific fp <-> int nodes when still I'm here.Anton Korobeynikov2010-03-186-79/+69
| | | | llvm-svn: 98889
* Get rid of target-specific nodes for fp16 <-> fp32 conversion.Anton Korobeynikov2010-03-184-21/+11
| | | | llvm-svn: 98888
* Refactor Reg-Reg copy emission routine for ARM. This makes cross-regclass ↵Anton Korobeynikov2010-03-181-29/+39
| | | | | | copies weirdness more straightforward. Also, add GPR <-> SPR copy support. llvm-svn: 98887
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