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* Fix quadratic behavior in InlineFunction by fetching the personality ↵Benjamin Kramer2011-12-021-29/+33
| | | | | | | | | | function of the callee once and not for every invoke in the caller. The callee is usually smaller than the caller, too. This reduces the compile time of ARMDisassembler.cpp by 32% (Release build). It still takes ages to compile though. llvm-svn: 145690
* Check for error after InstantiateMultclassDef.Jim Grosbach2011-12-021-0/+2
| | | | llvm-svn: 145689
* Add XOP feature flag.Jan Sjödin2011-12-023-2/+12
| | | | llvm-svn: 145682
* Reduce duplicate code in isHorizontalBinOp and add some asserts to protect ↵Craig Topper2011-12-021-32/+24
| | | | | | assumptions llvm-svn: 145681
* Add instruction selection support for horizontal add/sub of 256-bit floating ↵Craig Topper2011-12-021-2/+4
| | | | | | point vectors. Also add the test case for 256-bit integer vectors. llvm-svn: 145680
* remove unneeded FIXME commentHal Finkel2011-12-021-1/+0
| | | | llvm-svn: 145679
* make sure ScheduleDAGInstrs::EmitSchedule does not crash when the first ↵Hal Finkel2011-12-021-5/+5
| | | | | | instruction in Sequence is a Noop llvm-svn: 145677
* update PPC 940 hazard rec. to function in postRA modeHal Finkel2011-12-026-142/+93
| | | | llvm-svn: 145676
* Fix a few more places where TargetData/TargetLibraryInfo is not being passed.Chad Rosier2011-12-0211-37/+76
| | | | | | Add FIXMEs to places that are non-trivial to fix. llvm-svn: 145661
* ARM start parsing VLD1 single lane instructions.Jim Grosbach2011-12-022-14/+115
| | | | | | | The alias pseudos need cleaned up for size suffix handling, but this gets the basics working. Will be cleaning up and adding more. llvm-svn: 145655
* Abuse of mass replace isn't warranted even when the build is failing. ThanksChad Rosier2011-12-011-25/+29
| | | | | | for the suggestion, Eric. llvm-svn: 145643
* Fix build by not assuming TLI is guaranteed. Will have to track down cases whereChad Rosier2011-12-011-24/+23
| | | | | | TLI isn't being passed to ensure we don't miss opportunities to fold calls. llvm-svn: 145641
* Prevent library calls from being folded if -fno-builtin has been specified.Chad Rosier2011-12-011-23/+24
| | | | | | rdar://10500969 llvm-svn: 145639
* CodeGen: fix CMake buildDylan Noblesmith2011-12-011-0/+1
| | | | | | Missing file from r145629. llvm-svn: 145634
* ExecutionEngine: honor optimization levelDylan Noblesmith2011-12-013-8/+9
| | | | | | | | | | It was getting ignored after r144788. Also fix an accidental implicit cast from the OptLevel enum to an optional bool argument. MSVC warned on this, but gcc didn't. llvm-svn: 145633
* Last bit of TargetLibraryInfo propagation. Also fixed a case for TargetDataChad Rosier2011-12-017-39/+78
| | | | | | | where it appeared beneficial to pass. More of rdar://10500969 llvm-svn: 145630
* Add a deterministic finite automaton based packetizer for VLIW architecturesAnshuman Dasgupta2011-12-011-0/+98
| | | | llvm-svn: 145629
* Fix unreachable return & simplify some branches.David Blaikie2011-12-011-9/+5
| | | | llvm-svn: 145627
* Dummy commit to check commit access.Sanjoy Das2011-12-011-1/+1
| | | | llvm-svn: 145619
* Improved fix for abs(val) != 0 to check other similar case. Also fixed ↵Pete Cooper2011-12-011-6/+10
| | | | | | style issues and confusing comment llvm-svn: 145618
* [asan] two minor fixes: use UnreachableInst after the neverreturn function ↵Kostya Serebryany2011-12-011-2/+3
| | | | | | call; use report_fatal_error when blacklist file can not be found llvm-svn: 145611
* Add missing functions.Chad Rosier2011-12-011-1/+4
| | | | llvm-svn: 145608
* Autodetect bulldozers.Benjamin Kramer2011-12-011-0/+2
| | | | llvm-svn: 145607
* Add a few more functions to TargetLibraryInfo. More of rdar://10500969.Chad Rosier2011-12-011-1/+16
| | | | llvm-svn: 145596
* For 64-bit the rest of the general regs are ok for the q constraint. MakeEric Christopher2011-12-011-1/+17
| | | | | | | | sure we can emit both the high and low versions of those registers. Fixes rdar://10392864 llvm-svn: 145579
* Add some missing anchors.David Blaikie2011-12-013-0/+7
| | | | llvm-svn: 145578
* Pass AVX vectors which are arguments to varargs functions on the stack. ↵Eli Friedman2011-12-011-4/+9
| | | | | | <rdar://problem/10463281>. llvm-svn: 145573
* Added instcombine pattern to spot comparing -val or val against 0.Pete Cooper2011-12-011-0/+14
| | | | | | | | (val != 0) == (-val != 0) so "abs(val) != 0" becomes "val != 0" Fixes <rdar://problem/10482509> llvm-svn: 145563
* Propagate TargetLibraryInfo throughout ConstantFolding.cpp and Chad Rosier2011-12-0113-259/+394
| | | | | | | InstructionSimplify.cpp. Other fixups as needed. Part of rdar://10500969 llvm-svn: 145559
* Make use of "getScalarType()". No functionality change.Nick Lewycky2011-12-011-8/+3
| | | | llvm-svn: 145556
* Small fix for assembler generation on Darwin PPC64. Patch by Michael ↵Eli Friedman2011-12-011-1/+1
| | | | | | Kostylev. PR11437. llvm-svn: 145553
* make asan work at -O0, llvm part. Patch by glider@google.comKostya Serebryany2011-11-301-1/+1
| | | | llvm-svn: 145530
* Support for encoding all FMA4 instructions and tablegen patterns for allJan Sjödin2011-11-301-0/+349
| | | | | | remaining FMA4 instructions and intrinsics with tests. llvm-svn: 145525
* Make GlobalMerge honor the preferred alignment on globals without an ↵Eli Friedman2011-11-301-1/+1
| | | | | | | | explicitly specified alignment. <rdar://problem/10497732>. llvm-svn: 145523
* Remove unused variableMatt Beaumont-Gay2011-11-301-2/+0
| | | | llvm-svn: 145517
* ARM parsing for VLD1 all lanes, with writeback.Jim Grosbach2011-11-304-43/+82
| | | | llvm-svn: 145510
* Add a few functions to TargetLibraryInfo.Chad Rosier2011-11-301-2/+50
| | | | llvm-svn: 145508
* ARM parsing for VLD1 two register all lanes, no writeback.Jim Grosbach2011-11-305-5/+30
| | | | llvm-svn: 145504
* X86: Turns out bulldozer also supports sse42 and lzcnt.Benjamin Kramer2011-11-301-11/+6
| | | | | | | While at it remove the barcelona/instanbul/shanghai subtargets, they're unsupported by GCC and look pretty broken. llvm-svn: 145494
* X86: Add subtargets for AMD's bulldozer.Benjamin Kramer2011-11-301-0/+6
| | | | llvm-svn: 145493
* X86: PerformOrCombine introduced a vselect node with a wrong order of ↵Nadav Rotem2011-11-301-1/+1
| | | | | | operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479). llvm-svn: 145488
* Add instruction selection support for AVX2 horizontal add/sub instructions.Craig Topper2011-11-301-24/+49
| | | | llvm-svn: 145487
* Merge VPERM2F128/VPERM2I128 ISD node types.Craig Topper2011-11-304-71/+50
| | | | llvm-svn: 145485
* Merge decoding of VPERMILPD and VPERMILPS shuffle masks. Merge X86ISD node ↵Craig Topper2011-11-307-142/+135
| | | | | | type for VPERMILPD/PS. Add instruction selection support for VINSERTI128/VEXTRACTI128. llvm-svn: 145483
* LSR: handle the expansion of phi operands that use postinc forms of the IV.Andrew Trick2011-11-301-36/+68
| | | | | | Fixes PR11431: SCEVExpander::expandAddRecExprLiterally(const llvm::SCEVAddRecExpr*): Assertion `(!isa<Instruction>(Result) || SE.DT->dominates(cast<Instruction>(Result), Builder.GetInsertPoint())) && "postinc expansion does not dominate use"' failed. llvm-svn: 145482
* Whitespace.Chad Rosier2011-11-301-3/+1
| | | | llvm-svn: 145470
* Alphabetize TargetLibraryInfo enum and fix doxygen comments. No functionalChad Rosier2011-11-301-6/+6
| | | | | | change intended. llvm-svn: 145468
* ARM parsing aliases for VLD1 single register all lanes.Jim Grosbach2011-11-305-6/+141
| | | | llvm-svn: 145464
* Add support for sqrt, sqrtl, and sqrtf in TargetLibraryInfo. Disable Chad Rosier2011-11-293-3/+9
| | | | | | | | (fptrunc (sqrt (fpext x))) -> (sqrtf x) transformation if -fno-builtin is specified. rdar://10466410 llvm-svn: 145460
* Tidy up a bit.Jim Grosbach2011-11-292-33/+10
| | | | llvm-svn: 145458
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