summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* Create Thumb2 versions of STC/LDC, and reenable the relevant tests.Owen Anderson2011-09-072-0/+132
| | | | llvm-svn: 139256
* Thumb2 parsing and encoding for LDR(immediate).Jim Grosbach2011-09-072-42/+96
| | | | | | | | | The immediate offset of the non-writeback i8 form (encoding T4) allows negative offsets only. The positive offset form of the encoding is the LDRT instruction. Immediate offsets in the range [0,255] use encoding T3 instead. llvm-svn: 139254
* Thumb2 parsing and encoding for LDMDB.Jim Grosbach2011-09-071-0/+1
| | | | llvm-svn: 139251
* Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds ↵James Molloy2011-09-071-16/+23
| | | | | | predicate checking to the Disassembler. llvm-svn: 139250
* Cache intermediate results during traceSiblingValue.Jakob Stoklund Olesen2011-09-071-82/+221
| | | | | | | | | | | | | | In some cases such as interpreters using indirectbr, the CFG can be very complicated, and live range splitting may be forced to insert a large number of phi-defs. When that happens, traceSiblingValue can spend a lot of time zipping around in the CFG looking for defs and reloads. This patch causes more information to be cached in SibValues, and the cached values are used to terminate searches early. This speeds up spilling by 20x in one interpreter test case. For more typical code, this is just a 10% speedup of spilling. llvm-svn: 139247
* Fix atomic load and store on x86 to pass -verify-machineinstrs (and possibly ↵Eli Friedman2011-09-072-14/+38
| | | | | | | | fix some subtle bugs involving passes which check mayStore()). This isn't exactly ideal, but it is good enough for the moment. llvm-svn: 139245
* Thumb2 ldm/stm 'db' mnemonics don't have a '.w' suffix.Jim Grosbach2011-09-071-2/+2
| | | | | | | | There is no 16-bit wide encoding, so the .w suffix isn't needed (indeed, isn't documented as allowed). Also add the missing '!' token on the _UPD variant. llvm-svn: 139243
* Thumb2 parsing and encoding for LDMIA.Jim Grosbach2011-09-071-3/+51
| | | | | | | | Choose 32-bit vs. 16-bit encoding when there's no .w suffix in post-processing as match classes are insufficient to handle the context-sensitiveness of the writeback operand's legality for the 16-bit encodings. llvm-svn: 139242
* Port more assembler tests over to disassembler tests, and fix a minor logic ↵Owen Anderson2011-09-071-1/+1
| | | | | | error that exposed. llvm-svn: 139240
* Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= ↵James Molloy2011-09-0718-41/+70
| | | | | | handling to llvm-mc. Reviewed by Owen Anderson. llvm-svn: 139237
* Thumb2 use 'ldm' as default mnemonic.Jim Grosbach2011-09-071-2/+2
| | | | | | Handle explicit 'ia' suffix via a MnemonicAlias (pre-existing). llvm-svn: 139234
* Detect attempt to use segmented stacks on non ELF systems and errorRafael Espindola2011-09-071-0/+5
| | | | | | (not assert) early. llvm-svn: 139233
* Better diagnostic location information for mnemonic suffices.Jim Grosbach2011-09-071-2/+4
| | | | llvm-svn: 139232
* Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs ↵Eli Friedman2011-09-071-2/+17
| | | | | | | | failures for atomic laod/store on ARM. (The fix for the related failures on x86 is going to be nastier because we actually need Acquire memoperands attached to the atomic load instrs, etc.) llvm-svn: 139221
* While sinking machine instructions, sink matching DBG_VALUEs also otherwise ↵Devang Patel2011-09-071-0/+31
| | | | | | live debug variable pass will drop DBG_VALUEs on the floor. llvm-svn: 139208
* Reenable compact unwind by default. However, also emit the old version of unwindBill Wendling2011-09-061-8/+1
| | | | | | information for older linkers. llvm-svn: 139206
* memset_pattern16 uses a 16 BYTE pattern, not a 16 BIT pattern. Add comments ↵Owen Anderson2011-09-061-2/+4
| | | | | | to that effect. llvm-svn: 139205
* Teach BasicAA about the aliasing properties of memset_pattern16.Owen Anderson2011-09-061-1/+40
| | | | | | Fixes PR10872 and <rdar://problem/10065079>. llvm-svn: 139204
* ISB is HasDB, not just HasV7.Jim Grosbach2011-09-061-1/+1
| | | | llvm-svn: 139202
* Thumb2 parsing and encoding for ISB.Jim Grosbach2011-09-061-8/+7
| | | | llvm-svn: 139200
* Thumb2 parsing and encoding for DMB.Jim Grosbach2011-09-061-0/+4
| | | | llvm-svn: 139193
* Thumb2 parsing and encoding for DBG.Jim Grosbach2011-09-061-6/+4
| | | | llvm-svn: 139191
* Thumb2 parsing and encoding for CMN and CMP.Jim Grosbach2011-09-061-21/+44
| | | | llvm-svn: 139188
* This transform only handles two-operand AddRec's. Prevent it from trying toNick Lewycky2011-09-061-13/+23
| | | | | | handle anything more complex. Fixes PR10383 again! llvm-svn: 139186
* Add mayLoad/mayStore markings to ARM 64-bit atomic pseudo-instructions.Eli Friedman2011-09-061-1/+1
| | | | llvm-svn: 139179
* Thumb2 parsing and encoding for CLREX.Jim Grosbach2011-09-062-5/+3
| | | | llvm-svn: 139172
* Add -verify-indvars for imperfect SCEV trip count verification after indvars.Andrew Trick2011-09-061-1/+9
| | | | llvm-svn: 139169
* Fix comment. Noticed by Duncan.Rafael Espindola2011-09-061-1/+1
| | | | llvm-svn: 139161
* Add codegen support for vector select (in the IR this means a selectDuncan Sands2011-09-0632-119/+190
| | | | | | | | | | | | with a vector condition); such selects become VSELECT codegen nodes. This patch also removes VSETCC codegen nodes, unifying them with SETCC nodes (codegen was actually often using SETCC for vector SETCC already). This ensures that various DAG combiner optimizations kick in for vector comparisons. Passes dragonegg bootstrap with no testsuite regressions (nightly testsuite as well as "make check-all"). Patch mostly by Nadav Rotem. llvm-svn: 139159
* Fix fall outs from my recent change on how carry bit is modeled during isel.Evan Cheng2011-09-063-33/+36
| | | | | | | | Now the 'S' instructions, e.g. ADDS, treat S bit as optional operand as well. Also fix isel hook to correctly set the optional operand. rdar://10073745 llvm-svn: 139157
* Use IRBuilder.Devang Patel2011-09-061-17/+14
| | | | llvm-svn: 139156
* ARM .code directive should always go to the streamer.Jim Grosbach2011-09-061-6/+4
| | | | | | | | | | Even if there's no mode switch performed, the .code directive should still be sent to the output streamer. Otherwise, for example, an output asm stream is not equivalent to the input stream which generated it (a dependency on the input target triple arm vs. thumb is introduced which was not originally there). llvm-svn: 139155
* Fix style issues and typos found by Duncan.Rafael Espindola2011-09-061-3/+3
| | | | llvm-svn: 139154
* As a first step, emit both the compact unwind and CIE/FDEs for a function.Bill Wendling2011-09-061-13/+7
| | | | llvm-svn: 139152
* Try again at r138809 (make DSE more aggressive in removing dead stores at ↵Owen Anderson2011-09-061-79/+80
| | | | | | the end of a function), now with less deleting stores before memcpy's. llvm-svn: 139150
* Atomic pseudos don't use (as in read) CPSR. They clobber it.Jakob Stoklund Olesen2011-09-061-2/+2
| | | | llvm-svn: 139148
* Now, named mdnode llvm.dbg.cu keeps track of all compile units in a module. ↵Devang Patel2011-09-061-6/+12
| | | | | | Update DebugInfoFinder to collect compile units from llvm.dbg.cu. llvm-svn: 139147
* Split the init.trampoline intrinsic, which currently combines GCC'sDuncan Sands2011-09-0612-46/+191
| | | | | | | | | | | | | | | | | | | | init.trampoline and adjust.trampoline intrinsics, into two intrinsics like in GCC. While having one combined intrinsic is tempting, it is not natural because typically the trampoline initialization needs to be done in one function, and the result of adjust trampoline is needed in a different (nested) function. To get around this llvm-gcc hacks the nested function lowering code to insert an additional parent variable holding the adjust.trampoline result that can be accessed from the child function. Dragonegg doesn't have the luxury of tweaking GCC code, so it stored the result of adjust.trampoline in the memory GCC set aside for the trampoline itself (this is always available in the child function), and set up some new memory (using an alloca) to hold the trampoline. Unfortunately this breaks Go which allocates trampoline memory on the heap and wants to use it even after the parent has exited (!). Rather than doing even more hacks to get Go working, it seemed best to just use two intrinsics like in GCC. Patch mostly by Sanjoy Das. llvm-svn: 139140
* Fix typo in comment again.Nick Lewycky2011-09-061-1/+1
| | | | llvm-svn: 139139
* Apparently we compile the code, not the comments. Thanks Eli!Nick Lewycky2011-09-061-2/+1
| | | | llvm-svn: 139138
* Fix typo in comment.Nick Lewycky2011-09-061-1/+1
| | | | llvm-svn: 139137
* Nope! I had it right the first time. Revert the operative part of r139135 andNick Lewycky2011-09-061-5/+8
| | | | | | add more showing of my work. llvm-svn: 139136
* Fix flipped sign. While there, show my math.Nick Lewycky2011-09-061-2/+9
| | | | llvm-svn: 139135
* No no no, fix typo properly!Nick Lewycky2011-09-061-2/+2
| | | | llvm-svn: 139134
* The logic inside getMulExpr to simplify {a,+,b}*{c,+,d} was wrong, which wasNick Lewycky2011-09-061-13/+20
| | | | | | | visible given a=b=c=d=1, on iteration #1 (the second iteration). Replace it with correct math. Fixes PR10383! llvm-svn: 139133
* Revert r139126 due to selfhost failures reported by buildbots.Nick Lewycky2011-09-061-6/+2
| | | | llvm-svn: 139130
* Teach SCEV to report a max backedge count in one interesting case inNick Lewycky2011-09-051-2/+6
| | | | | | HowFarToZero; the case for a canonical loop. llvm-svn: 139126
* Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certainNick Lewycky2011-09-0510-3/+55
| | | | | | | instructions are more aligned than the CPU requires, and adds some additional directives, to follow in future patches. Patch by David Meyer! llvm-svn: 139125
* Update the C++ backend to use the new ArrayRef'ified APIs. Patch by arrowdodger!Nick Lewycky2011-09-051-4/+3
| | | | llvm-svn: 139124
* Fix typo in comment.Nick Lewycky2011-09-051-1/+1
| | | | llvm-svn: 139122
OpenPOWER on IntegriCloud