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* Mips relocation R_MIPS_64 relocates a 64 bit double word.Jack Carter2012-08-072-0/+4
| | | | | | | | I hit this in a very large program (spirit.cpp), but have not figured out how to make a small make check test for it. llvm-svn: 161366
* The Mips64InstrInfo.td definitions DynAlloc64 LEA_ADDiu64 Jack Carter2012-08-062-14/+10
| | | | | | | | | | were using a class defined for 32 bit instructions and thus the instruction was for addiu instead of daddiu. This was corrected by adding the instruction opcode as a field in the base class to be filled in by the defs. llvm-svn: 161359
* Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST.Jack Carter2012-08-064-2/+30
| | | | | | | | | | | | | | These 2 relocations gain access to the highest and the second highest 16 bits of a 64 bit object. R_MIPS_HIGHER %higher(A+S) The %higher(x) function is [ (((long long) x + 0x80008000LL) >> 32) & 0xffff ]. R_MIPS_HIGHEST %highest(A+S) The %highest(x) function is [ (((long long) x + 0x800080008000LL) >> 48) & 0xffff ]. llvm-svn: 161348
* MFTB on PPC64 should really be encoded using MFSPR.Hal Finkel2012-08-061-2/+2
| | | | | | | | | | | The MFTB instruction itself is being phased out, and its functionality is provided by MFSPR. According to the ISA docs, using MFSPR works on all known chips except for the 601 (which did not have a timebase register anyway) and the POWER3. Thanks to Adhemerval Zanella for pointing this out! llvm-svn: 161346
* Add support for the OpenBSD for Bitrig.Eric Christopher2012-08-065-9/+14
| | | | | | Patch by David Hill. llvm-svn: 161344
* Remove empty overrides of processFunctionBeforeFrameFinalized().Roman Divacky2012-08-063-10/+0
| | | | llvm-svn: 161328
* Implement proper handling for pcmpistri/pcmpestri intrinsics. Requires ↵Craig Topper2012-08-065-55/+187
| | | | | | custom handling in DAGISelToDAG due to limitations in TableGen's implicit def handling. Fixes PR11305. llvm-svn: 161318
* Remove custom inserter for MWAIT. It doesn't do anything that couldn't be ↵Craig Topper2012-08-052-24/+2
| | | | | | represented in a pattern. llvm-svn: 161306
* Use a COPY node instead of an explicit MOVA opcode in the custom insterter ↵Craig Topper2012-08-051-2/+1
| | | | | | for pcmpestrm/pcmpistrm. Allows the register allocator to handle it better and prevent wasted identity moves. llvm-svn: 161305
* Add readcyclecounter lowering on PPC64.Hal Finkel2012-08-042-1/+8
| | | | | | | | On PPC64, this can be done with a simple TableGen pattern. To enable this, I've added the (otherwise missing) readcyclecounter SDNode definition to TargetSelectionDAG.td. llvm-svn: 161302
* Skip impdef regs during eabi save/restore list emission to workaround PR11902Anton Korobeynikov2012-08-041-2/+8
| | | | llvm-svn: 161301
* Recognize vst1.64 / vld1.64 with 3 and 4 regs as load from / store to stack ↵Anton Korobeynikov2012-08-041-0/+4
| | | | | | | | | stuff (this corresponds by spilling/reloading regs in DTriple / DQuad reg classes). No testcase, found by inspection. llvm-svn: 161300
* Add stack spill / reload instructions for DTriple and DQuad register ↵Anton Korobeynikov2012-08-041-3/+43
| | | | | | | | classes, which were missed for no reason. This fixes PR13377 llvm-svn: 161299
* Postpone the deletion of the old name in StructType::setName to allow using ↵Benjamin Kramer2012-08-041-10/+20
| | | | | | | | a slice of the old name. Fixes PR13522. Add a rudimentary unit test to exercise the behavior. llvm-svn: 161296
* Delete a dead variable.Jakob Stoklund Olesen2012-08-041-12/+0
| | | | | | TwoAddressInstructionPass doesn't remat any more. llvm-svn: 161285
* TwoAddressInstructionPass refactoring: Extract another method.Jakob Stoklund Olesen2012-08-031-121/+134
| | | | llvm-svn: 161284
* Refactor and check "onlyReadsMemory" before optimizing builtins.Bob Wilson2012-08-032-83/+30
| | | | | | | | | This patch is mostly just refactoring a bunch of copy-and-pasted code, but it also adds a check that the call instructions are readnone or readonly. That check was already present for sin, cos, sqrt, log2, and exp2 calls, but it was missing for the rest of the builtins being handled in this code. llvm-svn: 161282
* TwoAddressInstructionPass refactoring: Extract a method.Jakob Stoklund Olesen2012-08-031-48/+60
| | | | | | | No functional change intended, except replacing a DenseMap with a SmallDenseMap which should behave identically. llvm-svn: 161281
* Begin adding support for updating LiveIntervals in TwoAddressInstructionPass.Jakob Stoklund Olesen2012-08-031-0/+23
| | | | | | | This is far from complete, and only changes behavior when the -early-live-intervals flag is passed to llc. llvm-svn: 161273
* 1. Redo mips16 instructions to avoid multiple opcodes for same instruction.Akira Hatanaka2012-08-032-54/+269
| | | | | | | | | Change these to patterns. 2. Add another 16 instructions. Patch by Reed Kotler. llvm-svn: 161272
* Add an experimental -early-live-intervals option.Jakob Stoklund Olesen2012-08-032-0/+10
| | | | | | | | | | This option runs LiveIntervals before TwoAddressInstructionPass which will eventually learn to exploit and update the analysis. Eventually, LiveIntervals will run before PHIElimination, and we can get rid of LiveVariables. llvm-svn: 161270
* Delete merged physreg copies in joinReservedPhysReg().Jakob Stoklund Olesen2012-08-031-0/+5
| | | | | | | Previously, the identity copy would survive through register allocation before it was removed by the rewriter. llvm-svn: 161269
* Try to reduce the compile time impact of r161232.Bob Wilson2012-08-032-43/+59
| | | | | | | | | | | | The previous change caused fast isel to not attempt handling any calls to builtin functions. That included things like "printf" and caused some noticable regressions in compile time. I wanted to avoid having fast isel keep a separate list of functions that had to be kept in sync with what the code in SelectionDAGBuilder.cpp was handling. I've resolved that here by moving the list into TargetLibraryInfo. This is somewhat redundant in SelectionDAGBuilder but it will ensure that we keep things consistent. llvm-svn: 161263
* Fix memcmp code-gen to honor -fno-builtin.Bob Wilson2012-08-031-1/+1
| | | | | | | | | I noticed that SelectionDAGBuilder::visitCall was missing a check for memcmp in TargetLibraryInfo, so that it would use custom code for memcmp calls even with -fno-builtin. I also had to add a new -disable-simplify-libcalls option to llc so that I could write a test for this. llvm-svn: 161262
* Completely eliminate VNInfo flags.Jakob Stoklund Olesen2012-08-032-5/+2
| | | | | | | | The 'unused' state of a value number can be represented as an invalid def SlotIndex. This also exposed code that shouldn't have been looking at unused value VNInfos. llvm-svn: 161258
* Fix a couple of loops that were processing unused value numbers.Jakob Stoklund Olesen2012-08-031-1/+5
| | | | | | | Unused VNInfos should be left alone. Their def SlotIndex doesn't point to anything. llvm-svn: 161257
* Silence unused variable warning in -asserts buildMatt Beaumont-Gay2012-08-031-0/+1
| | | | llvm-svn: 161256
* Eliminate the VNInfo::hasPHIKill() flag.Jakob Stoklund Olesen2012-08-034-32/+2
| | | | | | | | | | The only real user of the flag was removeCopyByCommutingDef(), and it has been switched to LiveIntervals::hasPHIKill(). All the code changed by this patch was only concerned with computing and propagating the flag. llvm-svn: 161255
* Make the hasPHIKills flag a computed property.Jakob Stoklund Olesen2012-08-032-4/+25
| | | | | | | | | | | | | The VNInfo::HAS_PHI_KILL is only half supported. We precompute it in LiveIntervalAnalysis, but it isn't properly updated by live range splitting and functions like shrinkToUses(). It is only used in one place: RegisterCoalescer::removeCopyByCommutingDef(). This patch changes that function to use a new LiveIntervals::hasPHIKill() function that computes the flag for a given value number. llvm-svn: 161254
* Delete dead function.Jakob Stoklund Olesen2012-08-031-28/+0
| | | | llvm-svn: 161242
* Don't delete dead code in TwoAddressInstructionPass.Jakob Stoklund Olesen2012-08-031-104/+0
| | | | | | | This functionality was added before we started running DeadMachineInstructionElim on all targets. It serves no purpose now. llvm-svn: 161241
* allow 'make CPPFLAGS=<something>' work againGabor Greif2012-08-031-1/+1
| | | | | | | | this makes this hack a bit more bearable for poor souls who need to pass custom preprocessor flags to the build process llvm-svn: 161240
* Fall back to selection DAG isel for calls to builtin functions.Bob Wilson2012-08-038-18/+44
| | | | | | | | | | Fast isel doesn't currently have support for translating builtin function calls to target instructions. For embedded environments where the library functions are not available, this is a matter of correctness and not just optimization. Most of this patch is just arranging to make the TargetLibraryInfo available in fast isel. <rdar://problem/12008746> llvm-svn: 161232
* Add new getLibFunc method to TargetLibraryInfo.Bob Wilson2012-08-031-37/+56
| | | | | | | | This just provides a way to look up a LibFunc::Func enum value for a function name. Alphabetize the enums and function names so we can use a binary search. llvm-svn: 161231
* [arm-fast-isel] Add support for shl, lshr, and ashr.Jush Lu2012-08-031-0/+62
| | | | llvm-svn: 161230
* Move the "findUsedStructTypes" functionality outside of the Module class.Bill Wendling2012-08-036-148/+160
| | | | | | | | | The "findUsedStructTypes" method is very expensive to run. It needs to be optimized so that LTO can run faster. Splitting this method out of the Module class will help this occur. For instance, it can keep a list of seen objects so that it doesn't process them over and over again. llvm-svn: 161228
* Add support for the ARM GHC calling convention, this patch was in 3.0,Eric Christopher2012-08-035-0/+54
| | | | | | | | but somehow managed to be dropped later. Patch by Karel Gardas. llvm-svn: 161226
* ARM: Tidy up. Remove unused template parameters.Jim Grosbach2012-08-021-20/+16
| | | | llvm-svn: 161222
* ARM: More InstAlias refactors to use #NAME#.Jim Grosbach2012-08-021-42/+27
| | | | llvm-svn: 161220
* ARM: Refactor instaliases using TableGen support for #NAME#.Jim Grosbach2012-08-021-31/+23
| | | | | | | | Now that TableGen supports references to NAME w/o it being explicitly referenced in the definition's own name, use that to simplify assembly InstAlias definitions in multiclasses. llvm-svn: 161218
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-022-15/+20
| | | | | | | | | | Add more comments and use early returns to reduce nesting in isLoadFoldable. Also disable folding for V_SET0 to avoid introducing a const pool entry and a const pool load. rdar://10554090 and rdar://11873276 llvm-svn: 161207
* TableGen: Allow use of #NAME# outside of 'def' names.Jim Grosbach2012-08-021-11/+21
| | | | | | | | | | | | | | | | | | | | | Previously, def NAME values were only populated, and references to NAME resolved, when NAME was referenced in the 'def' entry of the multiclass sub-entry. e.g., multiclass foo<...> { def prefix_#NAME : ... } It's useful, however, to be able to reference NAME even when the default def name is used. For example, when a multiclass has 'def : Pat<...>' or 'def : InstAlias<...>' entries which refer to earlier instruction definitions in the same multiclass. e.g., multiclass myMulti<RegisterClass rc> { def _r : myI<(outs rc:$d), (ins rc:$r), "r $d, $r", []>; def : InstAlias<\"wilma $r\", (!cast<Instruction>(NAME#\"_r\") rc:$r, rc:$r)>; } llvm-svn: 161198
* Compute the critical path length through a trace.Jakob Stoklund Olesen2012-08-022-5/+75
| | | | | | | | | | | Whenever both instruction depths and instruction heights are known in a block, it is possible to compute the length of the critical path as max(depth+height) over the instructions in the block. The stored live-in lists make it possible to accurately compute the length of a critical path that bypasses the current (small) block. llvm-svn: 161197
* Move the code that creates instances of MipsInstrInfo and MipsFrameLowering outAkira Hatanaka2012-08-029-29/+51
| | | | | | of MipsTargetMachine.cpp. llvm-svn: 161191
* Set transient stack alignment in constructor of MipsFrameLowering and re-enableAkira Hatanaka2012-08-021-3/+2
| | | | | | test o32_cc_vararg.ll. llvm-svn: 161189
* Verify regunit intervals along with virtreg intervals.Jakob Stoklund Olesen2012-08-021-2/+12
| | | | | | | Don't cause regunit intervals to be computed just to verify them. Only check the already cached intervals. llvm-svn: 161183
* Avoid creating dangling physreg live ranges during DCE.Jakob Stoklund Olesen2012-08-021-6/+30
| | | | | | | | | | | | | | | | | | | | | | | | | LiveRangeEdit::eliminateDeadDefs() can delete a dead instruction that reads unreserved physregs. This would leave the corresponding regunit live interval dangling because we don't have shrinkToUses() for physical registers. Fix this problem by turning the instruction into a KILL instead of deleting it. This happens in a landing pad in test/CodeGen/X86/2012-05-19-CoalescerCrash.ll: %vreg27<def,dead> = COPY %EDX<kill>; GR32:%vreg27 becomes: KILL %EDX<kill> An upcoming fix to the machine verifier will catch problems like this by verifying regunit live intervals. This fixes PR13498. I am not including the test case from the PR since we already have one exposing the problem once the verifier is fixed. llvm-svn: 161182
* Add report() functions that take a LiveInterval argument.Jakob Stoklund Olesen2012-08-021-60/+67
| | | | llvm-svn: 161178
* Implement the block_iterator of Region based on df_iterator.Hongbin Zheng2012-08-021-16/+0
| | | | llvm-svn: 161177
* JIT::runFunction(): add a fast path for functions with a single argument ↵Nuno Lopes2012-08-021-2/+7
| | | | | | that is a pointer. llvm-svn: 161171
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