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* A slight reworking of the custom patterns for x86-64 tpoff codegen andEric Christopher2010-07-081-9/+11
| | | | | | | | correct the testcase for valid assembly. Needs more tests. llvm-svn: 107860
* r107852 is only safe with -enable-unsafe-fp-math to account for +0.0 == -0.0.Evan Cheng2010-07-081-3/+5
| | | | llvm-svn: 107856
* Add TargetInstrInfo::copyPhysReg hook and use it from LowerSubregs.Jakob Stoklund Olesen2010-07-082-36/+25
| | | | | | | | | This target hook is intended to replace copyRegToReg entirely, but for now it calls copyRegToReg. Any remaining calls to copyRegToReg wil be replaced by COPY instructions. llvm-svn: 107854
* Optimize some vfp comparisons to integer ones. This patch implements the ↵Evan Cheng2010-07-082-10/+48
| | | | | | | | | | | | | | | | | | | | | | | | simplest case when the following conditions are met: 1. The arguments are f32. 2. The arguments are loads and they have no uses other than the comparison. 3. The comparison code is EQ or NE. e.g. vldr.32 s0, [r1] vldr.32 s1, [r0] vcmpe.f32 s1, s0 vmrs apsr_nzcv, fpscr beq LBB0_2 => ldr r1, [r1] ldr r0, [r0] cmp r0, r1 beq LBB0_2 More complicated cases will be implemented in subsequent patches. llvm-svn: 107852
* Changes to ARM tail calls, mostly cosmetic.Dale Johannesen2010-07-083-8/+20
| | | | | | | | | Add explicit testcases for tail calls within the same module. Duplicate some code to humor those who think .w doesn't apply on ARM. Leave this disabled on Thumb1, and add some comments explaining why it's hard and won't gain much. llvm-svn: 107851
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-0813-499/+331
| | | | | | Debug info intrinsics win for now. llvm-svn: 107850
* When processing frame index virtual registers, consider all available registersJim Grosbach2010-07-082-3/+23
| | | | | | | | (if there are any) and use the one which remains available for the longest rather than just using the first one. This should help enable better re-use of the loaded frame index values. rdar://7318760 llvm-svn: 107847
* Fix the second half of PR7437: scalarrepl wasn't preservingChris Lattner2010-07-081-21/+9
| | | | | | address spaces when SRoA'ing memcpy's. llvm-svn: 107846
* Don't forward-declare registers for static allocas, which we'llDan Gohman2010-07-071-1/+3
| | | | | | | prefer to materialize as local constants. This fixes the clang bootstrap abort. llvm-svn: 107840
* Fix -fast-isel-abort to check the right instruction.Dan Gohman2010-07-071-1/+1
| | | | llvm-svn: 107839
* use PrintEscapedString to handle attribute section with escapes in it,Chris Lattner2010-07-071-6/+11
| | | | | | | PR7399. The asm parser already handles this. This is of dubious utility (see the PR) but the asmprinter was clearly broken here. llvm-svn: 107834
* fix copies to/from GR8_ABCD_H even moreJakob Stoklund Olesen2010-07-071-1/+3
| | | | llvm-svn: 107832
* grammarJim Grosbach2010-07-071-1/+1
| | | | llvm-svn: 107831
* Handle cases where the post-RA scheduler may move instructions between theJim Grosbach2010-07-071-6/+21
| | | | | | | | | address calculation instructions leading up to a jump table when we're trying to convert them into a TB[H] instruction in Thumb2. This realistically shouldn't happen much, if at all, for well formed inputs, but it's more correct to handle it. rdar://7387682 llvm-svn: 107830
* finish up support for callw: PR7195Chris Lattner2010-07-072-1/+3
| | | | llvm-svn: 107826
* Implement the major chunk of PR7195: support for 'callw'Chris Lattner2010-07-076-11/+36
| | | | | | | in the integrated assembler. Still some discussion to be done. llvm-svn: 107825
* Add more assembly opcodes for SSE compare instructionsBruno Cardoso Lopes2010-07-071-8/+32
| | | | llvm-svn: 107823
* One MDNode may be used to create regular DIE as well as abstract DIE.Devang Patel2010-07-072-1/+17
| | | | | | Keep track of abstract subprogram DIEs. llvm-svn: 107822
* Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument ↵Evan Cheng2010-07-0712-79/+81
| | | | | | for consistency sake. llvm-svn: 107820
* Print undefined/unknown debug value as "undef".Devang Patel2010-07-071-1/+6
| | | | llvm-svn: 107818
* Not all custom inserters create new basic blocks. If the inserterDan Gohman2010-07-071-2/+5
| | | | | | didn't create a new block, don't reset the insert position. llvm-svn: 107813
* grammar and trailing whitespaceJim Grosbach2010-07-071-6/+6
| | | | llvm-svn: 107811
* Rename couple of maps.Devang Patel2010-07-071-11/+9
| | | | llvm-svn: 107810
* Allow copies between GR8_ABCD_L and GR8_ABCD_H.Jakob Stoklund Olesen2010-07-071-0/+3
| | | | | | This fixes PR7540. llvm-svn: 107809
* 80 cols.Devang Patel2010-07-071-12/+21
| | | | llvm-svn: 107807
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-076-99/+142
| | | | | | a separate DCE pass over MachineInstrs. llvm-svn: 107804
* Add X86FastISel support for return statements. This entails refactoringDan Gohman2010-07-078-91/+152
| | | | | | | a bunch of stuff, to allow the target-independent calling convention logic to be employed. llvm-svn: 107800
* Add AVX AES instructionsBruno Cardoso Lopes2010-07-071-26/+70
| | | | llvm-svn: 107798
* Update the insert position after scheduling, which may change theDan Gohman2010-07-071-0/+1
| | | | | | | position when emitting multiple blocks when executing a custom inserter. llvm-svn: 107797
* Update comment.Devang Patel2010-07-071-3/+4
| | | | llvm-svn: 107796
* Fix debugging strings.Dan Gohman2010-07-071-2/+2
| | | | llvm-svn: 107795
* Give FunctionLoweringInfo an MBB member, avoiding the need to pass itDan Gohman2010-07-073-166/+224
| | | | | | | | around everywhere, and also give it an InsertPt member, to enable isel to operate at an arbitrary position within a block, rather than just appending to a block. llvm-svn: 107791
* Simplify FastISel's constructor by giving it a FunctionLoweringInfoDan Gohman2010-07-075-118/+46
| | | | | | | | | instance, rather than pointers to all of FunctionLoweringInfo's members. This eliminates an NDEBUG ABI sensitivity. llvm-svn: 107789
* Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This willDan Gohman2010-07-075-148/+4
| | | | | | allow target-specific fast-isel code to make use of it directly. llvm-svn: 107787
* Split the SDValue out of OutputArg so that SelectionDAG-independentDan Gohman2010-07-0728-94/+137
| | | | | | code can do calling-convention queries. This obviates OutputArgReg. llvm-svn: 107786
* add some triple for minix, patch by Kees van Reeuwijk from PR7582Chris Lattner2010-07-073-3/+6
| | | | llvm-svn: 107785
* Move CallingConvLower.cpp out of the SelectionDAG directory.Dan Gohman2010-07-073-1/+1
| | | | llvm-svn: 107781
* Fix more places assuming subregisters have live intervalsJakob Stoklund Olesen2010-07-071-1/+6
| | | | llvm-svn: 107780
* Add a getFirstNonPHI utility function.Dan Gohman2010-07-071-0/+7
| | | | llvm-svn: 107778
* Minore code simplification.Dan Gohman2010-07-071-17/+15
| | | | llvm-svn: 107777
* Remove interprocedural-basic-aa and associated code. The AliasAnalysisDan Gohman2010-07-073-183/+58
| | | | | | | | | | | interface needs implementations to be consistent, so any code which wants to support different semantics must use a different interface. It's not currently worthwhile to add a new interface for this new concept. Document that AliasAnalysis doesn't support cross-function queries. llvm-svn: 107776
* conditionalize by CallInst::ArgOffsetGabor Greif2010-07-071-2/+2
| | | | llvm-svn: 107767
* Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts"Duncan Sands2010-07-071-1/+1
| | | | | | | | | | | | | builds to "Release". The default build is unchanged (optimization on, assertions on), however it is now called Release+Asserts. The intent is that future LLVM releases released via llvm.org will be Release builds in the new sense, i.e. will have assertions disabled (currently they have assertions enabled, for a more than 20% slowdown). This will bring them in line with MacOS releases, which ship with assertions disabled. It also means that "Release" now means the same things in make and cmake builds: cmake already disables assertions for "Release" builds AFAICS. llvm-svn: 107758
* Add AVX SSE4.2 instructionsBruno Cardoso Lopes2010-07-071-114/+179
| | | | llvm-svn: 107752
* Use only one multiclass to pinsrq instructionsBruno Cardoso Lopes2010-07-072-38/+20
| | | | llvm-svn: 107750
* Now that almost all SSE4.1 AVX instructions are added, move code around to ↵Bruno Cardoso Lopes2010-07-072-361/+374
| | | | | | more appropriate sections. No functionality changes llvm-svn: 107749
* Add AVX SSE4.1 insertps, ptest and movntdqa instructionsBruno Cardoso Lopes2010-07-071-18/+39
| | | | llvm-svn: 107747
* Add AVX SSE4.1 extractps and pinsr instructionsBruno Cardoso Lopes2010-07-071-35/+67
| | | | llvm-svn: 107746
* Revert "Remove references to INSERT_SUBREG after de-SSA" r107725.Jakob Stoklund Olesen2010-07-077-9/+136
| | | | | | Buildbot breakage. llvm-svn: 107744
* Also use REG_SEQUENCE for VTBX instructions.Bob Wilson2010-07-072-24/+30
| | | | llvm-svn: 107743
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