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* InstrProf: Make CoverageMapping testable and add a basic unit testJustin Bogner2015-02-181-1/+1
| | | | | | | | Make CoverageMapping easier to create, so that we can write targeted unit tests for its internals, and add a some infrastructure to write these tests. Finally, add a simple unit test for basic functionality. llvm-svn: 229709
* [mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generatorJozef Kolek2015-02-182-3/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D7609 llvm-svn: 229706
* [mips][microMIPS] Implement JALX instructionJozef Kolek2015-02-182-2/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D5047 llvm-svn: 229702
* [mips] Add backend support for Mips32r[35] and Mips64r[35].Daniel Sanders2015-02-187-9/+124
| | | | | | | | | | | | | | | | | Summary: These ISA's didn't add any instructions so they are almost identical to Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA revision in .MIPS.abiflags is 3 or 5 respectively instead of 2. Reviewers: vmedic Reviewed By: vmedic Subscribers: tomatabacu, llvm-commits, atanasyan Differential Revision: http://reviews.llvm.org/D7381 llvm-svn: 229695
* This patch adds the VSX logical instructions introduced in the Power ISA ↵Kit Barton2015-02-182-2/+25
| | | | | | | | | | 2.07. It also removes the added complexity that favors VMX versions of the three instructions. Phabricator review: http://reviews.llvm.org/D7616 Commiting on Nemanja's behalf. llvm-svn: 229694
* R600/SI: Don't set isCodeGenOnly = 1 on all instructionsTom Stellard2015-02-184-5/+19
| | | | | | | We only need to set this on pseudo instructions which won't be used by the assembler. llvm-svn: 229689
* R600/SI: Add missing VOP1 instructionsTom Stellard2015-02-182-5/+18
| | | | llvm-svn: 229688
* R600/SI: Add missing VOP2 instructionsTom Stellard2015-02-181-2/+9
| | | | llvm-svn: 229687
* R600/SI: Add definition for S_CBRANCH_G_FORKTom Stellard2015-02-182-1/+13
| | | | llvm-svn: 229686
* R600/SI: Add missing SOP1 instructionsTom Stellard2015-02-182-12/+27
| | | | llvm-svn: 229685
* R600/SI: Refactor SOP2 definitionsTom Stellard2015-02-181-25/+17
| | | | llvm-svn: 229684
* [mips] Avoid redundant sign extension of the result of binary bitwise ↵Vasileios Kalintiris2015-02-181-0/+8
| | | | | | | | | | | | instructions. Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7581 llvm-svn: 229675
* X86: Use bitset to manage a bag of bits. NFC.Benjamin Kramer2015-02-181-7/+3
| | | | | | | Doesn't matter in terms of memory usage or perf here, but it's a neat simplification. llvm-svn: 229672
* [mips] [IAS] Fix using .cpsetup with local labels (PR22518).Toma Tabacu2015-02-182-7/+16
| | | | | | | | | | | | | | | | | Summary: Parse for an MCExpr instead of an Identifier and use the symbol for relocations, not just the symbol's name. This fixes errors when using local labels in .cpsetup (PR22518). Reviewers: dsanders Reviewed By: dsanders Subscribers: seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D7697 llvm-svn: 229671
* [x86] Tighten the assertions to document that canonicalization hasChandler Carruth2015-02-181-4/+5
| | | | | | | actually removed all but a *very* small number of choices for v2i64. Also remove dead code handling cases that simply cannot arise. llvm-svn: 229670
* [x86] Switch an if which is trivially true to an assert. NFCChandler Carruth2015-02-181-14/+14
| | | | llvm-svn: 229669
* [x86] Remove some more 'bit' nomenclature from the generic shiftChandler Carruth2015-02-181-3/+3
| | | | | | lowering. llvm-svn: 229668
* [MSan][MIPS] VarArgHelper for MIPS64Mohit K. Bhakkad2015-02-181-0/+104
| | | | | | | | | | Reviewers: Reviewers: eugenis, kcc, samsonov, petarj Subscribers: dsanders, sagar, llvm-commits Differential Revision: http://reviews.llvm.org/D7182 llvm-svn: 229667
* [x86] Fold together the two shift lowering strategies. They were doingChandler Carruth2015-02-181-150/+68
| | | | | | | | | quite literally the same work, we just need to special case the >64-bit element shift code emission to emit the byte shift instructions and offsets. This also makes reasoning about each of the vector lowering strategies easier as we don't have to remember to use both forms. llvm-svn: 229662
* [ARM] Add missing M/R class CPUsBradley Smith2015-02-181-0/+16
| | | | | | | | | | | | Add some of the missing M and R class Cortex CPUs, namely: Cortex-M0+ (called Cortex-M0plus for GCC compatibility) Cortex-M1 SC000 SC300 Cortex-R5 llvm-svn: 229660
* Fixes two issue in SimplifyDemandedBits of sext_in_reg:Michael Kuperstein2015-02-181-11/+18
| | | | | | | | | | | 1) We should not try to simplify if the sext has multiple uses 2) There is no need to simplify is the source value is already sign-extended. Patch by Gil Rapaport <gil.rapaport@intel.com> Differential Revision: http://reviews.llvm.org/D6949 llvm-svn: 229659
* [SystemZ] Clean up warningUlrich Weigand2015-02-181-4/+1
| | | | | | | | | | Removed (unreachable) default case in switch to clean up warning: lib/Target/SystemZ/SystemZISelLowering.cpp:1974:5: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default] llvm-svn: 229658
* [x86] Refactor the bit shift code the same as I just did the byte shiftChandler Carruth2015-02-181-24/+22
| | | | | | | | | | | | | code. While this didn't have the miscompile (it used MatchLeft consistently) it missed some cases where it could use right shifts. I've added a test case Craig Topper came up with to exercise the right shift matching. This code is really identical between the two. I'm going to merge them next so that we don't keep two copies of all of this logic. llvm-svn: 229655
* [SystemZ] Support all TLS access models - CodeGen partUlrich Weigand2015-02-1814-16/+362
| | | | | | | | | | | | | | | | | | | | | | The current SystemZ back-end only supports the local-exec TLS access model. This patch adds all required CodeGen support for the other TLS models, which means in particular: - Expand initial-exec TLS accesses by loading TLS offsets from the GOT using @indntpoff relocations. - Expand general-dynamic and local-dynamic accesses by generating the appropriate calls to __tls_get_offset. Note that this routine has a non-standard ABI and requires loading the GOT pointer into %r12, so the patch also adds support for the GLOBAL_OFFSET_TABLE ISD node. - Add a new platform-specific optimization pass to remove redundant __tls_get_offset calls in the local-dynamic model (modeled after the corresponding X86 pass). - Add test cases verifying all access models and optimizations. llvm-svn: 229654
* [SystemZ] Support all TLS access models - MC partUlrich Weigand2015-02-189-21/+225
| | | | | | | | | | | | | | | | | | | | | | | The current SystemZ back-end only supports the local-exec TLS access model. This patch adds all required MC support for the other TLS models, which means in particular: - Support additional relocation types for Initial-exec model: R_390_TLS_IEENT Local-dynamic-model: R_390_TLS_LDO32, R_390_TLS_LDO64, R_390_TLS_LDM32, R_390_TLS_LDM64, R_390_TLS_LDCALL General-dynamic model: R_390_TLS_GD32, R_390_TLS_GD64, R_390_TLS_GDCALL - Support assembler syntax to generate additional relocations for use with __tls_get_offset calls: :tls_gdcall: :tls_ldcall: The patch also adds a new test to verify fixups and relocations, and removes the (already unused) FK_390_PLT16DBL/FK_390_PLT32DBL fixup kinds. llvm-svn: 229652
* Reformat.NAKAMURA Takumi2015-02-182-73/+63
| | | | llvm-svn: 229651
* Revert r229622: "[LoopAccesses] Make VectorizerParams global" and others. ↵NAKAMURA Takumi2015-02-183-325/+119
| | | | | | | | | | | | | | | | | | r229622 brought cyclic dependencies between Analysis and Vector. r229622: "[LoopAccesses] Make VectorizerParams global" r229623: "[LoopAccesses] Stash the report from the analysis rather than emitting it" r229624: "[LoopAccesses] Cache the result of canVectorizeMemory" r229626: "[LoopAccesses] Create the analysis pass" r229628: "[LoopAccesses] Change debug messages from LV to LAA" r229630: "[LoopAccesses] Add canAnalyzeLoop" r229631: "[LoopAccesses] Add missing const to APIs in VectorizationReport" r229632: "[LoopAccesses] Split out LoopAccessReport from VectorizerReport" r229633: "[LoopAccesses] Add -analyze support" r229634: "[LoopAccesses] Change LAA:getInfo to return a constant reference" r229638: "Analysis: fix buildbots" llvm-svn: 229650
* NFC: Use range-based for loops and more consistent naming.Daniel Jasper2015-02-181-19/+15
| | | | | | | | | No functional changes intended. (I plan on doing some modifications to this function and would like to have as few unrelated changes as possible in the patch) llvm-svn: 229649
* Remove experimental options to control machine block placement.Daniel Jasper2015-02-181-35/+20
| | | | | | | This reverts r226034. Benchmarking with those flags has not revealed anything interesting. llvm-svn: 229648
* Address post commit review on r229600.Sanjoy Das2015-02-181-2/+2
| | | | llvm-svn: 229646
* AVX-512: Added support for FP instructions with embedded rounding mode.Elena Demikhovsky2015-02-185-12/+73
| | | | | | By Asaf Badouh <asaf.badouh@intel.com> llvm-svn: 229645
* [x86] Rewrite the byte shift detection to not use boolean variables toChandler Carruth2015-02-181-22/+21
| | | | | | | | | | | | | | | | | | | | | | | track state. I didn't like this in the code review because the pattern tends to be error prone, but I didn't see a clear way to rewrite it. Turns out that there were bugs here, I found them when fuzz testing our shuffle lowering for correctness on x86. The core of the problem is that we need to consistently test all our preconditions for the same directionality of shift and the same input vector. Instead, formulate this as two predicates (one doesn't depend on the input in any way), pass things like the directionality and input vector as inputs, and loop over the alternatives. This fixes a pattern of very rare miscompiles coming out of this code. Turned up roughly 4 out of every 1 million v8 shuffles in my fuzz testing. The new code is over half a million test runs with no failures yet. I've also fuzzed every other function in the lowering code with over 3.5 million test cases and not discovered any other miscompiles. llvm-svn: 229642
* [X86] Remove AVX512 pslldq/psrldq shift intrinsics. They aren't implemented ↵Craig Topper2015-02-181-6/+0
| | | | | | yet and when they are they should be done with shuffles like SSE2 and AVX2. llvm-svn: 229641
* [X86] Remove AVX2 and SSE2 pslldq and psrldq intrinsics. We can represent ↵Craig Topper2015-02-183-98/+110
| | | | | | them in IR with vector shuffles now. All their uses have been removed from clang in favor of shuffles. llvm-svn: 229640
* Analysis: fix buildbotsSaleem Abdulrasool2015-02-181-1/+1
| | | | | | | This should fix the compilation failure on the MSVC buildbots which find a std::make_unique and llvm::make_unique via ADL, resulting in ambiguity. llvm-svn: 229638
* [LoopAccesses] Change LAA:getInfo to return a constant referenceAdam Nemet2015-02-182-6/+7
| | | | | | | | As expected, this required a few more const-correctness fixes. Based on Hal's feedback on D7684. llvm-svn: 229634
* [LoopAccesses] Add -analyze supportAdam Nemet2015-02-181-0/+51
| | | | | | | | | | | | | | | | The LoopInfo in combination with depth_first is used to enumerate the loops. Right now -analyze is not yet complete. It only prints the result of the analysis, the report and the run-time checks. Printing the unsafe depedences will require a bit more reshuffling which I'd like to do in a follow-on to this patchset. Unsafe dependences are currently checked via -debug-only=loop-accesses in the new test. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229633
* [LoopAccesses] Split out LoopAccessReport from VectorizerReportAdam Nemet2015-02-182-25/+44
| | | | | | | | | | | | The only difference between these two is that VectorizerReport adds a vectorizer-specific prefix to its messages. When LAA is used in the vectorizer context the prefix is added when we promote the LoopAccessReport into a VectorizerReport via one of the constructors. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229632
* [LoopAccesses] Add missing const to APIs in VectorizationReportAdam Nemet2015-02-182-4/+4
| | | | | | | | | | When I split out LoopAccessReport from this, I need to create some temps so constness becomes necessary. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229631
* [LoopAccesses] Add canAnalyzeLoopAdam Nemet2015-02-181-1/+51
| | | | | | | | | | | This allows the analysis to be attempted with any loop. This feature will be used with -analysis. (LV only requests the analysis on loops that have already satisfied these tests.) This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229630
* [LoopAccesses] Factor out RuntimePointerCheck::needsCheckingAdam Nemet2015-02-181-9/+18
| | | | | | | | | Will be used by the new RuntimePointerCheck::print. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229629
* [LoopAccesses] Change debug messages from LV to LAAAdam Nemet2015-02-182-40/+41
| | | | | | | | | Also add pass name as an argument to VectorizationReport::emitAnalysis. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229628
* [LoopAccesses] Create the analysis passAdam Nemet2015-02-183-17/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a function pass that runs the analysis on demand. The analysis can be initiated by querying the loop access info via LAA::getInfo. It either returns the cached info or runs the analysis. Symbolic stride information continues to reside outside of this analysis pass. We may move it inside later but it's not a priority for me right now. The idea is that Loop Distribution won't support run-time stride checking at least initially. This means that when querying the analysis, symbolic stride information can be provided optionally. Whether stride information is used can invalidate the cache entry and rerun the analysis. Note that if the loop does not have any symbolic stride, the entry should be preserved across Loop Distribution and LV. Since currently the only user of the pass is LV, I just check that the symbolic stride information didn't change when using a cached result. On the LV side, LoopVectorizationLegality requests the info object corresponding to the loop from the analysis pass. A large chunk of the diff is due to LAI becoming a pointer from a reference. A test will be added as part of the -analyze patch. Also tested that with AVX, we generate identical assembly output for the testsuite (including the external testsuite) before and after. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229626
* [LoopAccesses] Make blockNeedsPredication staticAdam Nemet2015-02-182-5/+8
| | | | | | | | | | | | | | | | blockNeedsPredication is in LoopAccess in order to share it with the vectorizer. It's a utility needed by LoopAccess not strictly provided by it but it's a good place to share it. This makes the function static so that it no longer required to create an LoopAccessInfo instance in order to access it from LV. This was actually causing problems because it would have required creating LAI much earlier that LV::canVectorizeMemory(). This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229625
* [LoopAccesses] Cache the result of canVectorizeMemoryAdam Nemet2015-02-182-15/+22
| | | | | | | | | | | | LAA will be an on-demand analysis pass, so we need to cache the result of the analysis. canVectorizeMemory is renamed to analyzeLoop which computes the result. canVectorizeMemory becomes the query function for the cached result. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229624
* [LoopAccesses] Stash the report from the analysis rather than emitting itAdam Nemet2015-02-182-3/+8
| | | | | | | | | | | The transformation passes will query this and then emit them as part of their own report. The currently only user LV is modified to do just that. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229623
* [LoopAccesses] Make VectorizerParams globalAdam Nemet2015-02-182-31/+33
| | | | | | | | | | | | | | As LAA is becoming a pass, we can no longer pass the params to its constructor. This changes the command line flags to have external storage. These can now be accessed both from LV and LAA. VectorizerParams is moved out of LoopAccessInfo in order to shorten the code to access it. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229622
* [LoopAccesses] Rename LoopAccessAnalysis to LoopAccessInfoAdam Nemet2015-02-182-30/+29
| | | | | | | | | LoopAccessAnalysis will be used as the name of the pass. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229621
* [InstCombine] Do not insert a GEP instruction before a landingpad instruction.Akira Hatanaka2015-02-181-4/+4
| | | | | | | | | | | InstCombiner::visitGetElementPtrInst was using getFirstNonPHI to compute the insertion point, which caused the verifier to complain when a GEP was inserted before a landingpad instruction. This commit fixes it to use getFirstInsertionPt instead. rdar://problem/19394964 llvm-svn: 229619
* [BDCE] Don't forget uses of root instructions seen before the instruction itselfHal Finkel2015-02-181-3/+6
| | | | | | | | | | | | | | | | | When visiting the initial list of "root" instructions (those which must always be alive), for those that are integer-valued (such as invokes returning an integer), we mark their bits as (initially) all dead (we might, obviously, find uses of those bits later, but all bits are assumed dead until proven otherwise). Don't do so, however, if we're already seen a use of those bits by another root instruction (such as a store). Fixes a miscompile of the sanitizer unit tests on x86_64. Also, add a debug line for visiting the root instructions, and remove a debug line which tried to print instructions being removed (printing dead instructions is dangerous, and can sometimes crash). llvm-svn: 229618
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