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* [Mem2Reg] Create merged debug locations for inserted phisVedant Kumar2018-04-171-6/+32
| | | | | | | | | | | | | | | | | | | | | | Track the debug locations of the incoming values to newly-created phis, and apply merged debug locations to the phis. A merged location will be on line 0, but will have the correct scope set. This improves crash reporting when an inlined instruction with a merged location triggers a machine exception. A debugger will be able to narrow down the crash to the correct inlined scope, instead of simply pointing to the outer scope of the caller. Taken together with a change allows generating merged line-0 locations for instructions which aren't calls, this results in a 0.5% increase in the uncompressed size of the .debug_line section of a stage2+Release build of clang (-O3 -g). rdar://33858697 Differential Revision: https://reviews.llvm.org/D45397 llvm-svn: 330227
* [Mem2Reg] Make RenamePassData a struct, NFCVedant Kumar2018-04-171-3/+2
| | | | llvm-svn: 330226
* [RISCV] implement li pseudo instructionAlex Bradbury2018-04-179-49/+266
| | | | | | | | | | | | | | The implementation follows the MIPS backend and expands the pseudo instruction directly during asm parsing. As the result, only real MC instructions are emitted to the MCStreamer. Additionally, PseudoLI instructions are emitted during codegen. The actual expansion to real instructions is performed during MI to MC lowering and is similar to the expansion performed by the GNU Assembler. Differential Revision: https://reviews.llvm.org/D41949 Patch by Mario Werner. llvm-svn: 330224
* LoadStoreVectorizer crashes due to unsized typeStanislav Mekhanoshin2018-04-171-2/+4
| | | | | | | | | When we skip bitcasts while looking for GEP in LoadSoreVectorizer we should also verify that the type is sized otherwise we assert Differential Revision: https://reviews.llvm.org/D45709 llvm-svn: 330221
* [XRay] Typed event logging intrinsicKeith Wyss2018-04-176-352/+984
| | | | | | | | | | | | | | | | | | | | | Summary: Add an LLVM intrinsic for type discriminated event logging with XRay. Similar to the existing intrinsic for custom events, but also accepts a type tag argument to allow plugins to be aware of different types and semantically interpret logged events they know about without choking on those they don't. Relies on a symbol defined in compiler-rt patch D43668. I may wait to submit before I can see demo everything working together including a still to come clang patch. Reviewers: dberris, pelikan, eizan, rSerge, timshen Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45633 llvm-svn: 330219
* [WebAssembly] Add an assertion for an invalid CFGHeejin Ahn2018-04-171-0/+3
| | | | | | | | | | | | | | | Summary: It was not easy to provide a test case for D45648 (rL330079) because the bug didn't manifest itself in the set of currently valid IRs. Added an assertion to check this faster, thanks to @dblaikie's suggestion. Reviewers: dblaikie Subscribers: jfb, dschuff, sbc100, jgravelle-google, llvm-commits, dblaikie Differential Revision: https://reviews.llvm.org/D45711 llvm-svn: 330217
* Rename sys::Process::GetArgumentVector -> sys::windows::GetCommandLineArgumentsRui Ueyama2018-04-174-40/+39
| | | | | | | | | | | | | | GetArgumentVector (or GetCommandLineArguments) is very Windows-specific. I think it doesn't make much sense to provide that function from sys::Process. I also made a change so that the function takes a BumpPtrAllocator instead of a SpecificBumpPtrAllocator. The latter is the class to call dtors, but since char * is trivially destructible, we should use the former class. Differential Revision: https://reviews.llvm.org/D45641 llvm-svn: 330216
* [WebAssembly] Teach fast-isel to gracefully recover from illegal return types.Dan Gohman2018-04-171-2/+6
| | | | | | Fixes PR36564. llvm-svn: 330215
* [llvm-pdbutil] Dump first section contribution for each module.Zachary Turner2018-04-172-1/+5
| | | | | | | | | | | | | | The DBI stream contains a list of module descriptors. At the beginning of each descriptor is a structure representing the first section contribution in the output file for that module. LLD currently doesn't fill out this structure at all, but link.exe does. So as a precursor to emitting this data in LLD, we first need a way to dump it so that it can be checked. This patch adds support for the dumping, and verifies via a test that LLD emits bogus information. llvm-svn: 330208
* [X86] Add separate scheduling class for PSADBW instruction.Craig Topper2018-04-1713-22/+18
| | | | llvm-svn: 330204
* [X86] Remove unnecessary InstRW overrides. Add somes FIXMEs/TODOs.Craig Topper2018-04-175-98/+17
| | | | llvm-svn: 330203
* [Hexagon] Do not merge initializers for stack and non-stack expressionsKrzysztof Parzyszek2018-04-171-2/+42
| | | | | | | | | Stack addressing needs addressing modes that provide an offset field immediately following the frame index. An initializer from a non-stack addressing could force the stack address to use a form that does not provide an offset field. llvm-svn: 330191
* [LLVM-C] [PR34633] Avoid calling ->dump() methods from LLVMDump*.whitequark2018-04-171-5/+3
| | | | | | | | | | LLVMDump* functions are available in Release builds too. Patch by Brenton Bostick. Differential Revision: https://reviews.llvm.org/D44600 llvm-svn: 330189
* Fix incorrect choice of callee-saved registers save/restore pointsMomchil Velikov2018-04-171-2/+14
| | | | | | | | Make the shrink wrapping pass pay attention to uses/defs of the stack pointer. Differential revision: https://reviews.llvm.org/D45524 llvm-svn: 330183
* Revert "Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again."Michael Zolotukhin2018-04-171-22/+15
| | | | | | This reverts r330175. There are still stage3/stage4 miscompares. llvm-svn: 330180
* [X86] Add FP comparison scheduler classesSimon Pilgrim2018-04-1713-315/+105
| | | | | | | | Split VCMP/VMAX/VMIN instructions off to WriteFCmp and VCOMIS instructions off to WriteFCom instead of assuming they match WriteFAdd Differential Revision: https://reviews.llvm.org/D45656 llvm-svn: 330179
* [DAGCombiner] Fix for oss-fuzz bugGerolf Hoflehner2018-04-171-1/+2
| | | | llvm-svn: 330178
* [SSAUpdaterBulk] Add debug logging.Michael Zolotukhin2018-04-171-12/+23
| | | | llvm-svn: 330176
* Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again.Michael Zolotukhin2018-04-171-15/+22
| | | | | | | | | One more, hopefully the last, bug is fixed: when forming UsesToRewrite we should ignore phi operands coming from edges that we want to delete. This reverts r329910. llvm-svn: 330175
* [IR] Upgrade comment token in objc retain release marker for asm callGerolf Hoflehner2018-04-172-0/+15
| | | | | | Older compiler issued '#' instead of ';' llvm-svn: 330173
* COFF: Make SectionChunk::Relocs field an ArrayRef. NFCI.Peter Collingbourne2018-04-171-6/+3
| | | | | | Differential Revision: https://reviews.llvm.org/D45714 llvm-svn: 330172
* [DebugInfo] Follow-up bug fix on "Fixing a couple of DI duplication bugs of ↵Roman Tereshin2018-04-161-2/+0
| | | | | | | | | | | | CloneModule" Apparently, DebugInfoFinder::processCompileUnit doesn't process all of the possible kinds of DIImportedEntit'ies, e.g. DIGlobalVariable's. Previously introduced `llvm_unreachable` is therefore incorrect. Removing it here. llvm-svn: 330167
* [PDB] Correctly use the target machine when writing DBI stream.Zachary Turner2018-04-161-0/+5
| | | | | | | | | Using Config->is64() will treat ARM64 as Amd64, which is incorrect. Furthermore, there are more esoteric architectures that could theoretically be encountered. Just set it directly to the machine type, which we already know anyway. llvm-svn: 330157
* [RISCV] Fix assert message operatorMandeep Singh Grang2018-04-161-1/+1
| | | | | | | | | | | | | | | | Summary: Specifying assert message with an || operator makes the compiler interpret it as a bool. Changed it to &&. Reviewers: asb, apazos Reviewed By: asb Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, llvm-commits Differential Revision: https://reviews.llvm.org/D45660 llvm-svn: 330148
* Resubmit "Fix some incorrect fields in our generated PDBs."Zachary Turner2018-04-161-1/+9
| | | | | | | This fixes the failing tests. They simply hadn't been updated to match the new output resulting from this patch. llvm-svn: 330145
* [SLP] Use getExtractWithExtendCost() to compute the scalar cost of ↵Haicheng Wu2018-04-161-1/+17
| | | | | | | | | | | | | extractelement/ext pair We use getExtractWithExtendCost to calculate the cost of extractelement and s|zext together when computing the extract cost after vectorization, but we calculate the cost of extractelement and s|zext separately when computing the scalar cost which is larger than it should be. Differential Revision: https://reviews.llvm.org/D45469 llvm-svn: 330143
* [ORC] Add a MaterializationResponsibility class to track responsibility forLang Hames2018-04-163-58/+125
| | | | | | | | | | | | | | | | | materializing function definitions. MaterializationUnit instances are responsible for resolving and finalizing symbol definitions when their materialize method is called. By contract, the MaterializationUnit must materialize all definitions it is responsible for and no others. If it can not materialize all definitions (because of some error) then it must notify the associated VSO about each definition that could not be materialized. The MaterializationResponsibility class tracks this responsibility, asserting that all required symbols are resolved and finalized, and that no extraneous symbols are resolved or finalized. In the event of an error it provides a convenience method for notifying the VSO about each definition that could not be materialized. llvm-svn: 330142
* [ORC] Merge VSO notifyResolutionFailed and notifyFinalizationFailed in toLang Hames2018-04-161-35/+16
| | | | | | | | | notifyMaterializationFailed. The notifyMaterializationFailed method can determine which error to raise by looking at which queue the pending queries are in (resolution or finalization). llvm-svn: 330141
* [Hexagon] Turn off flag enabling auto-vectorizationKrzysztof Parzyszek2018-04-161-1/+1
| | | | | | It was turned on for testing and was accidentally left on in the commit. llvm-svn: 330139
* [NFC] Move verificaiton check for f128 conversion into LowerINT_TO_FP()Lei Huang2018-04-161-24/+14
| | | | | | | Move veriication check for legal conversions to f128 into LowerINT_TO_FP() and fix some indentations to match other sections of the code for readability. llvm-svn: 330138
* [InstCombine] simplify code in SimplifyAssociativeOrCommutative; NFCISanjay Patel2018-04-161-16/+11
| | | | llvm-svn: 330137
* [Attributes] Fix a bug in AttributeList::get so it can handle a mix of ↵Craig Topper2018-04-161-0/+4
| | | | | | | | | | FunctionIndex and ReturnIndex/arg indices at the same time The code uses the index of the last element in the sorted array to determine the maximum size needed for the vector. But if the last index is a FunctionIndex(~0), attrIdxToArrayIdx will return 0 and the vector will have size 1. If there are any indices before FunctionIndex, those values would return a value larger than 0 from attrIdxToArrayIdx. So in this case we need to look in front of the FunctionIndex to get the true size needed. Differential Revision: https://reviews.llvm.org/D45632 llvm-svn: 330136
* Revert "Fix some incorrect fields in our generated PDBs."Zachary Turner2018-04-161-9/+1
| | | | | | | There are a couple of failing tests which slipped under my radar so I'm reverting this while I attempt to fix. llvm-svn: 330133
* [CodeView] Initial support for emitting S_THUNK32 symbols for compiler...Brock Wyma2018-04-163-1/+63
| | | | | | | | | | | When emitting CodeView debug information, compiler-generated thunk routines should be emitted using S_THUNK32 symbols instead of S_GPROC32_ID symbols so Visual Studio can properly step into the user code. This initial support only handles standard thunk ordinals. Differential Revision: https://reviews.llvm.org/D43838 llvm-svn: 330132
* Fix some incorrect fields in our generated PDBs.Zachary Turner2018-04-161-1/+9
| | | | | | | | | | | | | | | | | | Most of these are pretty trivial and obvious. Setting the toolchain version to 14.11 is perhaps a little questionable, but we've been bitten in the past where one of our version fields sidn't match MSVC's, and I definitely don't want to go through that diagnosis again as it was pretty time consuming and hard to track down. I found all of these by using llvm-pdbutil export to dump the dbi and pdb streams to a file, then using fc followed by llvm-pdbutil explain to explain the mismatched bytes. There are still some more, these are just the low hanging fruit. Differential Revision: https://reviews.llvm.org/D45276 llvm-svn: 330130
* [InstCombine] simplify getBinOpsForFactorization(); NFCSanjay Patel2018-04-161-25/+15
| | | | llvm-svn: 330129
* [InstCombine] simplify fneg+fadd folds; NFCSanjay Patel2018-04-163-26/+7
| | | | | | | | Two cleanups: 1. As noted in D45453, we had tests that don't need FMF that were misplaced in the 'fast-math.ll' test file. 2. This removes the final uses of dyn_castFNegVal, so that can be deleted. We use 'match' now. llvm-svn: 330126
* [InstCombine] fix formatting; NFCSanjay Patel2018-04-161-4/+2
| | | | llvm-svn: 330124
* [AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32Dmitry Preobrazhensky2018-04-162-1/+27
| | | | | | | | | See bug 36356: https://bugs.llvm.org/show_bug.cgi?id=36356 Differential Revision: https://reviews.llvm.org/D45446 Reviewers: artem.tamazov, arsenm, timcorringham llvm-svn: 330123
* [AArch64][SVE] Asm: Support for structured LD4 (scalar+imm) load instructions.Sander de Smalen2018-04-166-3/+68
| | | | | | | | | | | | Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro Reviewed By: rengolin Subscribers: tschuett, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D45624 llvm-svn: 330120
* [AArch64][SVE] Asm: Support for structured LD3 (scalar+imm) load instructions.Sander de Smalen2018-04-166-3/+69
| | | | | | | | | | | | Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro Reviewed By: rengolin Subscribers: tschuett, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D45623 llvm-svn: 330116
* [mips] Restrict certain trap instructions for micromipsr6Stefan Maksimovic2018-04-161-8/+14
| | | | | | | | | Instructions removed from micromipsr6: teqi, tgei, tgeiu, tlti, tltiu, tnei Differential Revision: https://reviews.llvm.org/D45318 llvm-svn: 330114
* [MIR-Canon] Adding ISA-Agnostic COPY Folding.Puyan Lotfi2018-04-161-0/+43
| | | | | | | | | | | | | | | | | Transforms the following: %vreg1234:gpr32 = COPY %42 %vreg1235:gpr32 = COPY %vreg1234 %vreg1236:gpr32 = COPY %vreg1235 $w0 = COPY %vreg1236 into: $w0 = COPY %42 Assuming %42 is also a gpr32 llvm-svn: 330113
* [NFC][MIR-Canon] clang-format cleanup of Mir Canonicalizer Pass.Puyan Lotfi2018-04-161-66/+60
| | | | llvm-svn: 330111
* [X86] Introduce archs: goldmont-plus & tremontGabor Buella2018-04-163-14/+46
| | | | | | | | | | | | | | | Using Goldmont's cost tables for these two upcoming atom archs. Reviewers: craig.topper Reviewed By: craig.topper Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45612 llvm-svn: 330109
* [AArch64][SVE] Asm: Support for structured LD2 (scalar+imm) load instructions.Sander de Smalen2018-04-166-4/+102
| | | | | | | | | | | | Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro Reviewed By: rengolin Subscribers: tschuett, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D45622 llvm-svn: 330108
* Rename ObjectMemoryBuffer to SmallVectorMemoryBuffer; NFCIWeiming Zhao2018-04-164-7/+7
| | | | | | | | | | | | | | Summary: As discussed in https://reviews.llvm.org/D45606, it makes more sense to name the class as SmallVectorMemoryBuffer Reviewers: bkramer, dblaikie Reviewed By: dblaikie Subscribers: mehdi_amini, eraman, llvm-commits Differential Revision: https://reviews.llvm.org/D45661 llvm-svn: 330107
* [BasicAA] Return MayAlias for the pointer plus variable offset toShiva Chen2018-04-161-6/+6
| | | | | | | | structure object member Differential Revision: https://reviews.llvm.org/D45510 llvm-svn: 330106
* [X86] Use APInt::isSubsetof instead of APInt::intersects to avoid a negation ↵Craig Topper2018-04-151-2/+2
| | | | | | of an APInt value. NFC llvm-svn: 330105
* [X86] Use uint32_t instead of unsigned in GetLo32XForm for readability. NFCCraig Topper2018-04-151-1/+1
| | | | | | GetLo8XForm right next to it uses uint8_t so uint32_t is consistent. llvm-svn: 330104
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