| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 129995
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(C2 >> C1)) & C1. (Part of PR5039)
This tends to happen a lot with bitfield code generated by clang. A simple example for x86_64 is
uint64_t foo(uint64_t x) { return (x&1) << 42; }
which used to compile into bloated code:
shlq $42, %rdi ## encoding: [0x48,0xc1,0xe7,0x2a]
movabsq $4398046511104, %rax ## encoding: [0x48,0xb8,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00]
andq %rdi, %rax ## encoding: [0x48,0x21,0xf8]
ret ## encoding: [0xc3]
with this patch we can fold the immediate into the and:
andq $1, %rdi ## encoding: [0x48,0x83,0xe7,0x01]
movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
shlq $42, %rax ## encoding: [0x48,0xc1,0xe0,0x2a]
ret ## encoding: [0xc3]
It's possible to save another byte by using 'andl' instead of 'andq' but I currently see no way of doing
that without making this code even more complicated. See the TODOs in the code.
llvm-svn: 129990
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llvm-svn: 129984
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llvm-svn: 129980
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llvm-svn: 129978
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llvm-svn: 129976
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llvm-svn: 129975
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Patch by Patrick Walton!
llvm-svn: 129974
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llvm-svn: 129973
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add <rd>, sp, #<imm8>
ldr <rd>, [sp, #<imm8>]
When the offset from sp is multiple of 4 and in range of 0-1020.
This saves code size by utilizing 16-bit instructions.
rdar://9321541
llvm-svn: 129971
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llvm-svn: 129970
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the first time through.
llvm-svn: 129969
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Silences GCC warning.
I wonder why Clang doesn't warn on this...
llvm-svn: 129968
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An exception is thrown via a call to _cxa_throw, which we don't expect to
return. Therefore, the "true" part of the invoke goes to a BB that has
'unreachable' as its only instruction. This is lowered into an empty MachineBB.
The landing pad for this invoke, however, is directly after the "true" MBB.
When the empty MBB is removed, the landing pad is directly below the BB with the
invoke call. The unconditional branch is removed and then the two blocks are
merged together.
The testcase is too big for a regression test.
<rdar://problem/9305728>
llvm-svn: 129965
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X8664_ELFTargetObjectFile::getFDEEncoding to match reality.
llvm-svn: 129959
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llvm-svn: 129955
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llvm-svn: 129953
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llvm-svn: 129952
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llvm-svn: 129947
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llvm-svn: 129945
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llvm-svn: 129938
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llvm-svn: 129932
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llvm-svn: 129928
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These intervals are allocatable immediately after splitting, but they may be
evicted because of later splitting. This is rare, but when it happens they
should be split again.
The remainder intervals that cannot be allocated after splitting still move
directly to spilling.
SplitEditor::finish can optionally provide a mapping from new live intervals
back to the original interval indexes returned by openIntv().
Each original interval index can map to multiple new intervals after connected
components have been separated. Dead code elimination may also add existing
intervals to the list.
The reverse mapping allows the SplitEditor client to treat the new intervals
differently depending on the split region they came from.
llvm-svn: 129925
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MC :-)
llvm-svn: 129923
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llvm-svn: 129922
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llvm-svn: 129921
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which broke a couple GCC test suite tests at -O0.
llvm-svn: 129914
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llvm-svn: 129913
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This patch depends on the prior fix r129908 that changes to use std::find,
rather than std::binary_search, on unordered array.
Patch by Dan Bailey
llvm-svn: 129909
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std::binary_search
llvm-svn: 129908
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necessary since gcov counts transitions between blocks. It can't see if you've
run every line in a straight-line function, so we add an edge for it to notice.
llvm-svn: 129905
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comment for 80 columns.
llvm-svn: 129904
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instrument the program to emit .gcda.
TODO: we should emit slightly different .gcda files when .gcno emission is off.
llvm-svn: 129903
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llvm-svn: 129888
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llvm-svn: 129884
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llvm-svn: 129883
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TII::isTriviallyReMaterializable() shouldn't depend on any properties of the
register being defined by the instruction. Rematerialization is going to create
a new virtual register anyway.
llvm-svn: 129882
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generated by llvm-gcc, since llvm-gcc uses 2 i64s for passing a 4 x float
vector on ARM rather than an i64 array like Clang.
llvm-svn: 129878
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delete it.
llvm-svn: 129877
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more cases.
llvm-svn: 129876
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http://google1.osuosl.org:8011/builders/llvm-x86_64-linux-checks/builds/825/steps/test.llvm.stage2/logs/st.ll
llvm-svn: 129869
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On the x86-64 and thumb2 targets, some registers are more expensive to encode
than others in the same register class.
Add a CostPerUse field to the TableGen register description, and make it
available from TRI->getCostPerUse. This represents the cost of a REX prefix or a
32-bit instruction encoding required by choosing a high register.
Teach the greedy register allocator to prefer cheap registers for busy live
ranges (as indicated by spill weight).
llvm-svn: 129864
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llvm-svn: 129862
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<rdar://problem/7662569>
llvm-svn: 129858
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llvm-svn: 129852
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used by Clang. To help Clang integration, the PTX target has been split
into two targets: ptx32 and ptx64, depending on the desired pointer size.
- Add GCCBuiltin class to all intrinsics
- Split PTX target into ptx32 and ptx64
llvm-svn: 129851
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llvm-svn: 129850
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Patched by Dan Bailey
llvm-svn: 129848
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Patched by Dan Bailey
llvm-svn: 129847
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