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* Add a temporary command line option to verify machine code after each spill orJakob Stoklund Olesen2010-10-281-0/+6
| | | | | | split. llvm-svn: 117597
* Revert r117582, which reverted r77396. Searching PATH for a stringDan Gohman2010-10-281-1/+1
| | | | | | | | | | | | which contains slashes is inconsistent with the meaning of PATH on Unix-type platforms, and pretty surprising. If the user has given a specific path to execute and we can't execute it, we should fail and say why. (Apparently the new posix_spawn code doesn't always say why, but that's a separate issue.) llvm-svn: 117596
* Add support for the .string directive.Rafael Espindola2010-10-281-8/+10
| | | | llvm-svn: 117592
* Do not work too hard to find type's file info. There is a special field to ↵Devang Patel2010-10-281-2/+2
| | | | | | record file info. llvm-svn: 117588
* Defined weak symbols should have non-zero value.Rafael Espindola2010-10-281-4/+3
| | | | llvm-svn: 117585
* llvmc: Make ExecuteProgram() look in the driver directory first.Mikhail Glushenkov2010-10-281-3/+6
| | | | llvm-svn: 117584
* Remove an unnecessary check and an unnecessary temporary.Mikhail Glushenkov2010-10-281-3/+2
| | | | llvm-svn: 117583
* Revert r77396.Mikhail Glushenkov2010-10-281-1/+1
| | | | | | | | | | | | | | Original commit message: On "Unix", if Program::FindProgramByName is given a name containing slashes, just go with it, regardless of whether it looks like it will be executable. This follows the behavior of sh(1) more closely. It's better when behaviour is consistent between platforms. This change also makes FindExecutable() behave as expected on unix-likes (before this commit, it used to always succeed). llvm-svn: 117582
* Trailing whitespace.Mikhail Glushenkov2010-10-281-4/+4
| | | | llvm-svn: 117581
* Fix relocations with renamed symbols.Rafael Espindola2010-10-281-5/+6
| | | | llvm-svn: 117575
* Reduce malloc thrashing.Benjamin Kramer2010-10-281-1/+1
| | | | llvm-svn: 117572
* PLD, PLDW, PLI encodings, plus refactor their use of addrmode2.Jim Grosbach2010-10-284-20/+44
| | | | llvm-svn: 117571
* Aliases defined with .symver should copy the binding of the symbols they alias.Rafael Espindola2010-10-281-6/+21
| | | | | | | Move the existing patching for undefined symbols so that all the patching is done in the same function. llvm-svn: 117570
* Technically DIFile scope should also be handled here.Devang Patel2010-10-281-0/+4
| | | | llvm-svn: 117563
* rearrange ParseRegisterList.Chris Lattner2010-10-281-16/+30
| | | | llvm-svn: 117560
* refactor some code to simplify it, eliminating some owningptr's.Chris Lattner2010-10-281-65/+60
| | | | llvm-svn: 117559
* Teach the DAG combiner to fold a splat of a splat. Radar 8597790.Bob Wilson2010-10-281-24/+28
| | | | | | Also do some minor refactoring to reduce indentation. llvm-svn: 117558
* Use the IDVal directly as there's no need to convert to std::string.Roman Divacky2010-10-281-2/+2
| | | | | | Pointed out by Chris! llvm-svn: 117557
* Implement .equ directive as a synonym to .set.Roman Divacky2010-10-281-6/+6
| | | | llvm-svn: 117553
* Fix PR8494: when reading invalid bitcode, getTypeByID may returnDuncan Sands2010-10-281-2/+7
| | | | | | a null pointer. llvm-svn: 117551
* Implement R_X86_64_DTPOFF32.Rafael Espindola2010-10-281-0/+3
| | | | llvm-svn: 117548
* Implement TLSLD.Rafael Espindola2010-10-282-0/+6
| | | | llvm-svn: 117547
* Implement DTPOFF.Rafael Espindola2010-10-282-0/+6
| | | | llvm-svn: 117546
* Implement TLSLDM.Rafael Espindola2010-10-282-0/+6
| | | | llvm-svn: 117544
* Implement VK_GOTNTPOFF and switch RelocNeedsGOT to use VariantKind.Rafael Espindola2010-10-282-15/+18
| | | | llvm-svn: 117543
* Reindent.Mikhail Glushenkov2010-10-281-71/+71
| | | | llvm-svn: 117538
* Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.Evan Cheng2010-10-285-23/+88
| | | | llvm-svn: 117531
* Revert 117518 and 117519 for now. They changed scheduling and cause MC tests ↵Evan Cheng2010-10-285-88/+23
| | | | | | to fail. Ugh. llvm-svn: 117520
* - Assign load / store with shifter op address modes the right itinerary classes.Evan Cheng2010-10-284-23/+85
| | | | | | | | | | - For now, loads of [r, r] addressing mode is the same as the [r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should identify the former case and reduce the output latency by 1. - Also identify [r, r << 2] case. This special form of shifter addressing mode is "free". llvm-svn: 117519
* Fix a major bug in operand latency computation. The use index must be adjustedEvan Cheng2010-10-281-0/+3
| | | | | | by the number of defs first for it to match the instruction itinerary. llvm-svn: 117518
* Fix pastos in handling of AVX cvttsd2si, PR8491.Dale Johannesen2010-10-281-4/+4
| | | | | | | Bruno, please review, but I'm pretty sure this is right. Patch by Alex Mac! llvm-svn: 117514
* Add correct NEON encodings for vtbl and vtbx.Owen Anderson2010-10-281-29/+29
| | | | llvm-svn: 117513
* Add correct NEON encodings for vext, vtrn, vuzp, and vzip.Owen Anderson2010-10-271-2/+8
| | | | llvm-svn: 117512
* Fix compiler warnings about signed/unsigned comparisons.Bob Wilson2010-10-271-2/+2
| | | | llvm-svn: 117511
* Teach InstCombine not to use Add and Neg on FP. PR 8490.Dale Johannesen2010-10-271-1/+8
| | | | llvm-svn: 117510
* Shifter ops are not always free. Do not fold them (especially to formEvan Cheng2010-10-272-16/+119
| | | | | | | complex load / store addressing mode) when they have higher cost and when they have more than one use. llvm-svn: 117509
* Putting r117193 back except for the compile time cost. Rather than assuming ↵Evan Cheng2010-10-271-3/+10
| | | | | | fallthroughs uses all registers, just gather the union of all successor liveins. llvm-svn: 117506
* Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, likeJim Grosbach2010-10-279-101/+94
| | | | | | | | the LDR instructions have. This makes the literal/register forms of the instructions explicit and allows us to assign scheduling itineraries appropriately. rdar://8477752 llvm-svn: 117505
* Provide correct encodings for NEON vcvt, which has its own special immediate ↵Owen Anderson2010-10-274-6/+16
| | | | | | | | encoding for specifying fractional bits for fixed point conversions. llvm-svn: 117501
* Trailing whitespaceJim Grosbach2010-10-271-17/+17
| | | | llvm-svn: 117496
* Provide correct encodings for the get_lane and set_lane variants of vmov.Owen Anderson2010-10-272-41/+64
| | | | llvm-svn: 117495
* Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE.Rafael Espindola2010-10-271-0/+17
| | | | llvm-svn: 117494
* Added the x86 instruction ud2b (2nd official undefined instruction).Kevin Enderby2010-10-271-1/+3
| | | | llvm-svn: 117485
* JIT imm12 encoding for constant pool entry references.Jim Grosbach2010-10-271-0/+4
| | | | llvm-svn: 117483
* SelectionDAG shuffle nodes do not allow operands with different numbers ofBob Wilson2010-10-271-0/+55
| | | | | | | | | | | | | | | | | | | elements than the result vector type. So, when an instruction like: %8 = shufflevector <2 x float> %4, <2 x float> %7, <4 x i32> <i32 1, i32 0, i32 3, i32 2> is translated to a DAG, each operand is changed to a concat_vectors node that appends 2 undef elements. That is: shuffle [a,b], [c,d] is changed to: shuffle [a,b,u,u], [c,d,u,u] That's probably the right thing for x86 but for NEON, we'd much rather have: shuffle [a,b,c,d], undef Teach the DAG combiner how to do that transformation for ARM. Radar 8597007. llvm-svn: 117482
* Implement R_X86_64_GOTTPOFF, R_X86_64_TLSGD and R_X86_64_TPOFF32.Rafael Espindola2010-10-271-0/+12
| | | | llvm-svn: 117481
* ARM JIT fix for LDRi12 and company.Jim Grosbach2010-10-272-4/+18
| | | | llvm-svn: 117478
* Replace pointer arithmetic with StringRef::substr.Benjamin Kramer2010-10-271-6/+5
| | | | llvm-svn: 117477
* Provide correct NEON encodings for vdup.Owen Anderson2010-10-272-8/+42
| | | | llvm-svn: 117475
* x86-Win32: Switch ftol2 calling convention from stdcall to C.Michael J. Spencer2010-10-271-2/+2
| | | | llvm-svn: 117474
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