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* COFF: Add IMAGE_SCN_MEM_READ to text sections.Michael J. Spencer2010-10-271-0/+1
| | | | | | | | There are currently 100 references to COFF::IMAGE_SCN in 6 files and 11 different functions. Section to attribute mapping really needs to happen in one place to avoid problems like this. llvm-svn: 117473
* Fix whitespace.Michael J. Spencer2010-10-271-15/+15
| | | | llvm-svn: 117472
* Set default type and flags for .init and .fini.Rafael Espindola2010-10-271-1/+9
| | | | llvm-svn: 117471
* Produce an error for an invalid use of .symver.Rafael Espindola2010-10-271-0/+5
| | | | llvm-svn: 117462
* The new LDR* instruction patterns should handle the necessary encoding ofJim Grosbach2010-10-271-0/+7
| | | | | | | operands in the TableGen'erated bits, so we don't need to do the additional magic explicitly. llvm-svn: 117461
* Add correct NEON encodings for vsli and vsri.Owen Anderson2010-10-271-8/+8
| | | | llvm-svn: 117459
* Add correct NEON encodings for vsra and vrsra.Owen Anderson2010-10-271-10/+10
| | | | llvm-svn: 117458
* The immediate operands of an LDRi12 instruction doesn't need the addrmode2Jim Grosbach2010-10-271-2/+6
| | | | | | encoding tricks. Handle the 'imm doesn't fit in the insn' case. llvm-svn: 117454
* Formatting.Jim Grosbach2010-10-271-2/+2
| | | | llvm-svn: 117453
* Symbols defined as the difference of other two end up in the ABS section.Rafael Espindola2010-10-271-5/+2
| | | | llvm-svn: 117451
* Add support for the .symver directive. This is really ugly, but most of it isRafael Espindola2010-10-272-14/+86
| | | | | | contained in the ELF object writer. llvm-svn: 117448
* Move more logic to isInSymtab and simplify.Rafael Espindola2010-10-271-21/+19
| | | | llvm-svn: 117447
* 80-col violation.Mikhail Glushenkov2010-10-271-1/+2
| | | | llvm-svn: 117443
* Remove try/catch(...) from Win32/Signals.inc.Mikhail Glushenkov2010-10-272-11/+1
| | | | | | | | | | | | | | | | | | | | catch(...) is used in Win32/Signals.inc for catching Win32 structured exceptions, but according to [1], this is wrong. We can't simply change try/catch to __try/__finally, since this syntax is not supported by MinGW. We can use __try/__finally on MSVC and __try1/__except1 macros on MinGW [2], but I think that that solution obfuscates the code too much. The use of try/catch(...) in Signals.inc makes it impossible to link MinGW-compiled libSystem with llvm-gcc compiled executables. I propose that we just remove try/catch(...) from Signals.inc, since the meaning of the code won't change. [1] http://members.cox.net/doug_web/eh.htm [2] http://article.gmane.org/gmane.comp.compilers.llvm.cvs/81315 llvm-svn: 117442
* Yet another tweak to X86 instructions to add ud2a as an alias to ud2Kevin Enderby2010-10-271-0/+1
| | | | | | (still to add ud2b). llvm-svn: 117435
* Another tweak to X86 instructions to add the missing flex instruction (withoutKevin Enderby2010-10-271-1/+2
| | | | | | the wait prefix). llvm-svn: 117434
* Tweaks to X86 instructions to allow the 'w' suffix in places it makesKevin Enderby2010-10-271-0/+6
| | | | | | | | | sense, when the instruction takes the 16-bit ax register or m16 memory location. These changes to llvm-mc matches what the darwin assembler allows for these instructions. Done differently than in r117031 that caused a valgrind error which was later reverted. llvm-svn: 117433
* LDRi12 machine instructions handle negative offset operands normally (simpleJim Grosbach2010-10-272-4/+14
| | | | | | integer values), not with the addrmode2 encoding. llvm-svn: 117429
* Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mcKevin Enderby2010-10-271-1/+14
| | | | | | | will accept versions that the darwin assembler allows. Forms ending in "pi" and forms without all the operands. llvm-svn: 117427
* Handle critical loop predecessors by making both inside and outside registersJakob Stoklund Olesen2010-10-272-2/+19
| | | | | | | | | live out. This doesn't prevent us from inserting a loop preheader later on, if that is better. llvm-svn: 117424
* Compute critical loop predecessors in the same way as critical loop exits.Jakob Stoklund Olesen2010-10-272-1/+38
| | | | | | | | Critical edges going into a loop are not as bad as critical exits. We can handle them by splitting the critical edge, or by having both inside and outside registers live out of the predecessor. llvm-svn: 117423
* Physical registers trivially have multiple connected components all the time.Jakob Stoklund Olesen2010-10-271-5/+7
| | | | | | Only virtuals should be requires to be connected. llvm-svn: 117422
* One more spot where the new arm mode LDR instruction representationJim Grosbach2010-10-271-3/+3
| | | | | | | doesn't need the additional addrmode2 register operand. Missed it the first time around. llvm-svn: 117421
* Adding disassembler to the MicroBlaze backend.Wesley Peck2010-10-2717-121/+886
| | | | llvm-svn: 117420
* Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing onJim Grosbach2010-10-276-17/+18
| | | | | | rdar://8477752. llvm-svn: 117419
* Since I parameterized this bit, I should probably actually use said parameter.Jim Grosbach2010-10-261-2/+2
| | | | llvm-svn: 117418
* Use a MemIntrinsicSDNode for ISD::PREFETCH, which touchesDale Johannesen2010-10-263-3/+11
| | | | | | | | memory, so a MachineMemOperand is useful (not propagated into the MachineInstr yet). No functional change except for dump output. llvm-svn: 117413
* Remove the vector of live vregs. I thought we would need to trackAndrew Trick2010-10-262-6/+0
| | | | | | | them, but hopefully we won't. And this is not the right data structure to do it anyway. llvm-svn: 117412
* Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and ↵Owen Anderson2010-10-261-8/+8
| | | | | | vqrshrun. llvm-svn: 117411
* First part of refactoring ARM addrmode2 (load/store) instructions to be moreJim Grosbach2010-10-2614-65/+314
| | | | | | | | explicit about the operands. Split out the different variants into separate instructions. This gives us the ability to, among other things, assign different scheduling itineraries to the variants. rdar://8477752. llvm-svn: 117409
* After splitting, compute connected components of all new registers, not just forJakob Stoklund Olesen2010-10-262-17/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | the remainder register. Example: bb0: x = 1 bb1: use(x) ... x = 2 jump bb1 When x is isolated in bb1, the inner part breaks into two components, x1 and x2: bb0: x0 = 1 bb1: x1 = x0 use(x1) ... x2 = 2 x0 = x2 jump bb1 llvm-svn: 117408
* Verify that live intervals are connected. If there are multiple connectedJakob Stoklund Olesen2010-10-261-1/+9
| | | | | | components, each should get its own virtual register. llvm-svn: 117407
* Call RenumberValues for all new registers created during splitting. This isJakob Stoklund Olesen2010-10-261-1/+2
| | | | | | necessary to get correct hasPHIKill flags. llvm-svn: 117406
* Preserve PHIDef bits in cloned values during splitting.Jakob Stoklund Olesen2010-10-261-0/+4
| | | | llvm-svn: 117405
* Assign source ordering to nodes created for StoreInst.Devang Patel2010-10-261-2/+5
| | | | llvm-svn: 117404
* Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn.Owen Anderson2010-10-261-4/+4
| | | | llvm-svn: 117402
* Simplify classes for shift instructions, which are never commutable.Owen Anderson2010-10-261-19/+19
| | | | llvm-svn: 117398
* Provide correct NEON encodings for vshl, register and immediate forms.Owen Anderson2010-10-262-2/+81
| | | | llvm-svn: 117394
* Teach MachineBasicBlock::print() to annotate instructions and blocks withJakob Stoklund Olesen2010-10-264-20/+29
| | | | | | SlotIndexes when available. llvm-svn: 117392
* Remmeber to print full live interval on verification error.Jakob Stoklund Olesen2010-10-261-4/+7
| | | | llvm-svn: 117391
* Add support for .ident.Rafael Espindola2010-10-261-0/+32
| | | | llvm-svn: 117389
* Grammar.Jim Grosbach2010-10-261-1/+1
| | | | llvm-svn: 117388
* Nuke extraneous comment. It's applicable elsewhere, but not in this func.Jim Grosbach2010-10-261-2/+0
| | | | llvm-svn: 117387
* Jakob's review of the basic register allocator.Andrew Trick2010-10-264-113/+160
| | | | llvm-svn: 117384
* Add correct NEON encoding for vpadal.Owen Anderson2010-10-261-6/+6
| | | | llvm-svn: 117380
* handle X86::EH_RETURN64 and X86::EH_RETURN.Rafael Espindola2010-10-261-0/+17
| | | | llvm-svn: 117378
* s/beginScope/beginInstruction/gDevang Patel2010-10-263-10/+10
| | | | | | s/endScope/endInstruction/g llvm-svn: 117376
* Add NEON encodings for vmov and vmvn of immediates.Owen Anderson2010-10-262-12/+40
| | | | llvm-svn: 117374
* Don't verify physical registers going into landing pads.Jakob Stoklund Olesen2010-10-261-0/+8
| | | | | | Magic is happening that we don't understand. llvm-svn: 117370
* Implement some relaxations for arithmetic instructions. The limitationRafael Espindola2010-10-261-12/+92
| | | | | | | on RIP relative relocations looks artificial, but this is a superset of what we were able to do before. llvm-svn: 117364
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