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* [AMDGPU] Add default ISA version targetsStanislav Mekhanoshin2018-03-061-0/+6
| | | | | | | | | | | In case if -mattr used to modify feature set bits in llvm-mc call getIsaVersion can fail to identify specific ISA due to test mismatch. Adding default fallback tests which will always correctly report at least major version. Differential Revision: https://reviews.llvm.org/D44163 llvm-svn: 326825
* [CodeView] Emit UdtSourceLine information for enumsAaron Smith2018-03-062-13/+29
| | | | | | | | | | | | | | | | | Summary: - Emit UdtSourceLine information for enums to match MSVC - Add a method to add UDTSrcLine and call it for all Class/Struct/Union/Enum - Update test cases to verify the changes Reviewers: zturner, llvm-commits, rnk Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D44116 llvm-svn: 326824
* Refactor check for dllimport in the Verifier.Rafael Espindola2018-03-061-11/+6
| | | | | | This avoids duplicated code and now also rejects dllimport aliases. llvm-svn: 326814
* [ValueTracking] move helpers for SelectPatterns from InstCombine to ↵Sanjay Patel2018-03-062-51/+35
| | | | | | | | | ValueTracking Most of the folds based on SelectPatternResult belong in InstSimplify rather than InstCombine, so the helper code should be available to other passes/analysis. llvm-svn: 326812
* [AArch64] define isExtractSubvectorCheapSebastian Pop2018-03-062-0/+13
| | | | | | | | | | | | | | | | | | Following the ARM-neon backend, define isExtractSubvectorCheap to return true when extracting low and high part of a neon register. The patch disables a test in llvm/test/CodeGen/AArch64/arm64-ext.ll This testcase is fragile in the sense that it requires a BUILD_VECTOR to "survive" all DAG transforms until ISelLowering. The testcase is supposed to check that AArch64TargetLowering::ReconstructShuffle() works, and for that we need a BUILD_VECTOR in ISelLowering. As we now transform the BUILD_VECTOR earlier into an VEXT + vector_shuffle, we don't have the BUILD_VECTOR pattern when we get to ISelLowering. As there is no way to disable the combiner to only exercise the code in ISelLowering, the patch disables the testcase. Differential revision: https://reviews.llvm.org/D43973 llvm-svn: 326811
* [Asm] Fix another layering violation in assmebly macro dumpingOliver Stannard2018-03-061-1/+1
| | | | | | | | AsmToken is in the MCParser library, so we can't use its dump function from MCAsmMacro in the MC library. Instead, just print the string, which we don't need the MCParser library for. llvm-svn: 326810
* [Pipeliner] Test commit: fixed spelling mistake in commentsRoorda, Jan-Willem2018-03-061-1/+1
| | | | | | | | | | Reviewers: bcahoon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44152 llvm-svn: 326808
* [AMDGPU] Fix lowering OpenCL enqueue_kernelYaxun Liu2018-03-061-27/+25
| | | | | | | | | | One addrspacecast disappeared in clang emitted IR for block invoke function due to adoption of the new addr space mapping. Differential Revision: https://reviews.llvm.org/D43785 llvm-svn: 326806
* [ARM][Asm] Fix layering violation introduced by r326795Oliver Stannard2018-03-061-1/+6
| | | | | | | The MCAsmMacro::dump function is in the MCParser library, so can't be called from the MC library. llvm-svn: 326804
* [ARM]Decoding MSR with unpredictable destination register causes an assertSimi Pallipurath2018-03-063-3/+17
| | | | | | | | | | | | | | | This patch handling: Enable parsing of raw encodings of system registers . Allows UNPREDICTABLE sysregs to be decoded to a raw number in the same way that disasslib does, rather than llvm crashing. Disassemble msr/mrs with unpredictable sysregs as SoftFail. Fix regression due to SoftFailing some encodings. Patch by Chris Ryder Differential revision:https://reviews.llvm.org/D43374 llvm-svn: 326803
* test commit: fix typo in comment Simi Pallipurath2018-03-061-1/+1
| | | | | | This is a simple change to do the test commit and verify commit access. llvm-svn: 326800
* [Asm] Add debug printing for assembler macrosOliver Stannard2018-03-062-0/+43
| | | | | | | | | This adds some debug printing (gated behind the "asm-macros" debug flag) which can help tracing complicated assembly macros. Differential revision: https://reviews.llvm.org/D43937 llvm-svn: 326795
* [Asm] Refactor debug printing of AsmTokenOliver Stannard2018-03-061-0/+93
| | | | | | | | | | | | | | * Move printing from llvm-mc to the AsmToken class, so that it can be used elsewhere. * Add 5 cases which were missed: BigNum, Comment, HashDirective, Space and BackSlash, and remove the default case so that -Wswitch will catch this error in future. This is almost NFC, except for the fact that llvm-mc can now print those 5 tokens in -as-lex mode. Differential revision: https://reviews.llvm.org/D43936 llvm-svn: 326794
* [CallSiteSplitting] Do not crash when BB's terminator changes.Florian Hahn2018-03-061-1/+7
| | | | | | | | | | | | | | | Change doCallSiteSplitting to iterate until we reach the terminator instruction. tryToSplitCallSite can replace BB's terminator in case BB is a successor of itself. Then IE will be invalidated and we also have to check the current terminator. Reviewers: junbuml, davidxl, davide, fhahn Reviewed By: fhahn, junbuml Differential Revision: https://reviews.llvm.org/D43824 llvm-svn: 326793
* TableGen: Add !foldl operationNicolai Haehnle2018-03-064-3/+193
| | | | | Change-Id: I63d67bf6e0b315e2d3360e47e3b62c9517f38987 llvm-svn: 326790
* TableGen: Remove the ResolveFirst mechanismNicolai Haehnle2018-03-061-6/+0
| | | | | | | | | | | | | | | Summary: It is no longer used. Change-Id: I1e47267d1975d43ad43acd6347f54e958e3b6c86 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43757 llvm-svn: 326789
* TableGen: Delay instantiating inline anonymous recordsNicolai Haehnle2018-03-062-44/+178
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Only instantiate anonymous records once all variable references in template arguments have been resolved. This allows patterns like the new test case, which in practice can appear in expressions like: class IntrinsicTypeProfile<list<LLVMType> ty, int shift> { list<LLVMType> types = !listconcat(ty, [llvm_any_ty, LLVMMatchType<shift>]); } class FooIntrinsic<IntrinsicTypeProfile P, ...> : Intrinsic<..., P.types, ...>; Without this change, the anonymous LLVMMatchType instantiation would never get resolved. Another consequence of this change is that anonymous inline instantiations are uniqued via the folding set of the newly introduced VarDefInit. Change-Id: I7a7041a20e297cf98c9109b28d85e64e176c932a Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43756 llvm-svn: 326788
* TableGen: Move getNewAnonymousName into RecordKeeperNicolai Haehnle2018-03-063-17/+14
| | | | | | | | | | | | | | | | Summary: So that we will be able to generate new anonymous names more easily outside the parser as well. Change-Id: I28f396a7bdbc3ff0c665d466abbd3d31376e21b4 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43755 llvm-svn: 326787
* TableGen: Explicitly check whether a record has been resolvedNicolai Haehnle2018-03-062-3/+77
| | | | | | | | | | | | | | | | | | Summary: There are various places where resolving and constant folds can get stuck, especially around casts. We don't always signal an error for those, because in many cases they can legitimately occur without being an error in the "untaken branch" of an !if. Change-Id: I3befc0e4234c8e6cc61190504702918c9f29ce5c Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43754 llvm-svn: 326786
* TableGen: Allow !cast of records, cleanup conversion machineryNicolai Haehnle2018-03-062-131/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Distinguish two relationships between types: is-a and convertible-to. For example, a bit is not an int or vice versa, but they can be converted into each other (with range checks that you can think of as "dynamic": unlike other type checks, those range checks do not happen during parsing, but only once the final values have been established). Actually converting initializers between types is subtle: even when values of type A can be converted to type B (e.g. int into string), it may not be possible to do so with a concrete initializer (e.g., a VarInit that refers to a variable of type int cannot be immediately converted to a string). For this reason, distinguish between getCastTo and convertInitializerTo: the latter implements the actual conversion when appropriate, while the former will first try to do the actual conversion and fall back to introducing a !cast operation so that the conversion will be delayed until variable references have been resolved. To make the approach of adding !cast operations to work, !cast needs to fallback to convertInitializerTo when the special string <-> record logic does not apply. This enables casting records to a subclass, although that new functionality is only truly useful together with !isa, which will be added in a later change. The test is removed because it uses !srl on a bit sequence, which cannot really be supported consistently, but luckily isn't used anywhere either. Change-Id: I98168bf52649176654ed2ec61a29bdb29970cfe7 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43753 llvm-svn: 326785
* TableGen: Simplify BitsInit::resolveReferencesNicolai Haehnle2018-03-061-35/+16
| | | | | | | | | | | | | | | | | | | | Summary: No functional change intended. The removed code has a loop for recursive resolving, which is superseded by the recursive resolving done by the Resolver implementations. Add a test case which was broken by an earlier version of this change. Change-Id: Ib208d037b77a8bbb725977f1388601fc984723d8 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43655 llvm-svn: 326784
* TableGen: Generalize record types to fix typeIsConvertibleTo et al.Nicolai Haehnle2018-03-062-43/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Allow RecordRecTy to represent the type "subclass of N superclasses", where N may be zero. Furthermore, generate RecordRecTy instances only with actual classes in the list. Keeping track of multiple superclasses is required to resolve the type of a list correctly in some cases. The old code relied on the incorrect behavior of typeIsConvertibleTo, and an earlier version of this change relied on a modified ordering of superclasses (it was committed in r325884 and then reverted because unfortunately some of clang-tblgen's backends depend on the ordering). Previously, the DefInit for each Record would have a RecordRecTy of that Record as its type. Now, all defs with the same superclasses will share the same type. This allows us to be more consistent about type checks involving records: - typeIsConvertibleTo actually requires the LHS to be a subtype of the RHS - resolveTypes will return the least supertype of given record types in all cases - different record types in the two branches of an !if are handled correctly Add a test that used to be accepted without flagging the obvious type error. Change-Id: Ib366db1a4e6a079f1a0851e469b402cddae76714 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43680 llvm-svn: 326783
* Fixup for rL326769 (RegState::Debug is being truncated to a bool)Bjorn Pettersson2018-03-061-2/+5
| | | | | | | | | I obviously messed up arguments to MachineOperand::CreateReg in rL326769. This should make it work as intended. Thanks to RKSimon for spotting this. llvm-svn: 326780
* [CloneFunction] Support BB == PredBB in DuplicateInstructionsInSplit.Florian Hahn2018-03-061-1/+3
| | | | | | | | | | | | | | | | In case PredBB == BB and StopAt == BB's terminator, StopAt != &*BI will fail, because BB's terminator instruction gets replaced. By using BB.getTerminator() we get the current terminator which we can use to compare. Reviewers: sanjoy, anna, reames Reviewed By: anna Differential Revision: https://reviews.llvm.org/D43822 llvm-svn: 326779
* [AVR] Remove the earlyclobber flag from LDDWRdYQDylan McKay2018-03-061-2/+16
| | | | | | | | | | | | | | | | | Before I started maintaining the AVR backend, this instruction never originally used to have an earlyclobber flag. Some time afterwards (years ago), I must've added it back in, not realising that it was left out for a reason. This pseudo instrction exists solely to work around a long standing bug in the register allocator. Before this commit, the LDDWRdYQ pseudo was not actually working around any bug. With the earlyclobber flag removed again, the LDDWRdYQ pseudo now correctly works around PR13375 again. llvm-svn: 326774
* [DebugInfo] Discard invalid DBG_VALUE instructions in LiveDebugVariablesBjorn Pettersson2018-03-061-1/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is a workaround for pr36417 https://bugs.llvm.org/show_bug.cgi?id=36417 LiveDebugVariables will now verify that the DBG_VALUE instructions are sane (prior to register allocation) by asking LIS if a virtual register used in the DBG_VALUE is live (or dead def) in the slot index before the DBG_VALUE. If it isn't sane the DBG_VALUE is discarded. One pass that was identified as introducing non-sane DBG_VALUE instructtons, when analysing pr36417, was the DAG->DAG Instruction Selection. It sometimes inserts DBG_VALUE instructions referring to a virtual register that is defined later in the same basic block. So it is a use before def kind of problem. The DBG_VALUE is typically inserted in the beginning of a basic block when this happens. The problem can be seen in the test case test/DebugInfo/X86/dbg-value-inlined-parameter.ll Reviewers: aprantl, rnk, probinson Reviewed By: aprantl Subscribers: vsk, davide, alexcrichton, Ka-Ka, eraman, llvm-commits, JDevlieghere Differential Revision: https://reviews.llvm.org/D43956 llvm-svn: 326769
* [WebAssebmly] Remove reloc ordering constraintSam Clegg2018-03-061-3/+1
| | | | | | | | | | | | | The MC layer doesn't currently emit relocations in offset order for the entire code section so this check was causing failures on the wasm waterfall. Perhaps we can re-instate this check if we divide the relocations per-function, or add extra ordering the MC object writer. Differential Revision: https://reviews.llvm.org/D44136 llvm-svn: 326765
* [X86] Handle EAX being live when calling chkstk for x86_64Martin Storsjo2018-03-061-17/+25
| | | | | | | | | | | | EAX can turn out to be alive here, when shrink wrapping is done (which is allowed when using dwarf exceptions, contrary to the normal case with WinCFI). This fixes PR36487. Differential Revision: https://reviews.llvm.org/D43968 llvm-svn: 326764
* Revert "[DWARFv5] Emit file 0 to the line table."Paul Robinson2018-03-067-117/+66
| | | | | | | | | Caused an asan failure. This reverts commit d54883f081186cdcce74e6f98cfc0438579ec019. aka r326758 llvm-svn: 326762
* [MergeICmp] Simplify how BCECmpBlock instructions are blacklistedXin Tong2018-03-061-10/+4
| | | | llvm-svn: 326761
* [MergeICmp] Fix printing. NFCXin Tong2018-03-061-1/+1
| | | | llvm-svn: 326760
* [DWARFv5] Emit file 0 to the line table.Paul Robinson2018-03-067-66/+117
| | | | | | | | | | | DWARF v5 specifies that the root file (also given in the DW_AT_name attribute of the compilation unit DIE) should be emitted explicitly to the line table's list of files. This makes the line table more independent of the .debug_info section. Differential Revision: https://reviews.llvm.org/D44054 llvm-svn: 326758
* [X86] cvttpd2dq lowering has been supported for some timeSimon Pilgrim2018-03-051-9/+0
| | | | | | Tests in vec_fp_to_int.ll llvm-svn: 326751
* [InstSimplify] remove redundant foldsSanjay Patel2018-03-051-18/+0
| | | | | | | | | | | | The 'hasOneUse' check is a giveaway that something's not right. We never need to check that in InstSimplify because we don't create new instructions here. These are all handled as icmp simplifies which then trigger existing select simplifies, so there's no need to duplicate a composite fold of the two. llvm-svn: 326750
* GlobalISel: IRTranslate llvm.fabs.* intrinsicVolkan Keles2018-03-051-0/+5
| | | | | | | | | | | | | | | | Summary: Fabs is a common floating-point operation, especially for some expansions. This patch adds a new generic opcode for llvm.fabs.* intrinsic in order to avoid building/matching this intrinsic. Reviewers: qcolombet, aditya_nandakumar, dsanders, rovka Reviewed By: aditya_nandakumar Subscribers: kristof.beyls, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D43864 llvm-svn: 326749
* [RewriteStatepoints] Fix stale parse pointsDaniel Neilson2018-03-051-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | Summary: RewriteStatepointsForGC collects parse points for further processing. During the collection if a callsite is found in an unreachable block (DominatorTree::isReachableFromEntry()) then all unreachable blocks are removed by removeUnreachableBlocks(). Some of the removed blocks could have been reachable according to DominatorTree::isReachableFromEntry(). In this case the collected parse points became stale and resulted in a crash when accessed. The fix is to unconditionally canonicalize the IR to removeUnreachableBlocks and then collect the parse points. The added test crashes with the old version and passes with this patch. Patch by Yevgeny Rouban! Reviewed by: Anna Differential Revision: https://reviews.llvm.org/D43929 llvm-svn: 326748
* [AMDGPU] Remove unused AMDOpenCL triple environmentTony Tye2018-03-051-2/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D43895 llvm-svn: 326745
* Re-commit: Make STATISTIC() values available programmaticallyDaniel Sanders2018-03-051-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: It can be useful for tools to be able to retrieve the values of variables declared via STATISTIC() directly without having to emit them and parse them back. Use cases include: * Needing to report specific statistics to a test harness * Wanting to post-process statistics. For example, to produce a percentage of functions that were fully selected by GlobalISel Make this possible by adding llvm::GetStatistics() which returns an iterator_range that can be used to inspect the statistics that have been touched during execution. When statistics are disabled (NDEBUG and not LLVM_ENABLE_STATISTICS) this method will return an empty range. This patch doesn't address the effect of multiple compilations within the same process. In such situations, the statistics will be cumulative for all compilations up to the GetStatistics() call. Reviewers: qcolombet, rtereshin, aditya_nandakumar, bogner Reviewed By: rtereshin, bogner Subscribers: llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D43901 This re-commit fixes a missing include of <vector> which it seems clang didn't mind but G++ and MSVC objected to. It seems that, clang was ok with std::vector only being forward declared at the point of use since it was fully defined eventually but G++/MSVC both rejected it at the point of use. llvm-svn: 326738
* On Windows we need to be able to process response files with Windows-styleDmitry Mikulin2018-03-051-1/+5
| | | | | | | | path names. Differential Revision: https://reviews.llvm.org/D43988 llvm-svn: 326737
* [PowerPC] Do not emit record-form rotates when record-form andi sufficesNemanja Ivanovic2018-03-051-0/+27
| | | | | | | | | | | | | | | | Up until Power9, the performance profile for rlwinm., rldicl. and andi. looked more or less equivalent. However with Power9, the rotates are still 2-way cracked whereas the and-immediate is not. This patch just ensures that we don't emit record-form rotates when an andi. is adequate. As first pointed out by Carrot in https://bugs.llvm.org/show_bug.cgi?id=30833 (this patch is a fix for that PR). Differential Revision: https://reviews.llvm.org/D43977 llvm-svn: 326736
* Fix an unused variable warning introduced by rr326703. NFCEric Liu2018-03-051-1/+3
| | | | llvm-svn: 326732
* [InstCombine] Don't blow up in foldICmpWithCastAndCast on vector icmp ↵Daniel Neilson2018-03-051-1/+8
| | | | | | | | | | | | | | | | | | | | | | | instructions. Summary: Presently, InstCombiner::foldICmpWithCastAndCast() implicitly assumes that it is only invoked with icmp instructions of integer type. If that assumption is broken, and it is called with an icmp of vector type, then it fails (asserts/crashes). This patch addresses the deficiency. It allows it to simplify icmp (ptrtoint x), (ptrtoint/c) of vector type into a compare of the inputs, much as is done when the type is integer. Reviewers: apilipenko, fedor.sergeev, mkazantsev, anna Reviewed By: anna Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44063 llvm-svn: 326730
* [InstCombine] Add constant vector support to getMinimumFPType for visitFPTrunc.Craig Topper2018-03-051-0/+34
| | | | | | | | This patch teaches getMinimumFPType to support shrinking a vector of ConstantFPs. This should improve our ability to combine vector fptrunc with fp binops. Differential Revision: https://reviews.llvm.org/D43774 llvm-svn: 326729
* Revert r326723: Make STATISTIC() values available programmaticallyDaniel Sanders2018-03-051-25/+5
| | | | | | Despite building cleanly on my machine in three separate configs, it's failing on pretty much all bots due to missing includes among other things. Investigating. llvm-svn: 326726
* Make STATISTIC() values available programmaticallyDaniel Sanders2018-03-051-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: It can be useful for tools to be able to retrieve the values of variables declared via STATISTIC() directly without having to emit them and parse them back. Use cases include: * Needing to report specific statistics to a test harness * Wanting to post-process statistics. For example, to produce a percentage of functions that were fully selected by GlobalISel Make this possible by adding llvm::GetStatistics() which returns an iterator_range that can be used to inspect the statistics that have been touched during execution. When statistics are disabled (NDEBUG and not LLVM_ENABLE_STATISTICS) this method will return an empty range. This patch doesn't address the effect of multiple compilations within the same process. In such situations, the statistics will be cumulative for all compilations up to the GetStatistics() call. Reviewers: qcolombet, rtereshin, aditya_nandakumar, bogner Reviewed By: rtereshin, bogner Subscribers: llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D43901 llvm-svn: 326723
* fix PR36582Sebastian Pop2018-03-051-3/+9
| | | | | | | | | The error occurs when reading i16 elements (as in the testcase) from a v8i8 with a pattern of <0,2,4,6>. As all the data in the vector is accessed, the operation is not a VUZP. The patch stops the pattern recognition of VUZP when EXTRACT_VECTOR_ELT has a different element type than BUILD_VECTOR. llvm-svn: 326722
* [IPSCCP] Add getCompare which returns either true, false, undef or null.Florian Hahn2018-03-051-6/+1
| | | | | | | | | | | | | | | getCompare returns true, false or undef constants if the comparison can be evaluated, or nullptr if it cannot. This is in line with what ConstantExpr::getCompare returns. It also allows us to use ConstantExpr::getCompare for comparing constants. Reviewers: davide, mssimpso, dberlin, anna Reviewed By: davide Differential Revision: https://reviews.llvm.org/D43761 llvm-svn: 326720
* [AArch64] Improve code generation of constant vectorsEvandro Menezes2018-03-052-35/+44
| | | | | | | | | | | | | Use the whole gammut of constant immediates available to set up a vector. Instead of using, for example, `mov w0, #0xffff; dup v0.4s, w0`, which transfers between register files, use the more efficient `movi v0.4s, #-1` instead. Not limited to just a few values, but any immediate value that can be encoded by all the variants of `FMOV`, `MOVI`, `MVNI`, thus eliminating the need to there be patterns to optimize special cases. Differential revision: https://reviews.llvm.org/D42133 llvm-svn: 326718
* [MachineScheduler] Dump SUnits before calling SchedImpl->initialize()Jonas Paulsson2018-03-051-4/+4
| | | | | | | | | | | | | | | This is a NFC simple patch that changes the DEBUG dumping in the MachineScheduler so that the dumping of the built SUnits is done before the SchedImpl->initialize() is called. This is better on SystemZ, since it has a strategy that does some dumping at the start of the region, and it is not possible to easily read it if it is output above a long list of SU. Review: Javed Absar https://reviews.llvm.org/D44089 llvm-svn: 326716
* AMDGPU/GlobalISel: Add InstrMapping for G_EXTRACTMatt Arsenault2018-03-051-0/+9
| | | | llvm-svn: 326715
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