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* Replace all target specific implicit def instructions with a target ↵Evan Cheng2008-03-1524-170/+31
| | | | | | independent one: TargetInstrInfo::IMPLICIT_DEF. llvm-svn: 48380
* Expose Module::dump via C and Ocaml.Gordon Henriksen2008-03-141-0/+4
| | | | | | Patch by Erick Tryzelaar. llvm-svn: 48379
* Do not generate special entries in the dwarf ehDuncan Sands2008-03-141-6/+2
| | | | | | table for nounwind calls. llvm-svn: 48373
* Fix PR2138. Apparently any modification to a std::multimap (including remove ↵Evan Cheng2008-03-141-2/+8
| | | | | | entries for a different key) can invalidate multimap iterators. llvm-svn: 48371
* this was removed from the Unix side.Chris Lattner2008-03-141-5/+0
| | | | llvm-svn: 48370
* Update comments; getPassName no longer uses RTTI.Dan Gohman2008-03-141-2/+4
| | | | llvm-svn: 48369
* Implement the real calling convention for ppc32 Altivec:Dale Johannesen2008-03-141-21/+118
| | | | | | | vectors go at the end of the memory area, after all non-vector parameters. llvm-svn: 48364
* Fix some 80 col violations.Evan Cheng2008-03-141-22/+22
| | | | llvm-svn: 48361
* Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, ↵Evan Cheng2008-03-143-32/+32
| | | | | | etc. have 8-bits immediate field (ImmT == Imm8). llvm-svn: 48360
* Add debugging stuff.Evan Cheng2008-03-141-0/+4
| | | | llvm-svn: 48359
* Add an issue that is preventing instcombine from doing a simplification.Chris Lattner2008-03-141-5/+43
| | | | llvm-svn: 48356
* Simplify using getIntPtrConstant.Duncan Sands2008-03-141-5/+3
| | | | llvm-svn: 48355
* The inst combining of inttoptr into GEP with one index was using the bit size ofBill Wendling2008-03-141-1/+1
| | | | | | | | the type instead of the byte size. This was causing troublesome mis-compilations. True to form, this took 2 days to find and is a one-line fix. :-P llvm-svn: 48354
* Tabs -> spacesNate Begeman2008-03-141-14/+23
| | | | | | | Use getIntPtrConstant in a couple places to shorten stuff up Handle splitting vector shuffles with undefs in the mask llvm-svn: 48351
* Livein copy scheduling fixes: do not coalesce physical register copies, ↵Evan Cheng2008-03-141-112/+42
| | | | | | correctly determine the safe location to insert the copies. llvm-svn: 48348
* Use SDTNone instead of duplicating it.Dan Gohman2008-03-132-4/+2
| | | | llvm-svn: 48346
* More APInt-ification.Dan Gohman2008-03-135-67/+77
| | | | llvm-svn: 48344
* Fix a bug in GVN that Duncan noticed, where we potentially need to insert a Owen Anderson2008-03-131-1/+5
| | | | | | pointer bitcast when performing return slot optimization. llvm-svn: 48343
* Undo tweak. It had no obvious benefit.Evan Cheng2008-03-131-19/+4
| | | | llvm-svn: 48341
* Remove unused GetAddressOfSymbol()Devang Patel2008-03-131-6/+1
| | | | | | Thanks Daniel Dunbar! llvm-svn: 48340
* Typo.Evan Cheng2008-03-131-1/+1
| | | | llvm-svn: 48337
* Don't try to sink 3-address instruction if convertToThreeAddress created ↵Evan Cheng2008-03-131-1/+6
| | | | | | more than one instructions. llvm-svn: 48336
* Remove an unused command line option.Evan Cheng2008-03-131-9/+0
| | | | llvm-svn: 48334
* TwoAddressInstructionPass enhancement. After it converts a two address ↵Evan Cheng2008-03-131-13/+131
| | | | | | instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one. llvm-svn: 48333
* Get rid of a pseudo instruction and replace it with subreg based operation ↵Christopher Lamb2008-03-139-67/+50
| | | | | | | on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes. llvm-svn: 48329
* Fix Path::GetMainExecutable on cygwin, patch by Sam Bishop.Chris Lattner2008-03-131-1/+10
| | | | llvm-svn: 48328
* remove extraneous namespace qualifier, PR2142Chris Lattner2008-03-131-2/+1
| | | | llvm-svn: 48327
* move a bunch of trivial methods to be inline.Chris Lattner2008-03-132-110/+2
| | | | llvm-svn: 48326
* Various improvements suggested by DuncanChris Lattner2008-03-131-1/+1
| | | | llvm-svn: 48325
* Update -mem2reg to use succ_iterator instead of iterating across TerminatorInstNick Lewycky2008-03-131-13/+10
| | | | | | successors. This makes it support nounwind. llvm-svn: 48320
* Remove unused options.Evan Cheng2008-03-131-13/+0
| | | | llvm-svn: 48319
* Eliminate a few unnecessary uses of dynamic_cast.Dan Gohman2008-03-131-7/+4
| | | | llvm-svn: 48318
* Fix a typo.Dan Gohman2008-03-131-1/+1
| | | | llvm-svn: 48317
* Don't redundantly clear std::vector members in destructors.Dan Gohman2008-03-131-3/+0
| | | | llvm-svn: 48316
* Change PMTopLevelManager's PassManagers vector element type fromDan Gohman2008-03-131-12/+13
| | | | | | | | | | | Pass* to PMDataManager*. PMDataManager is more specific than Pass, so this more accurately describes the objects that are being stored. This eliminates the need for several dynamic_casts to PMDataManager*. It does introduce one dynamic_cast though, in dumpPasses(). Give this one a comment describing why a dynamic_cast is being used. llvm-svn: 48315
* Change PMStack::push to accept a PMDataManager* instead ofDan Gohman2008-03-131-2/+1
| | | | | | | a Pass*. PMDataManager* is what it actually holds, so this makes it clearer. llvm-svn: 48314
* Refactor some code out of MachineSink into a MachineInstr query.Evan Cheng2008-03-132-29/+38
| | | | llvm-svn: 48311
* Do not promote float params to double in varargsDale Johannesen2008-03-121-6/+0
| | | | | | | | | calls here. This was done earlier for params in the varargs part of the params; any float params that survive to here are in the non-varargs part, and must not be promoted. llvm-svn: 48310
* Experimental scheduler change to schedule / coalesce the copies added for ↵Evan Cheng2008-03-121-23/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031<def> = MOVPC32r 0 %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def> %reg1028<def> = MOV32rr %EAX %reg1029<def> = MOV32rr %EDX %reg1030<def> = MOV32rr %ECX %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0] %reg1025<def> = MOV32rr %reg1029 %reg1026<def> = MOV32rr %reg1030 %reg1024<def> = MOV32rr %reg1028 The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled. With -schedule-livein-copies: entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031<def> = MOVPC32r 0 %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def> %reg1024<def> = MOV32rr %EAX %reg1025<def> = MOV32rr %EDX %reg1026<def> = MOV32rr %ECX %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0] Much better! llvm-svn: 48307
* Initial soft-float support for LegalizeTypes. I rewroteDuncan Sands2008-03-126-34/+248
| | | | | | | | | | | | | | | | | | | | | the fcopysign expansion from LegalizeDAG to get rid of what seems to be a bug: the use of sign extension means that when copying the sign bit from an f32 to an f64, the upper 32 bits of the f64 (now an i64) are set, not just the top bit... I also generalized it to work for any sized floating point types, and removed the bogosity: SDOperand Mask1 = (SrcVT == MVT::f64) ? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT) : DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT); Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1); (here SrcNVT is an integer with the same size as SrcVT). As far as I can see this takes a 1 << 63, converts to a double, converts that to a floating point constant then converts that to an integer constant, ending up with... 1 << 63 as an integer constant! So I just generate this integer constant directly. llvm-svn: 48305
* Change VirtRegMap's dump to dump to cerr, not DOUT, so that itDan Gohman2008-03-121-1/+1
| | | | | | | can be called from within a debuger without having -debug specified on the command-line. llvm-svn: 48298
* Fix typos in comments.Dan Gohman2008-03-121-2/+2
| | | | llvm-svn: 48297
* Fix typo.Duncan Sands2008-03-121-1/+1
| | | | llvm-svn: 48295
* Don't try to extract an i32 from an f64. ThisDuncan Sands2008-03-122-12/+22
| | | | | | | | | | | | getCopyToParts problem was noticed by the new LegalizeTypes infrastructure. In order to avoid this kind of thing in the future I've added a check that EXTRACT_ELEMENT is only used with integers. Once LegalizeTypes is up and running most likely BUILD_PAIR and EXTRACT_ELEMENT can be removed, in favour of using apints instead. llvm-svn: 48294
* Reimplement the parameter attributes support, phase #1. hilights:Chris Lattner2008-03-1223-1005/+857
| | | | | | | | | | | | | | | | | | | | | | | 1. There is now a "PAListPtr" class, which is a smart pointer around the underlying uniqued parameter attribute list object, and manages its refcount. It is now impossible to mess up the refcount. 2. PAListPtr is now the main interface to the underlying object, and the underlying object is now completely opaque. 3. Implementation details like SmallVector and FoldingSet are now no longer part of the interface. 4. You can create a PAListPtr with an arbitrary sequence of ParamAttrsWithIndex's, no need to make a SmallVector of a specific size (you can just use an array or scalar or vector if you wish). 5. All the client code that had to check for a null pointer before dereferencing the pointer is simplified to just access the PAListPtr directly. 6. The interfaces for adding attrs to a list and removing them is a bit simpler. Phase #2 will rename some stuff (e.g. PAListPtr) and do other less invasive changes. llvm-svn: 48289
* Improve the return slot optimization to be both more aggressive (not limited ↵Owen Anderson2008-03-121-93/+109
| | | | | | | | | to sret parameters), and safer (when the passed pointer might be invalid). Thanks to Duncan and Chris for the idea behind this, and extra thanks to Duncan for helping me work out the trap-safety. llvm-svn: 48280
* Clean up my own mess.Evan Cheng2008-03-123-7/+15
| | | | | | X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases. llvm-svn: 48279
* We also need to collect the VN IDs for the PHI instructions for later updating.Owen Anderson2008-03-121-1/+10
| | | | llvm-svn: 48278
* When we're determining what registers to coallesce, track the VNInfo IDs for ↵Owen Anderson2008-03-121-16/+32
| | | | | | | | the definitions that feed the PHI instructions. We'll need these IDs in order to update LiveIntervals properly. llvm-svn: 48277
* when the bitcode reader is referencing a paramattr, make sure to bump its ↵Chris Lattner2008-03-121-1/+12
| | | | | | refcount. llvm-svn: 48276
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