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* Fix comment grammar and capitalization.Matt Arsenault2013-10-021-3/+3
| | | | llvm-svn: 191850
* SLPVectorizer: Make store chain finding more aggressive with ↵Benjamin Kramer2013-10-021-9/+4
| | | | | | | | | GetUnderlyingObject. This recursively strips all GEPs like the existing code. It also handles bitcasts and other operations that do not change the pointer value. llvm-svn: 191847
* StructurizeCFG: Add dependency on LowerSwitch passTom Stellard2013-10-021-1/+3
| | | | | | | | Switch instructions were crashing the StructurizeCFG pass, and it's probably easier anyway if we don't need to handle them in this pass. Reviewed-by: Christian König <christian.koenig@amd.com> llvm-svn: 191841
* R600: Add a ldptr intrinsic to support MSAA.Vincent Lejeune2013-10-023-1/+10
| | | | llvm-svn: 191838
* Remove the very substantial, largely unmaintained legacy PGOChandler Carruth2013-10-0221-5630/+1
| | | | | | | | | | | | | | | | | | | | infrastructure. This was essentially work toward PGO based on a design that had several flaws, partially dating from a time when LLVM had a different architecture, and with an effort to modernize it abandoned without being completed. Since then, it has bitrotted for several years further. The result is nearly unusable, and isn't helping any of the modern PGO efforts. Instead, it is getting in the way, adding confusion about PGO in LLVM and distracting everyone with maintenance on essentially dead code. Removing it paves the way for modern efforts around PGO. Among other effects, this removes the last of the runtime libraries from LLVM. Those are being developed in the separate 'compiler-rt' project now, with somewhat different licensing specifically more approriate for runtimes. llvm-svn: 191835
* Remove "localize global" optimizationAlexey Samsonov2013-10-021-56/+3
| | | | | | | | | | | | | | | | Summary: As discussed in http://llvm-reviews.chandlerc.com/D1754, this optimization isn't really valid for C, and fires too rarely anyway. Reviewers: rafael, nicholas Reviewed By: nicholas CC: rnk, llvm-commits, nicholas Differential Revision: http://llvm-reviews.chandlerc.com/D1769 llvm-svn: 191834
* Fix option parsing in the gold plugin.Rafael Espindola2013-10-021-5/+7
| | | | | | | | | This was broken when options were moved up in r191680. No test because this is specific LLVMgold.so/libLTO.so. Patch by Tom Roeder! llvm-svn: 191829
* Add Support For .bss Named Section Directive For Darwin Targets.Rafael Espindola2013-10-021-0/+5
| | | | | | Patch by Nicholas White. llvm-svn: 191824
* AVX-512: fixed a bug in getLoadStoreRegOpcode() for AVX-512 targetElena Demikhovsky2013-10-022-8/+5
| | | | llvm-svn: 191818
* [DebugInfo] Further simplify DWARFDebugAranges public interfaceAlexey Samsonov2013-10-023-42/+33
| | | | llvm-svn: 191813
* AVX-512: Added TB prefix to all instructions without prefixes,Elena Demikhovsky2013-10-022-20/+18
| | | | | | otherwise encoding fails after the last change in X86MCCodeEmitter.cpp. llvm-svn: 191812
* This threads SectionName through the allocateCodeSection/allocateDataSection ↵Filip Pizlo2013-10-026-24/+34
| | | | | | | | | | | | | | | | | | APIs, both in C++ and C land. It's useful for the memory managers that are allocating a section to know what the name of the section is. At a minimum, this is useful for low-level debugging - it's customary for JITs to be able to tell you what memory they allocated, and as part of any such dump, they should be able to tell you some meta-data about what each allocation is for. This allows clients that supply their own memory managers to do this. Additionally, we also envision the SectionName being useful for passing meta-data from within LLVM to an LLVM client. This changes both the C and C++ APIs, and all of the clients of those APIs within LLVM. I'm assuming that it's safe to change the C++ API because that API is allowed to change. I'm assuming that it's safe to change the C API because we haven't shipped the API in a release yet (LLVM 3.3 doesn't include the MCJIT memory management C API). llvm-svn: 191804
* Debug Info: In DIBuilder, the derived-from field of a DW_TAG_pointer_typeManman Ren2013-10-015-87/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | is updated to use DITypeRef. Move isUnsignedDIType and getOriginalTypeSize from DebugInfo.h to be static helper functions in DwarfCompileUnit. We already have a static helper function "isTypeSigned" in DwarfCompileUnit, and a pointer to DwarfDebug is added to resolve the derived-from field. All three functions need to go across link for derived-from fields, so we need to get hold of a type identifier map. A pointer to DwarfDebug is also added to DbgVariable in order to resolve the derived-from field. Debug info verifier is updated to check a derived-from field is a TypeRef. Verifier will not go across link for derived-from fields, in debug info finder, we go across the link to add derived-from fields to types. Function getDICompositeType is only used by dragonegg and since dragonegg does not generate identifier for types, we use an empty map to resolve the derived-from field. When printing a derived-from field, we use DITypeRef::getName to either return the type identifier or getName of the DIType. A paired commit at clang is required due to changes to DIBuilder. llvm-svn: 191800
* [llvm-c][Disassembler] Add an option to reproduce in disassembled output theQuentin Colombet2013-10-011-8/+45
| | | | | | | | | | | | | | comments issued with verbose assembly. E.g., on a vector shuffle operation, disassembled output are: * Without the option: vpshufd $-0x79, (%rsp), %xmm0 * With the option: vpshufd $-0x79, (%rsp), %xmm0 ## xmm0 = mem[3,1,0,2] This part of <rdar://problem/14687488>. llvm-svn: 191799
* Debug Info: remove duplication of DIEs when a DIE is part of the type systemManman Ren2013-10-015-16/+112
| | | | | | | | | | | | | | | | | | | | | | | and it is shared across CUs. We add a few maps in DwarfDebug to map MDNodes for the type system to the corresponding DIEs: MDTypeNodeToDieMap, MDSPNodeToDieMap, and MDStaticMemberNodeToDieMap. These DIEs can be shared across CUs, that is why we keep the maps in DwarfDebug instead of CompileUnit. Sometimes, when we try to add an attribute to a DIE, the DIE is not yet added to its owner yet, so we don't know whether we should use ref_addr or ref4. We create a worklist that will be processed during finalization to add attributes with the correct form (ref_addr or ref4). We add addDIEEntry to DwarfDebug to be a wrapper around DIE->addValue. It checks whether we know the correct form, if not, we update the worklist (DIEEntryWorklist). A testing case is added to show that we only create a single DIE for a type MDNode and we use ref_addr to refer to the type DIE. llvm-svn: 191792
* R600: add a pass that merges clauses.Vincent Lejeune2013-10-017-2/+232
| | | | llvm-svn: 191790
* R600: Put PRED_X instruction in its own clauseVincent Lejeune2013-10-011-0/+8
| | | | llvm-svn: 191789
* R600: Enable -verify-machineinstrs in some tests.Vincent Lejeune2013-10-015-9/+19
| | | | llvm-svn: 191788
* [MC] When MCInstPrint::printAnnotation uses a comment stream, it has to ensureQuentin Colombet2013-10-011-2/+6
| | | | | | | | | that each comment ends with a newline to match the definition in the header file. This is part of <rdar://problem/14687488>. llvm-svn: 191787
* Don't merge tiny functions.Matt Arsenault2013-10-011-0/+12
| | | | | | | | | | | | | | | | | | | | | It's silly to merge functions like these: define void @foo(i32 %x) { ret void } define void @bar(i32 %x) { ret void } to get define void @bar(i32) { tail call void @foo(i32 %0) ret void } llvm-svn: 191786
* [DebugInfo] Simplify and speedup .debug_aranges parsingAlexey Samsonov2013-10-011-58/+25
| | | | | | | | | | | Parsing .debug_aranges section now takes O(nlogn) operations instead of O(n^2), where "n" is the number of address ranges. With this change, the time required to symbolize an address from a random large Clang-generated binary drops from 165 seconds to 1.5 seconds. No functionality change. llvm-svn: 191781
* Fixing MCJIT multiple module linking for OSXAndrew Kaylor2013-10-011-0/+4
| | | | llvm-svn: 191780
* [DebugInfo] Further simplify DWARFDebugAranges. No functionality change.Alexey Samsonov2013-10-012-56/+43
| | | | llvm-svn: 191779
* [DebugInfo] Remove unused functions from DWARFDebugAranges and fix code style.Alexey Samsonov2013-10-012-93/+44
| | | | llvm-svn: 191778
* [SystemZ] Add comparisons of high words and memoryRichard Sandiford2013-10-013-2/+30
| | | | llvm-svn: 191777
* [SystemZ] Add comparisons of large immediates using high wordsRichard Sandiford2013-10-012-2/+20
| | | | | | | There are no corresponding patterns for small immediates because they would prevent the use of fused compare-and-branch instructions. llvm-svn: 191775
* [SystemZ] Add immediate addition involving high wordsRichard Sandiford2013-10-014-2/+76
| | | | llvm-svn: 191774
* [SystemZ] Extend test-under-mask support to high GR32sRichard Sandiford2013-10-014-8/+27
| | | | llvm-svn: 191773
* [SystemZ] Extend 32-bit RISBG optimizations to high wordsRichard Sandiford2013-10-011-8/+16
| | | | | | | This involves using RISB[LH]G, whereas the equivalent z10 optimization uses RISBG. llvm-svn: 191770
* [SystemZ] Extend pseudo conditional 8- and 16-bit stores to high wordsRichard Sandiford2013-10-012-6/+22
| | | | | | As the comment says, we always want to use STOC for 32-bit stores. llvm-svn: 191767
* ARM: support interrupt attributeTim Northover2013-10-018-21/+148
| | | | | | | | | | | This function-attribute modifies the callee-saved register list and function epilogue (specifically the return instruction) so that a routine is suitable for use as an interrupt-handler of the specified type without disrupting user-mode applications. rdar://problem/14207019 llvm-svn: 191766
* [SystemZ] Optimize 32-bit FPR<->GPR moves for z196 and aboveRichard Sandiford2013-10-011-7/+18
| | | | | | | | Floats are stored in the high 32 bits of an FPR, and the only GPR<->FPR transfers are full-register transfers. This patch optimizes GPR<->FPR float transfers when the high word of a GPR is directly accessible. llvm-svn: 191764
* Add non-blocking Wait() for launched processesTareq A. Siraj2013-10-013-128/+145
| | | | | | | | | | | | | | | | | - New ProcessInfo class to encapsulate information about child processes. - Generalized the Wait() to support non-blocking wait on child processes. - ExecuteNoWait() now returns a ProcessInfo object with information about the launched child. Users will be able to use this object to perform non-blocking wait. - ExecuteNoWait() now accepts an ExecutionFailed param that tells if execution failed or not. These changes will allow users to implement basic process parallel tools. Differential Revision: http://llvm-reviews.chandlerc.com/D1728 llvm-svn: 191763
* [SystemZ] Allow integer AND involving high wordsRichard Sandiford2013-10-015-63/+107
| | | | llvm-svn: 191762
* [SystemZ] Allow integer XOR involving high wordsRichard Sandiford2013-10-014-5/+15
| | | | llvm-svn: 191759
* Remove several unused variables.Rafael Espindola2013-10-0113-20/+6
| | | | | | Patch by Alp Toker. llvm-svn: 191757
* [SystemZ] Allow integer OR involving high wordsRichard Sandiford2013-10-014-13/+41
| | | | llvm-svn: 191755
* [SystemZ] Allow integer insertions with a high-word destinationRichard Sandiford2013-10-014-2/+43
| | | | llvm-svn: 191753
* [SystemZ] Allow selects with a high-word destinationRichard Sandiford2013-10-012-2/+4
| | | | llvm-svn: 191751
* [SystemZ] Add patterns to load a constant into a high word (IIHF)Richard Sandiford2013-10-017-5/+59
| | | | | | | Similar to low words, we can use the shorter LLIHL and LLIHH if it turns out that the other half of the GR64 isn't live. llvm-svn: 191750
* [ARM] Remove an unused function from the disassembler.Joey Gouly2013-10-011-11/+0
| | | | | | Pointed out by Joerg. llvm-svn: 191749
* Test commit. Updated comment.Matheus Almeida2013-10-011-1/+1
| | | | llvm-svn: 191748
* [SystemZ] Add register zero extensions involving at least one high wordRichard Sandiford2013-10-013-2/+29
| | | | llvm-svn: 191746
* [ARM] Introduce the 'sevl' instruction in ARMv8.Joey Gouly2013-10-015-29/+22
| | | | | | | This also removes the restriction on the immediate field of the 'hint' instruction. llvm-svn: 191744
* [SystemZ] Add truncating high-word stores (STCH and STHH)Richard Sandiford2013-10-012-4/+24
| | | | llvm-svn: 191743
* [SystemZ] Add zero-extending high-word loads (LLCH and LLHH)Richard Sandiford2013-10-012-2/+22
| | | | llvm-svn: 191742
* SCEVExpander: Fix a regression I introduced by to eagerly adding RAII objects.Benjamin Kramer2013-10-011-1/+4
| | | | | | PR17425. llvm-svn: 191741
* [SystemZ] Add sign-extending high-word loads (LBH and LHH)Richard Sandiford2013-10-012-2/+22
| | | | llvm-svn: 191740
* [SystemZ] Use upper words of GR64s for codegenRichard Sandiford2013-10-0110-13/+184
| | | | | | | | | | | | | | This just adds the basics necessary for allocating the upper words to virtual registers (move, load and store). The move support is parameterised in a way that makes it easy to handle zero extensions, but the associated zero-extend patterns are added by a later patch. The easiest way of testing this seemed to be add a new "h" register constraint for high words. I don't expect the constraint to be useful in real inline asms, but it should work, so I didn't try to hide it behind an option. llvm-svn: 191739
* [SystemZ] Reapply: Add definitions of LFH and STFHRichard Sandiford2013-10-011-0/+4
| | | | | | | Originally committed as r191661, but reverted because it changed the matching order of comparisons on some hosts. That should have been fixed by r191735. llvm-svn: 191738
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