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* R600: Non vector only instruction can be scheduled on trans unitVincent Lejeune2013-09-044-19/+60
| | | | llvm-svn: 189980
* R600: Use SchedModel enum for is{Trans,Vector}Only functionsVincent Lejeune2013-09-044-23/+19
| | | | llvm-svn: 189979
* Unify and clean up.Eric Christopher2013-09-041-9/+4
| | | | llvm-svn: 189977
* ARM: Teach A15 SDOptimizer to properly handle D-reg by-lane.Jim Grosbach2013-09-041-0/+7
| | | | | | | | | | | | | These instructions, such as vmul.f32, require the second source operand to be in D0-D15 rather than the full D0-D31. When optimizing, make sure to account for that by constraining the register class of a replacement virtual register to be compatible with the virtual register(s) it's replacing. I've been unsuccessful in creating a non-fragile regression test. This issue was detected by the LLVM nightly test suite running on an A15 (Bullet). PR17093: http://llvm.org/bugs/show_bug.cgi?id=17093 llvm-svn: 189972
* Small simplification given that insert of an empty range is a nop.Rafael Espindola2013-09-041-2/+1
| | | | llvm-svn: 189971
* Refactor duplicated logic to a helper function.Rafael Espindola2013-09-041-36/+53
| | | | | | No functionality change. llvm-svn: 189969
* Remove dead code.Rafael Espindola2013-09-041-10/+0
| | | | llvm-svn: 189967
* Swift: Only build vldm/vstm with q register aligned register listsArnold Schwaighofer2013-09-041-1/+4
| | | | | | | | Unaligned vldm/vstm need more uops and therefore are slower in general on swift. radar://14522102 llvm-svn: 189961
* Fix scheduling for vldm/vstm instructions that load/store more than 32 bytes ↵Silviu Baranga2013-09-041-78/+54
| | | | | | on Cortex-A9. This also makes the existing code more compact. llvm-svn: 189958
* Revert "Add r159136 back now that pr13124 has been fixed."Rafael Espindola2013-09-041-11/+0
| | | | | | | | | | | | | | | | | | | This reverts commit r189886. I found a corner case where this optimization is not valid: Say we have a "linkonce_odr unnamed_addr" in two translation units: * In TU 1 this optimization kicks in and makes it hidden. * In TU 2 it gets const merged with a constant that is *not* unnamed_addr, resulting in a non unnamed_addr constant with default visibility. * The static linker rules for combining visibility them produce a hidden symbol, which is incorrect from the point of view of the non unnamed_addr constant. The one place we can do this is when we know that the symbol is not used from another TU in the same shared object, i.e., during LTO. I will move it there. llvm-svn: 189954
* Move generic isPrint and columnWidth implementations to a separate ↵Alexander Kornienko2013-09-045-115/+41
| | | | | | | | | | | | | | | | | | | | | header/source to allow using both generic and system-dependent versions on win32. Summary: This is needed so we can use generic columnWidthUTF8 in clang-format on win32 simultaneously with a separate system-dependent implementations of isPrint/columnWidth in TextDiagnostic.cpp to avoid attempts to print Unicode characters using narrow-character interfaces (which is not supported on Windows, and we'll have to figure out how to handle this). Reviewers: jordan_rose Reviewed By: jordan_rose CC: llvm-commits, klimek Differential Revision: http://llvm-reviews.chandlerc.com/D1559 llvm-svn: 189952
* Error on linking appending globals with different unnamed_addr.Rafael Espindola2013-09-041-1/+5
| | | | llvm-svn: 189950
* [Sparc] Fix an assertion failure while lowering fcmp on long double.Venkatraman Govindaraju2013-09-041-1/+1
| | | | | | | This assertion is triggered because an integer constant is created with wrong type. llvm-svn: 189948
* Fix linking of unnamed_addr in functions.Rafael Espindola2013-09-041-1/+5
| | | | llvm-svn: 189945
* Support/Process: Add comments about PageSize and AllocationGranularity on ↵NAKAMURA Takumi2013-09-042-2/+4
| | | | | | Cygwin and Win32. llvm-svn: 189940
* MemoryBuffer.cpp: Don't peek the next page if file is multiple of *physical* ↵NAKAMURA Takumi2013-09-041-0/+9
| | | | | | | | | pagesize(4k) but is not multiple of AllocationGranularity(64k), when a null terminator is required, on cygwin and win32. For example, r189780's SparcISelLowering.cpp has the size 98304. It crashed clang to touch a null terminator on cygwin. FIXME: It's not good to hardcode 4096 here. dwPageSize shows 4096. llvm-svn: 189939
* Whitespace.NAKAMURA Takumi2013-09-041-1/+1
| | | | llvm-svn: 189938
* Fix linking of unnamed_addr.Rafael Espindola2013-09-041-2/+6
| | | | | | | | This was regression from r134829. When linking we have to be conservative. If one of the symbols has a significant address, then the result should have it too. llvm-svn: 189935
* InstCombine: allow unmasked icmps to be combined with logical opsTim Northover2013-09-041-9/+29
| | | | | | | | | | "(icmp op i8 A, B)" is equivalent to "(icmp op i8 (A & 0xff), B)" as a degenerate case. Allowing this as a "masked" comparison when analysing "(icmp) &/| (icmp)" allows us to combine them in more cases. rdar://problem/7625728 llvm-svn: 189931
* InstCombine: look for masked compares with subset relationTim Northover2013-09-041-11/+75
| | | | | | | | | | | Even in cases which aren't universally optimisable like "(A & B) != 0 && (A & C) != 0", the masks can make one of the comparisons completely redundant. In this case, since we've gone to the effort of spotting masked comparisons we should combine them. rdar://problem/7625728 llvm-svn: 189930
* Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift ↵Hao Liu2013-09-046-38/+805
| | | | | | | | | | instructions: sshr,ushr,ssra,usra,srshr,urshr,srsra,ursra,sri,shl,sli,sqshlu,sqshl,uqshl,shrn,sqrshrun,sqshrn,uqshr,sqrshrn,uqrshrn,sshll,ushll and 4 convert instructions: scvtf,ucvtf,fcvtzs,fcvtzu llvm-svn: 189925
* Revert "Revert "Remove the darwin gdb option, that version of gdb is now ↵Michael Gottesman2013-09-042-36/+7
| | | | | | | | | | | | | | dead and the rest of the compatibility should be done on a dwarf-N level."" This reverts commit r189913. Talked with Eric on IRC. I am going to XFAIL the failing test since it is using what Eric described as "the member hack" which was needed on that old GDB. Sorry for the noise! llvm-svn: 189914
* Revert "Remove the darwin gdb option, that version of gdb is now dead and ↵Michael Gottesman2013-09-042-7/+36
| | | | | | | | | | | | the rest of the compatibility should be done on a dwarf-N level." This reverts commit r189903. This commit broke the phase 1 buildbot for a while. http://lab.llvm.org:8013/builders/clang-x86_64-darwin11-nobootstrap-RAincremental/builds/6684 llvm-svn: 189913
* Add llvm namespace to llvm::next.Michael Gottesman2013-09-041-2/+2
| | | | llvm-svn: 189912
* Use llvm::next() instead of incrementing begin iterators of std::vector.Michael Gottesman2013-09-041-2/+2
| | | | | | | | | | Iterator of std::vector may be implemented as a raw pointer. In this case begin iterators are rvalues and cannot be incremented. For example, this is the case with STDCXX implementation of vector. Patch by Konstantin Tokarev <annulen@yandex.ru>. llvm-svn: 189911
* Remove the darwin gdb option, that version of gdb is now dead andEric Christopher2013-09-042-36/+7
| | | | | | the rest of the compatibility should be done on a dwarf-N level. llvm-svn: 189903
* Make the default dwarf version 3 for darwin when we can't find oneEric Christopher2013-09-041-1/+5
| | | | | | in the module. Add a FIXME with a comment about darwin's ld. llvm-svn: 189902
* Add r159136 back now that pr13124 has been fixed.Rafael Espindola2013-09-031-0/+11
| | | | | | | | | | Original message: If a constant or a function has linkonce_odr linkage and unnamed_addr, mark hidden. Being linkonce_odr guarantees that it is available in every dso that needs it. Being a constant/function with unnamed_addr guarantees that the copies don't have to be merged. llvm-svn: 189886
* X86: Mark non-crashing report_fatal_errors() as such.Jim Grosbach2013-09-031-13/+19
| | | | | | | | | Previously, the clang crash handling code would kick in and give a crash report for these, even though they're not that sort of error. rdar://14882264 llvm-svn: 189878
* [objc-arc] Remove dead code from previous commit.Michael Gottesman2013-09-031-140/+0
| | | | llvm-svn: 189870
* [objc-arc] Turn off the objc_retainBlock -> objc_retain optimization.Michael Gottesman2013-09-031-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The reason that I am turning off this optimization is that there is an additional case where a block can escape that has come up. Specifically, this occurs when a block is used in a scope outside of its current scope. This can cause a captured retainable object pointer whose life is preserved by the objc_retainBlock to be deallocated before the block is invoked. An example of the code needed to trigger the bug is: ---- \#import <Foundation/Foundation.h> int main(int argc, const char * argv[]) { void (^somethingToDoLater)(); { NSObject *obj = [NSObject new]; somethingToDoLater = ^{ [obj self]; // Crashes here }; } NSLog(@"test."); somethingToDoLater(); return 0; } ---- In the next commit, I remove all the dead code that results from this. Once I put in the fixing commit I will bring back the tests that I deleted in this commit. rdar://14802782. rdar://14868830. llvm-svn: 189869
* Add a hashing routine that handles hashing types. Add a test forEric Christopher2013-09-032-0/+23
| | | | | | hashing the contents of DW_FORM_data1 on top of a type with attributes. llvm-svn: 189862
* Sentences end with periods.Eric Christopher2013-09-031-2/+2
| | | | llvm-svn: 189861
* Enable late-vectorization by default.Nadav Rotem2013-09-031-1/+1
| | | | | | | | | | | | | | | | | | | | This patch changes the default setting for the LateVectorization flag that controls where the loop-vectorizer is ran. Perf gains: SingleSource/Benchmarks/Shootout/matrix -37.33% MultiSource/Benchmarks/PAQ8p/paq8p -22.83% SingleSource/Benchmarks/Linpack/linpack-pc -16.22% SingleSource/Benchmarks/Shootout-C++/ary3 -15.16% MultiSource/Benchmarks/TSVC/NodeSplitting-flt/NodeSplitting-flt -10.34% MultiSource/Benchmarks/TSVC/NodeSplitting-dbl/NodeSplitting-dbl -7.12% Regressions: SingleSource/Benchmarks/Misc/lowercase 15.10% MultiSource/Benchmarks/TSVC/Equivalencing-flt/Equivalencing-flt 13.18% SingleSource/Benchmarks/Shootout-C++/matrix 8.27% SingleSource/Benchmarks/CoyoteBench/lpbench 7.30% llvm-svn: 189858
* Teach InstCombineLoadCast about address spaces.Matt Arsenault2013-09-031-2/+2
| | | | | | | | This is another one that doesn't matter much, but uses the right GEP index types in the first place. llvm-svn: 189854
* Use type form of getIntPtrType in alloca visitor.Matt Arsenault2013-09-031-2/+2
| | | | | | | This doesn't actually matter, since alloca is always 0 address space, but this is more consistent. llvm-svn: 189853
* WIP: Refactor some code so that it can be called by more than just one ↵Bill Wendling2013-09-031-60/+71
| | | | | | method. No functionality change. llvm-svn: 189849
* Revert "Revert "ARM: Improve pattern for isel mul of vector by scalar.""Jim Grosbach2013-09-031-0/+11
| | | | | | | | | This reverts commit r189648. Fixes for the previously failing clang-side arm_neon_intrinsics test cases will be checked in separately. llvm-svn: 189841
* Add the rest of the stock attributes to the attribute table.Eric Christopher2013-09-032-6/+240
| | | | | | | | This won't affect the kinds of hashes we test for as we actually do hashing based on form and attribute. Change the fission-hash testcase one last time to handle DW_AT_comp_dir. llvm-svn: 189840
* In this patch we are trying to do two things:Yi Jiang2013-09-031-11/+36
| | | | | | | | | 1) If the width of vectorization list candidate is bigger than vector reg width, we will break it down to fit the vector reg. 2) We do not vectorize the width which is not power of two. The performance result shows it will help some spec benchmarks. mesa improved 6.97% and ammp improved 1.54%. llvm-svn: 189830
* [SystemZ] Add support for TMHH, TMHL, TMLH and TMLLRichard Sandiford2013-09-032-8/+107
| | | | | | | | | For now this just handles simple comparisons of an ANDed value with zero. The CC value provides enough information to do any comparison for a 2-bit mask, and some nonzero comparisons with more populated masks, but that's all future work. llvm-svn: 189819
* [msan] Fix handling of select with struct arguments.Evgeniy Stepanov2013-09-031-3/+14
| | | | llvm-svn: 189796
* [msan] Fix select instrumentation.Evgeniy Stepanov2013-09-031-3/+6
| | | | | | | Select condition shadow was being ignored resulting in false negatives. This change OR-s sign-extended condition shadow into the result shadow. llvm-svn: 189785
* [Sparc] Add support for soft long double (fp128).Venkatraman Govindaraju2013-09-033-18/+422
| | | | llvm-svn: 189780
* Add hadSideEffects=0 to some instructions.Craig Topper2013-09-031-1/+4
| | | | llvm-svn: 189779
* [Sparc] Implement spill and load for long double(f128) registers.Venkatraman Govindaraju2013-09-022-36/+123
| | | | llvm-svn: 189768
* ARM: Default to the Swift CPU when targeting armv7s/thumbv7s.Tilmann Scheller2013-09-021-2/+7
| | | | | | | | Test cases adjusted accordingly. This fixes rdar://14871821. llvm-svn: 189766
* Revert 189756 for now, it doesn't match what rdar://14871821 really wants.Tilmann Scheller2013-09-021-7/+2
| | | | | | What we really want is to enable Swift by default for *v7s triples (and there already seems to be some logic which attempts to do that). In that case the iOS version doesn't matter. llvm-svn: 189763
* ARM: Default to Swift when compiling for iOS 6 or later.Tilmann Scheller2013-09-021-2/+7
| | | | | | | | Test cases adjusted accordingly. This fixes rdar://14871821. llvm-svn: 189756
* Create BEXTR instructions for (and ((sra or srl) x, imm), (2**size - 1)). ↵Craig Topper2013-09-023-0/+29
| | | | | | Fixes PR17028. llvm-svn: 189742
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