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* [SCEV] Extract out a helper function; NFCSanjoy Das2016-07-221-7/+14
| | | | | | | The helper will get smarter in a later change, but right now this is just code reorganization. llvm-svn: 276467
* Fix include case. NFC.George Burgess IV2016-07-221-1/+1
| | | | llvm-svn: 276465
* GlobalISel: implement legalization pass, with just one transformation.Tim Northover2016-07-2214-4/+299
| | | | | | | | | This adds the actual MachineLegalizeHelper to do the work and a trivial pass wrapper that legalizes all instructions in a MachineFunction. Currently the only transformation supported is splitting up a vector G_ADD into one acting on smaller vectors. llvm-svn: 276461
* Make PDBFile store an msf::Layout.Zachary Turner2016-07-223-55/+55
| | | | | | | | | | | Previously it was storing all the fields of an msf::Layout as separate members. This is a trivial cleanup to make it store an msf::Layout directly. This makes the code more readable since it becomes clear which fields of PDBFile are actually the msf specific layout information in a sea of other bookkeeping fields. llvm-svn: 276460
* [pdb] Have builders share a single BumpPtrAllocator.Zachary Turner2016-07-223-11/+17
| | | | | | | | | | | | | This makes it easier to have the writable and readable PDB interfaces share code since the read/write and write-only interfaces now share a single allocator, you don't have to worry about a builder building a read only interface and then having the read-only interface's data become corrupt when the builder goes out of scope. Now the allocator is specified explicitly to all constructors, so all interfaces can share a single allocator that is scoped appropriately. llvm-svn: 276459
* [msf] Create LLVMDebugInfoMsfZachary Turner2016-07-2237-179/+295
| | | | | | | | | | | | | | This provides a better layering of responsibilities among different aspects of PDB writing code. Some of the MSF related code was contained in CodeView, and some was in PDB prior to this. Further, we were often saying PDB when we meant MSF, and the two are actually independent of each other since in theory you can have other types of data besides PDB data in an MSF. So, this patch separates the MSF specific code into its own library, with no dependencies on anything else, and DebugInfoCodeView and DebugInfoPDB take dependencies on DebugInfoMsf. llvm-svn: 276458
* Recommit - [DSE]Enhance shorthening MemIntrinsic based on OverlapIntervalsJun Bum Lim2016-07-221-62/+151
| | | | | | | | | | | Recommiting r275571 after fixing crash reported in PR28270. Now we erase elements of IOL in deleteDeadInstruction(). Original Summary: This change use the overlap interval map built from partial overwrite tracking to perform shortening MemIntrinsics. Add test cases which was missing opportunities before. llvm-svn: 276452
* [PM] Port BreakCriticalEdges to the new PM.Wei Mi2016-07-223-2/+18
| | | | | | Differential Revision: https://reviews.llvm.org/D22688 llvm-svn: 276449
* Invariant start/end intrinsics overloaded for address spaceAnna Thomas2016-07-221-1/+27
| | | | | | | | | | | | | | | | | | | | | | Summary: The llvm.invariant.start and llvm.invariant.end intrinsics currently support specifying invariant memory objects only in the default address space. With this change, these intrinsics are overloaded for any adddress space for memory objects and we can use these llvm invariant intrinsics in non-default address spaces. Example: llvm.invariant.start.p1i8(i64 4, i8 addrspace(1)* %ptr) This overloaded intrinsic is needed for representing final or invariant memory in managed languages. Reviewers: apilipenko, reames Subscribers: llvm-commits llvm-svn: 276447
* [Hexagon] Make HexagonCodeGen depend on ScalarKrzysztof Parzyszek2016-07-221-12/+13
| | | | | | Hexagon backend uses LoopDataPrefetch pass that is defined in Scalar. llvm-svn: 276441
* AMDGPU: Fix groupstaticsize for large LDSMatt Arsenault2016-07-221-3/+3
| | | | | | | | | The size can exceed s_movk_i32's limit, and we don't want to use it this early since it inhibits optimizations. This should probably be merged to the release branch. llvm-svn: 276438
* AMDGPU: Add HSA dispatch id intrinsicMatt Arsenault2016-07-225-8/+31
| | | | llvm-svn: 276437
* AMDGPU: Delete more dead codeMatt Arsenault2016-07-2210-182/+15
| | | | | | | Remove dead code from r600 intrinsic removal. Remove unset members, rename StackSize to be less ambiguous. llvm-svn: 276436
* AMDGPU: Fix i1 fp_to_intMatt Arsenault2016-07-224-7/+34
| | | | | | | R600's i1 fp_to_uint selected but was incorrect according to what instcombine constant folds to. llvm-svn: 276435
* AMDGPU: Don't reinvent transferSuccessorsAndUpdatePHIsMatt Arsenault2016-07-221-26/+2
| | | | llvm-svn: 276434
* GlobalISel: implement alloca instructionTim Northover2016-07-226-11/+61
| | | | llvm-svn: 276433
* [SelectionDAG] Optimization of BITREVERSE legalization for power-of-2 ↵Simon Pilgrim2016-07-221-3/+46
| | | | | | | | | | | | | | integer scalar/vector types An extension of D19978, this patch replaces the default BITREVERSE evaluation of individual bit masks+shifts with block mask+shifts when we have integer elements of power-of-2 bits in size. After calling BSWAP to reverse the order of the constituent bytes (which typically follows a similar approach), every neighbouring 4-bits, 2-bits and finally 1-bit pairs are masked off and swapped over with shifts. In doing so we can significantly reduce the number of operations required. Differential Revision: https://reviews.llvm.org/D21578 llvm-svn: 276432
* [Support] Make ErrorAsOutParameter take an Error* rather than an Error&.Lang Hames2016-07-223-6/+5
| | | | | | | | | | | | | | | | | | | | | | This allows ErrorAsOutParameter to work better with "optional" errors. For example, consider a function where for certain input values it is known that the function can't fail. This can now be written as: Result foo(Arg X, Error *Err) { ErrorAsOutParameter EAO(Err); if (<Error Condition>) { if (Err) *Err = <report error>; else llvm_unreachable("Unexpected failure!"); } } Rather than having to construct an ErrorAsOutParameter under every conditional where Err is known to be non-null. llvm-svn: 276430
* [RDF] Make the graph construction/use less expensiveKrzysztof Parzyszek2016-07-222-7/+23
| | | | | | | | | - FuncNode::findBlock traverses the function every time. Avoid using it, and keep a cache of block addresses in DataFlowGraph instead. - The operator[] in the map of definition stacks was very slow. Replace the map with unordered_map. llvm-svn: 276429
* [pdb] Move file layout header structs to RawTypes.hZachary Turner2016-07-223-80/+26
| | | | | | | | This facilitates code reuse between the builder classes and the "frozen" read only versions of the classes used for parsing existing PDB files. llvm-svn: 276427
* [pdb] Round-trip module & file info to/from YAML.Zachary Turner2016-07-226-65/+228
| | | | | | | | | | This implements support for writing compiland and compiland source file info to a binary PDB. This is tested by adding support for dumping these fields from an existing PDB to yaml, reading them back in, and dumping them again and verifying the values are as expected. llvm-svn: 276426
* [Hexagon] Use loop data prefetch on HexagonKrzysztof Parzyszek2016-07-225-0/+29
| | | | llvm-svn: 276422
* Use INT64_MAX instead of LLONG_MAXReid Kleckner2016-07-221-1/+1
| | | | llvm-svn: 276419
* [X86][AVX] Added support for lowering to VBROADCASTF128/VBROADCASTI128 ↵Simon Pilgrim2016-07-224-12/+72
| | | | | | | | | | | | | | | | (reapplied) As reported on PR26235, we don't currently make use of the VBROADCASTF128/VBROADCASTI128 instructions (or the AVX512 equivalents) to load+splat a 128-bit vector to both lanes of a 256-bit vector. This patch enables lowering from subvector insertion/concatenation patterns and auto-upgrades the llvm.x86.avx.vbroadcastf128.pd.256 / llvm.x86.avx.vbroadcastf128.ps.256 intrinsics to match. We could possibly investigate using VBROADCASTF128/VBROADCASTI128 to load repeated constants as well (similar to how we already do for scalar broadcasts). Reapplied with fix for PR28657 - removed intrinsic definitions (clang companion patch to be be submitted shortly). Differential Revision: https://reviews.llvm.org/D22460 llvm-svn: 276416
* [FastISel] Ignore @llvm.assume.Ahmed Bougacha2016-07-221-0/+2
| | | | llvm-svn: 276410
* Revert "[X86][AVX] Added support for lowering to VBROADCASTF128/VBROADCASTI128"Benjamin Kramer2016-07-224-72/+12
| | | | | | | | It caused PR28657. This reverts commit r276281. llvm-svn: 276405
* [llvm-cov] - Improve llvm-cov error messageYing Yi2016-07-221-1/+2
| | | | | | | | | | | | | | | | | | | Summary: When giving the following command: % llvm-cov report -instr-profile=default.profraw llvm-cov will give the following error message: >llvm-cov report: Not enough positional command line arguments specified! >Must specify at least 1 positional arguments: See: orbis-llvm-cov report -help This patch changes the error message from '1 positional arguments' to '1 positional argument'. Differential Revision: https://reviews.llvm.org/D22621 llvm-svn: 276404
* This refactoring of ARM machine block size computation creates two utilitySjoerd Meijer2016-07-225-123/+193
| | | | | | | | | functions so that the size computation is available not only in ConstantIslands but in other passes as well. Differential Revision: https://reviews.llvm.org/D22640 llvm-svn: 276399
* [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructionsHrvoje Varga2016-07-226-68/+102
| | | | | | Differential Revision: https://reviews.llvm.org/D19906 llvm-svn: 276397
* [AVX512] Add ExeDomain to vector extend and truncate instructions.Craig Topper2016-07-221-2/+5
| | | | llvm-svn: 276394
* [AVX512] Add initial support for the Execution Domain fixing pass to change ↵Craig Topper2016-07-222-2/+57
| | | | | | some EVEX instructions. llvm-svn: 276393
* [AVX512] Fix the ExeDomain for some packed fp instructions.Craig Topper2016-07-221-5/+19
| | | | llvm-svn: 276392
* [AVX512] Add load folding for some AVX512VL logic and arithmetic instructions.Craig Topper2016-07-221-0/+36
| | | | llvm-svn: 276391
* [AVX512] Update X86InstrInfo::foldMemoryOperandCustom to handle the EVEX ↵Craig Topper2016-07-221-4/+8
| | | | | | encoded instructions too. llvm-svn: 276390
* Don't remove side effecting instructions due to ConstantFoldInstructionDavid Majnemer2016-07-225-9/+20
| | | | | | | | | Just because we can constant fold the result of an instruction does not imply that we can delete the instruction. It may have side effects. This fixes PR28655. llvm-svn: 276389
* Sync up InstrProfData.inc with compiler-rt with fixes to referencesXinliang David Li2016-07-221-3/+3
| | | | llvm-svn: 276388
* Avoid dsymutil calls to getFileNameByIndex.Pete Cooper2016-07-221-6/+11
| | | | | | | | | | | | This change adds a hasFileAtIndex method. getChildDeclContext can first call this method, and if it returns true it knows it can then lookup the resolved path cache for the given file index. If we hit that cache then we don't even have to call getFileNameByIndex. Running dsymutil against the swift executable built from github gives a 20% performance improvement without any change in the binary. Differential Revision: https://reviews.llvm.org/D22655 Reviewed by friss. llvm-svn: 276380
* Fix detection of stack-use-after scope for char arrays.Vitaly Buka2016-07-221-0/+4
| | | | | | | | | | | | | | Summary: Clang inserts GetElementPtrInst so findAllocaForValue was not able to find allocas. PR27453 Reviewers: kcc, eugenis Differential Revision: https://reviews.llvm.org/D22657 llvm-svn: 276374
* [IRCE] Add an option to skip profitability checksSanjoy Das2016-07-221-2/+7
| | | | | | | | If `-irce-skip-profitability-checks` is passed in, IRCE will kick in in all cases where it is legal for it to kick in. This flag is intended to help diagnose and analyse performance issues. llvm-svn: 276372
* GVN-hoist: move check before mutating the IRSebastian Pop2016-07-221-6/+8
| | | | llvm-svn: 276368
* [AArch64] Cleanup sign extend in genAlternativeCodeSequenceDavid Majnemer2016-07-211-3/+3
| | | | | | | | Use the machinery in MathExtras instead of rolling it by hand. This fixes PR28624. llvm-svn: 276366
* GVN-hoist: add missing check for all GEP operands availableSebastian Pop2016-07-211-0/+3
| | | | llvm-svn: 276364
* [Sparc]: Fix bug in LowerSTORE due to r275592Douglas Katzman2016-07-211-1/+1
| | | | llvm-svn: 276362
* [InstCombine] break up foldICmpEqualityWithConstant(); NFCISanjay Patel2016-07-212-148/+161
| | | | | | | Almost all of these folds require changes to allow vector types. Splitting up the logic should make that easier to do incrementally. llvm-svn: 276360
* GVH-hoist: only clone GEPs (PR28606)Sebastian Pop2016-07-211-14/+7
| | | | | | | | | Do not clone stored values unless they are GEPs that are special cased to avoid hoisting them without hoisting their associated ld/st. Differential revision: https://reviews.llvm.org/D22652 llvm-svn: 276358
* [Profile] deprecate __llvm_profile_override_default_filenameXinliang David Li2016-07-211-16/+16
| | | | | | | | This eliminates unncessary calls and init functions. Differential Revision: http://reviews.llvm.org/D22613 llvm-svn: 276354
* [PM] Port NaryReassociate to the new PMWei Mi2016-07-214-112/+78
| | | | | | Differential Revision: https://reviews.llvm.org/D22648 llvm-svn: 276349
* [MIRTesting] Abort when failing to parse a function.Quentin Colombet2016-07-211-2/+4
| | | | | | | | | | When we failed to parse a function in the mir parser, we should abort the whole compilation instead of continuing in a weird state. Indeed, this was creating strange machine function passes failures that were hard to understand, until we notice that the function actually did not get parsed correctly! llvm-svn: 276348
* [X86] Do not use AND8ri8 in AVX512 patternMichael Kuperstein2016-07-211-1/+1
| | | | | | | This variant is (as documented in the TD) for disassembler use only, and should not be used in patterns - it is longer, and is broken on 64-bit. llvm-svn: 276347
* [InstSimplify] don't crash handling a pointer or aggregate typeSanjay Patel2016-07-211-0/+3
| | | | llvm-svn: 276345
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