summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* [X86] Don't use the MSVC stack protector names on mingwMartin Storsjo2018-03-201-3/+8
| | | | | | | | | | | Mingw uses the same stack protector functions as GCC provides on other platforms as well. Patch by Valentin Churavy! Differential Revision: https://reviews.llvm.org/D27296 llvm-svn: 328039
* [DEBUGINFO] Add -no-dwarf-debug-ranges option.Alexey Bataev2018-03-203-4/+27
| | | | | | | | | | | | | | Summary: Added option -no-dwarf-debug-ranges option to disable emission of .debug_ranges section. Reviewers: probinson, echristo Subscribers: aprantl, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D44384 llvm-svn: 328030
* [WebAssembly] Added initial AsmParser implementation.Derek Schuff2018-03-209-7/+612
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It uses the MC framework and the tablegen matcher to do the heavy lifting. Can handle both explicit and implicit locals (-disable-wasm-explicit-locals). Comes with a small regression test. This is a first basic implementation that can parse most llvm .s output and round-trips most instructions succesfully, but in order to keep the commit small, does not address all issues. There are a fair number of mismatches between what MC / assembly matcher think a "CPU" should look like and what WASM provides, some already have workarounds in this commit (e.g. the way it deals with register operands) and some that require further work. Some of that further work may involve changing what the Disassembler outputs (and what s2wasm parses), so are probably best left to followups. Some known things missing: - Many directives are ignored and not emitted. - Vararg calls are parsed but extra args not emitted. - Loop signatures are likely incorrect. - $drop= is not emitted. - Disassembler does not output SIMD types correctly, so assembler can't test them. Patch by Wouter van Oortmerssen Differential Revision: https://reviews.llvm.org/D44329 llvm-svn: 328028
* [AArch64] Adjust the cost model for Exynos M3Evandro Menezes2018-03-201-1/+1
| | | | | | Fix typo in the number of integer dividers. llvm-svn: 328027
* [Hexagon] Add heuristic to exclude critical path cost for schedulingKrzysztof Parzyszek2018-03-202-177/+79
| | | | | | Patch by Brendon Cahoon. llvm-svn: 328022
* [Hexagon] Fix fall-through warnings in HexagonMCDuplexInfo.cppKrzysztof Parzyszek2018-03-201-4/+4
| | | | llvm-svn: 328021
* [MC,X86] Cleanup some X86 parser functions to use MCParser helpers. NFCI.Nirav Dave2018-03-201-45/+22
| | | | llvm-svn: 328019
* [PowerPC][LegalizeFloatTypes] Move the PPC hacks for (i32 ↵Craig Topper2018-03-202-59/+44
| | | | | | | | | | | | | | fp_to_sint/fp_to_uint (ppcf128 X)) out of LegalizeFloatTypes and into PPC specific code I'm not entirely sure these hacks are still needed. If you remove the hacks completely, the name of the library call that gets generated doesn't match the grep the test previously had. So the test wasn't really checking anything. If the hack is still needed it belongs in PPC specific code. I believe the FP_TO_SINT code here is the only place in the tree where a FP_ROUND_INREG node is created today. And I don't think its even being used correctly because the legalization returned a BUILD_PAIR with the same value twice. That doesn't seem right to me. By moving the code entirely to PPC we can avoid creating the FP_ROUND_INREG at all. I replaced the grep in the existing test with full checks generated by hacking update_llc_test_check.py to support ppc32 just long enough to generate it. Differential Revision: https://reviews.llvm.org/D44061 llvm-svn: 328017
* [X86] Add phony registers for high halves of regs with low halvesKrzysztof Parzyszek2018-03-201-18/+36
| | | | | | | | | | | | | | | | | Registers E[A-D]X, E[SD]I, E[BS]P, and EIP have 16-bit subregisters that cover the low halves of these registers. This change adds artificial subregisters for the high halves in order to differentiate (in terms of register units) between the 32- and the low 16-bit registers. This patch contains parts that aim to preserve the calculated register pressure. This is in order to preserve the current codegen (minimize the impact of this patch). The approach of having artificial subregisters could be used to fix PR23423, but the pressure calculation would need to be changed. Differential Revision: https://reviews.llvm.org/D43353 llvm-svn: 328016
* [MustExecute] Use the annotation style printerPhilip Reames2018-03-201-33/+54
| | | | | | | As suggested in the original review (https://reviews.llvm.org/D44524), use an annotation style printer instead. Note: The switch from -analyze to -disable-output in tests was driven by the fact that seems to be the idiomatic style used in annoation passes. I tried to keep both working, but the old style pass API for printers really doesn't make this easy. It invokes (runOnFunction, print(Module)) repeatedly. I decided the extra state wasn't worth it given the old pass manager is going away soonish anyway. llvm-svn: 328015
* Revert "Resubmit "Support embedding natvis files in PDBs.""Zachary Turner2018-03-208-186/+32
| | | | | | | | This is still failing on a different bot this time due to some issue related to hashing absolute paths. Reverting until I can figure it out. llvm-svn: 328014
* [NVPTX] Make tensor load/store intrinsics overloaded.Artem Belevich2018-03-202-91/+115
| | | | | | | | | | | | | | | | This way we can support address-space specific variants without explicitly encoding the space in the name of the intrinsic. Less intrinsics to deal with -> less boilerplate. Added a bit of tablegen magic to match/replace an intrinsics with a pointer argument in particular address space with the space-specific instruction variant. Updated tests to use non-default address spaces. Differential Revision: https://reviews.llvm.org/D43268 llvm-svn: 328006
* Add an analysis printer for must execute reasoningPhilip Reames2018-03-203-0/+104
| | | | | | | | | | | | Many of our loop passes make use of so called "must execute" or "guaranteed to execute" facts to prove the legality of code motion. The basic notion is that we know (by assumption) an instruction didn't fault at it's original location, so if the location we move it to is strictly post dominated by the original, then we can't have introduced a new fault. At the moment, the testing for this logic is somewhat adhoc and done mostly through LICM. Since I'm working on that code, I want to improve the testing. This patch is the first step in that direction. It doesn't actually test the variant used by the loop passes - I need to move that to the Analysis library first - but instead exercises an alternate implementation used by SCEV. (I plan on merging both implementations.) Note: I'll be replacing the printing logic within this with an annotation based version in the near future. Anna suggested this in review, and it seems like a strictly better format. Differential Revision: https://reviews.llvm.org/D44524 llvm-svn: 328004
* Resubmit "Support embedding natvis files in PDBs."Zachary Turner2018-03-208-32/+186
| | | | | | | | | | | The issue causing this to fail in certain configurations should be fixed. It was due to the fact that DIA apparently expects there to be a null string at ID 1 in the string table. I'm not sure why this is important but it seems to make a difference, so set it. llvm-svn: 328002
* [Hexagon] Correct the computation of TopReadyCycle and BotReadyCycle of SUKrzysztof Parzyszek2018-03-201-13/+5
| | | | | | | | | TopReadyCycle and BotReadyCycle were off by one cycle when an SU is either the first instruction or the last instruction in a packet. Patch by Ikhlas Ajbar. llvm-svn: 328000
* [XRay] Lazily compute MachineLoopInfo instead of requiring it.Michael Zolotukhin2018-03-201-3/+17
| | | | | | | | | | | | | | | | Summary: Currently X-Ray Instrumentation pass has a dependency on MachineLoopInfo (and thus on MachineDominatorTree as well) and we have to compute them even if X-Ray is not used. This patch changes it to a lazy computation to save compile time by avoiding these redundant computations. Reviewers: dberris, kubamracek Subscribers: llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D44666 llvm-svn: 327999
* [Hexagon] Check weak dependences when only 1 instruction is availableKrzysztof Parzyszek2018-03-201-9/+13
| | | | | | Patch by Brendon Cahoon. llvm-svn: 327997
* [DEBUGINFO] Add flag -no-dwarf-pub-sections to disable pub sections.Alexey Bataev2018-03-203-1/+15
| | | | | | | | | | | | | | Summary: Added a flag -no-dwarf-pub-sections, which allows to disable emission of DWARF public sections. Reviewers: probinson, echristo Subscribers: aprantl, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D44385 llvm-svn: 327994
* [X86][Haswell][Znver1] Fix typo in fldl instregexsSimon Pilgrim2018-03-202-2/+2
| | | | | | | | Missing comma was casing 2 instregex entries to be concatenated together by mistake. Found while investigating PR35548 llvm-svn: 327992
* [Hexagon] Improve scheduling heuristic for large basic blocksKrzysztof Parzyszek2018-03-204-9/+67
| | | | | | | | | | | | | | | | | | | | This patch changes the isLatencyBound heuristic to look at the path length based upon the number of packets needed to schedule a basic block. For small basic blocks, the heuristic uses a small threshold for isLatencyBound. For large basic blocks, the heuristic uses a large threshold. The goal is to increase the priority of an instruction in a small basic block that has a large height or depth relative to the code size. For large functions, the height and depth are ignored because it increases the live range of a register and causes more spills. That is, for large functions, it is more important to schedule instructions when available, and attempt to keep the defs and uses closer together. Patch by Brendon Cahoon. llvm-svn: 327987
* [AArch64][Falkor] Correct load/store increment scheduling detailsGeoff Berry2018-03-201-46/+50
| | | | llvm-svn: 327982
* [Hexagon] Fix division by zero in machine schedulerKrzysztof Parzyszek2018-03-201-1/+1
| | | | llvm-svn: 327980
* [RISCV] Add codegen for RV32F floating point load/storeAlex Bradbury2018-03-205-12/+51
| | | | | | | As part of this, add support for load/store from the constant pool. This is used to materialise f32 constants. llvm-svn: 327979
* [RISCV] Add codegen for RV32F arithmetic and conversion operationsAlex Bradbury2018-03-202-5/+104
| | | | | | Currently, only a soft floating point ABI is supported. llvm-svn: 327976
* [Hexagon] Improve scheduling based on register pressureKrzysztof Parzyszek2018-03-204-77/+223
| | | | | | Patch by Brendon Cahoon. llvm-svn: 327975
* [X86][SandyBridge] Merge multiple InstrRW entries that map to the same ↵Simon Pilgrim2018-03-201-1520/+1352
| | | | | | | | SchedWriteRes group (NFCI) (PR35955) I've also merged some VEX/non-VEX instregex strings with a (V?) prefix - there are still a lot more of these to do. llvm-svn: 327974
* [MergeICmps] Break eargerly out of loopXin Tong2018-03-201-0/+1
| | | | llvm-svn: 327972
* [MergeICmp] Fix a bug in entry block shuffled to middle of the chainXin Tong2018-03-201-0/+11
| | | | | | | | | | | | Summary: Fix a bug in entry block shuffled to middle of the chain. Reviewers: davide, courbet Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44642 llvm-svn: 327971
* [llvm-opt-fuzzer] Add irce to the fuzzing optionsIgor Laevsky2018-03-201-0/+2
| | | | llvm-svn: 327969
* [CGP] Avoid segmentation fault when doing PHI node simplificationsBjorn Pettersson2018-03-201-61/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Made PHI node simplifiations more robust in several ways: - Minor refactoring to let the SimplificationTracker own the sets with new PHI/Select nodes that are introduced. This is maybe not mapping to the original intention with the SimplificationTracker, but IMHO it encapsulates the logic behind those sets a little bit better. - MatchPhiNode can sometimes populate the Matched set with several entries, where it maps one PHI node to different candidates for replacement. The Matched set is changed into a SmallSetVector to make sure we get a deterministic iteration when doing the replacements. - As described above we may get several different replacements for a single PHI node. The loop in MatchPhiSet that is doing the replacements could end up calling eraseFromParent several times for the same PHI node, resulting in segmentation faults. This problem was supposed to be fixed in rL327250, but due to the non-determinism(?) it only appeared to be fixed (I still got crashes sometime when turning on/off -print-after-all etc to get different iteration order in the DenseSets). With this patch we follow the deterministic ordering in the Matched set when replacing the PHI nodes. If we find a new replacement for an already replaced PHI node we replace the new replacement by the old replacement instead. This is quite similar to what happened in the rl327250 patch, but here we also recursively verify that the old replacement hasn't been replaced already. - It was really hard to track down the fault described above (segementation fault due to doing eraseFromParent multiple times for the same instruction). The fault was intermittent and small changes in the code, or simply turning on -print-after-all etc could make the problem go away. This was basically due to the iteration over PhiNodesToMatch in MatchPhiSet no being deterministic. Therefore I've changed the data structure for the SimplificationTracker::AllPhiNodes into an SmallSetVector. This gives a deterministic behavior. Reviewers: skatkov, john.brawn Reviewed By: skatkov Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44571 llvm-svn: 327961
* [LV] Let recordVectorLoopValueForInductionCast to check if IV was created ↵Andrei Elovikov2018-03-201-15/+37
| | | | | | | | | | | | | | | | | | | | | | from the cast. Summary: It turned out to be error-prone to expect the callers to handle that - better to leave the decision to this routine and make the required data to be explicitly passed to the function. This handles the case that was missed in the r322473 and fixes the assert mentioned in PR36524. Reviewers: dorit, mssimpso, Ayal, dcaballe Reviewed By: dcaballe Subscribers: Ka-Ka, hiraditya, dneilson, hsaito, llvm-commits Differential Revision: https://reviews.llvm.org/D43812 llvm-svn: 327960
* [X86] Properly implement the calling convention for f80 for mingw/x86_64Martin Storsjo2018-03-201-7/+13
| | | | | | | | | | | | | | | | In these cases, both parameters and return values are passed as a pointer to a stack allocation. MSVC doesn't use the f80 data type at all, while it is used for long doubles on mingw. Normally, this part of the calling convention is handled within clang, but for intrinsics that are lowered to libcalls, it may need to be handled within llvm as well. Differential Revision: https://reviews.llvm.org/D44592 llvm-svn: 327957
* [ORC] Don't fully qualify explicit destructor call -- it confuses some ↵Lang Hames2018-03-201-4/+2
| | | | | | | | | compilers. This should fix the builder failure at http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/19224 llvm-svn: 327955
* [X86] Rename MOVSX32_NOREXrr8 to MOVSX32rr8_NOREX so that the scheduler ↵Craig Topper2018-03-204-15/+15
| | | | | | | | model regular expressions will pick it up with the regular version. Do the same for MOVSX32_NOREXrm8, MOVZX32_NOREXrr8, and MOVZX32_NOREXrm8 llvm-svn: 327948
* [X86] Fix the SchedRW for memory forms of CMP and TEST.Craig Topper2018-03-201-18/+21
| | | | | | | | They were incorrectly marked as RMW operations. Some of the CMP instrucions worked, but the ones that use a similar encoding as RMW form of ADD ended up marked as RMW. TEST used the same tablegen class as some of the CMPs. llvm-svn: 327947
* [ORC] Rename SymbolSource to MaterializationUnit, and make the materializationLang Hames2018-03-201-111/+167
| | | | | | | | | | | | | | | | | | | operation all-or-nothing, rather than allowing materialization on a per-symbol basis. This addresses a shortcoming of per-symbol materialization: If a MaterializationUnit (/SymbolSource) wants to materialize more symbols than requested (which is likely: most materializers will want to materialize whole modules) then it needs a way to notify the symbol table about the extra symbols being materialized. This process (checking what has been requested against what is being provided and notifying the symbol table about the difference) has to be repeated at every level of the JIT stack. Making materialization all-or-nothing eliminates this issue, simplifying both materializer implementations and the symbol table (VSO class) API. The cost is that per-symbol materialization (e.g. for individual symbols in a module) now requires multiple MaterializationUnits. llvm-svn: 327946
* [X86] Add TEST16mi/TEST32mi/TEST64mi32 to the ↵Craig Topper2018-03-205-6/+6
| | | | | | | | Sandybridge/Haswell/Broadwell/Skylake scheduler models. Move it from a load+store group on SNB to a load only group, the same group as CMP. llvm-svn: 327944
* [X86] Add ROR/ROL/SHR/SAR by 1 instructions to the Sandy Bridge scheduler model.Craig Topper2018-03-201-0/+8
| | | | | | I assume these match the generic immediate version like they do in the other models. llvm-svn: 327943
* [ShrinkWrap] Take into account landing padQuentin Colombet2018-03-201-0/+16
| | | | | | | | | | | | | When scanning the function for CSRs uses and defs, also check if the basic block are landing pads. Consider that landing pads needs the CSRs to be properly set. That way we force the prologue/epilogue to always be pushed out of the problematic "throw" region. The "throw" region is problematic because the jumps are not properly modeled. Fixes PR36513 llvm-svn: 327942
* [RISCV] Preserve stack space for outgoing arguments when the function ↵Shiva Chen2018-03-202-18/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | contain variable size objects E.g. bar (int x) { char p[x]; push outgoing variables for foo. call foo } We need to generate stack adjustment instructions for outgoing arguments by eliminateCallFramePseudoInstr when the function contains variable size objects to avoid outgoing variables corrupt the variable size object. Default hasReservedCallFrame will return !hasFP(). We don't want to generate extra sp adjustment instructions when hasFP() return true, So We override hasReservedCallFrame as !hasVarSizedObjects(). Differential Revision: https://reviews.llvm.org/D43752 llvm-svn: 327938
* [X86] Fix the SNB scheduler for BLENDVB.Craig Topper2018-03-201-1/+2
| | | | | | PBLENDVBrr0 was with the memory version of VBLENDVB and PBLENDVBrm0 was missing. llvm-svn: 327937
* Object: Fix handling of @@@ in .symver directiveVitaly Buka2018-03-201-10/+37
| | | | | | | | | | | | | | | | | Summary: name@@@nodename is going to be replaced with name@@nodename if symbols is defined in the assembled file, or name@nodename if undefined. https://sourceware.org/binutils/docs/as/Symver.html Fixes PR36623 Reviewers: pcc, espindola Subscribers: mehdi_amini, hiraditya Differential Revision: https://reviews.llvm.org/D44274 llvm-svn: 327930
* Object: Move attribute calculation into RecordStreamer. NFCVitaly Buka2018-03-203-97/+94
| | | | | | | | | | | | Summary: Preparation for D44274 Reviewers: pcc, espindola Subscribers: hiraditya Differential Revision: https://reviews.llvm.org/D44276 llvm-svn: 327928
* [SelectionDAG] Transfer DbgValues when integer operations are promotedAaron Smith2018-03-191-0/+2
| | | | | | | | | | | | | | | | | | | | | Summary: DbgValue nodes were not transferred when integer DAG nodes were promoted. For example, if an i32 add node was promoted to an i64 add node by DAGTypeLegalizer::PromoteIntegerResult(), its DbgValue node was not transferred to the new node. The simple fix is to update SetPromotedInteger() to transfer DbgValues. Add AArch64/dbg-value-i8.ll to test this change and fix ARM/debug-info-d16-reg.ll which had the wrong DILocalVariable nodes with arg numbers even though they are not for function parameters. Patch by Se Jong Oh! Reviewers: vsk, JDevlieghere, aprantl Reviewed By: JDevlieghere Subscribers: javed.absar, kristof.beyls, llvm-commits Tags: #debug-info Differential Revision: https://reviews.llvm.org/D44546 llvm-svn: 327919
* [MachineOutliner] AArch64: Emit CFI instructions when outlining callsJessica Paquette2018-03-191-0/+19
| | | | | | | | | | | When outlining calls, the outliner needs to update CFI to ensure that, say, exception handling works. This commit adds that functionality and adds a test just for call outlining. Call outlining stuff in machine-outliner.mir should be moved into machine-outliner-calls.mir in a later commit. llvm-svn: 327917
* [DAGCombiner] Fix type in comment. NFCCraig Topper2018-03-191-1/+1
| | | | llvm-svn: 327916
* [X86] Simplify the AVX512 code in LowerTruncate a little.Craig Topper2018-03-191-3/+2
| | | | | | We don't need to create an ISD::TRUNCATE node to return, we started with one and can return it. Also remove the call to getExtendInVec, the result is just going to be a getNode of that value passed in. llvm-svn: 327914
* [PDB] Add a method to get the full path of the source file for ↵Aaron Smith2018-03-191-15/+86
| | | | | | | | | | | | | | | | | PDBSymbolCompiland Summary: Redefine PDBSymbolCompiland::getSourceFileName() to return the filename (w/o directory) of the source file that is used to compile the compiland. This is because the result returned previously is ambiguous. It could be the filename, relative path or full path of the source file. Move the implementation of SymbolFilePDB::GetSourceFileNameForPDBCompiland() into a new method PDBSymbolCompiland::getSourceFileFullPath(). Reviewers: zturner, rnk, llvm-commits Reviewed By: zturner Differential Revision: https://reviews.llvm.org/D44458 llvm-svn: 327910
* [PDB] Add exclusive methods to derived symbol classAaron Smith2018-03-191-0/+15
| | | | | | | | | | | | Summary: This commit adds two methods to the PDBSymboFunc class used in parsing symbols. getLineNumbers() is used to determine a Function symbol's declaration and getCompilandId() is used to initialize the SymbolContext field sc.comp_unit. Reviewers: zturner, rnk, llvm-commits Reviewed By: zturner Differential Revision: https://reviews.llvm.org/D44457 llvm-svn: 327909
* Revert "Support embedding natvis files in PDBs."Zachary Turner2018-03-198-186/+32
| | | | | | | This is causing a test failure on a certain bot, so I'm removing this temporarily until we can figure out the source of the error. llvm-svn: 327903
OpenPOWER on IntegriCloud