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* [ARM] Reapply: Use __rt_div functions for divrem on WindowsMartin Storsjo2016-10-071-21/+45
| | | | | | | | | | | | | | | | | | | | | | | | Reapplying r283383 after revert in r283442. The additional fix is a getting rid of a stray space in a function name, in the refactoring part of the commit. This avoids falling back to calling out to the GCC rem functions (__moddi3, __umoddi3) when targeting Windows. The __rt_div functions have flipped the two arguments compared to the __aeabi_divmod functions. To match MSVC, we emit a check for division by zero before actually calling the library function (even if the library function itself also might do the same check). Not all calls to __rt_div functions for division are currently merged with calls to the same function with the same parameters for the remainder. This is more wasteful than a div + mls as before, but avoids calls to __moddi3. Differential Revision: https://reviews.llvm.org/D25332 llvm-svn: 283550
* [ARM]: Add Cortex-R52 target to LLVMJaved Absar2016-10-075-4/+29
| | | | | | | This patch adds Cortex-R52, the new ARM real-time processor, to LLVM. Cortex-R52 implements the ARMv8-R architecture. llvm-svn: 283542
* [X86][SSE] Update register class during MOVSD/MOVSS - BLENDPD/BLENDPS ↵Simon Pilgrim2016-10-071-0/+11
| | | | | | | | | | | | | | commutation MOVSD/MOVSS take a 128-bit register and a FR32/FR64 register input, the commutation code wasn't taking this into account leading to verification errors. This patch inserts a vreg copy mi to ensure that the registers are correct. Fix for PR30607 Differential Revision: https://reviews.llvm.org/D25280 llvm-svn: 283539
* [SLPVectorizer] Fix for PR25748: reduction vectorization after loopAlexey Bataev2016-10-071-8/+22
| | | | | | | | | | | | | | | | | | | | unrolling. The next code is not vectorized by the SLPVectorizer: ``` int test(unsigned int *p) { int sum = 0; for (int i = 0; i < 8; i++) sum += p[i]; return sum; } ``` During optimization this loop is fully unrolled and SLPVectorizer is unable to vectorize it. Patch tries to fix this problem. Differential Revision: https://reviews.llvm.org/D24796 llvm-svn: 283535
* [ARM] Don't convert switches to lookup tables of pointers with ROPI/RWPIOliver Stannard2016-10-073-17/+40
| | | | | | | | | | | | With the ROPI and RWPI relocation models we can't always have pointers to global data or functions in constant data, so don't try to convert switches into lookup tables if any value in the lookup table would require a relocation. We can still safely emit lookup tables of other values, such as simple constants. Differential Revision: https://reviews.llvm.org/D24462 llvm-svn: 283530
* Use StringRef in ARMELFStreamer (NFC)Mehdi Amini2016-10-071-2/+2
| | | | llvm-svn: 283529
* AMDGPU: Fix use-after-free in SIOptimizeExecMaskingNicolai Haehnle2016-10-071-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: There was a bug with sequences like s_mov_b64 s[0:1], exec s_and_b64 s[2:3]<def>, s[0:1], s[2:3]<kill> ... s_mov_b64_term exec, s[2:3] because s[2:3] was defined and used in the same instruction, ending up with SaveExecInst inside OtherUseInsts. Note that the test case also exposes an unrelated bug. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98028 Reviewers: tstellarAMD, arsenm Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye Differential Revision: https://reviews.llvm.org/D25306 llvm-svn: 283528
* Use StringReg in TargetParser APIs (NFC)Mehdi Amini2016-10-073-16/+16
| | | | llvm-svn: 283527
* Revert "Revert "Add a static_assert to enforce that parameters to ↵Mehdi Amini2016-10-071-1/+2
| | | | | | | | | llvm::format() are not totally unsafe"" This reverts commit r283510 and reapply r283509, with updates to clang-tools-extra as well. llvm-svn: 283525
* [X86] Fix patterns for VPMULLD and VPCMPEQQ to not require aligned loads.Craig Topper2016-10-071-2/+2
| | | | llvm-svn: 283524
* [X86] Remove unused PatFrags. NFCCraig Topper2016-10-071-5/+0
| | | | llvm-svn: 283523
* [AVR] Add the AVRMCInstLower classDylan McKay2016-10-073-0/+144
| | | | | | | | | | | | | | Summary: This class deals with the lowering of CodeGen `MachineInstr` objects to MC `MCInst` objects. Reviewers: kparzysz, arsenm Subscribers: wdng, beanz, japaric, mgorny Differential Revision: https://reviews.llvm.org/D25269 llvm-svn: 283522
* [SimplifyCFG] Correctly test for unconditional branches in GetCaseResultsDavid Majnemer2016-10-071-1/+1
| | | | | | | | | | | GetCaseResults assumed that a terminator with one successor was an unconditional branch. This is not necessarily the case, it could be a cleanupret. Strengthen the check by querying whether or not the terminator is exceptional. llvm-svn: 283517
* Target: Remove unused patterns and transforms. NFC.Peter Collingbourne2016-10-0713-203/+0
| | | | llvm-svn: 283515
* [Hexagon] NFC Removing 'V4_' prefix from duplex instruction names.Colin LeMahieu2016-10-074-471/+471
| | | | llvm-svn: 283514
* Revert "Add a static_assert to enforce that parameters to llvm::format() are ↵Mehdi Amini2016-10-061-2/+1
| | | | | | | | not totally unsafe" This reverts commit r283509, clang is hitting the assert. llvm-svn: 283510
* Add a static_assert to enforce that parameters to llvm::format() are not ↵Mehdi Amini2016-10-061-1/+2
| | | | | | | | | | | | | | | | | | | | | totally unsafe Summary: I had for the second time today a bug where llvm::format("%s", Str) was called with Str being a StringRef. The Linux and MacOS bots were fine, but windows having different calling convention, it printed garbage. Instead we can catch this at compile-time: it is never expected to call a C vararg printf-like function with non scalar type I believe. Reviewers: bogner, Bigcheese, dexonsmith Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D25266 llvm-svn: 283509
* [Hexagon] NFC. Canonicalizing absolute address instruction names.Colin LeMahieu2016-10-064-125/+125
| | | | llvm-svn: 283507
* Delete some dead code in SelectionDAG (NFC)Vedant Kumar2016-10-063-59/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D24435 llvm-svn: 283505
* [WebAssemby] Implement block signatures.Dan Gohman2016-10-0612-61/+199
| | | | | | | | | Per spec changes, this implements block signatures, and adds just enough logic to produce correct block signatures at the ends of functions. Differential Revision: https://reviews.llvm.org/D25144 llvm-svn: 283503
* [WebAssembly] Remove loop's bottom label.Dan Gohman2016-10-062-26/+16
| | | | | | | | Per spec changes, loop constructs no longer have a bottom label. https://reviews.llvm.org/D25118 llvm-svn: 283502
* [WebAssembly] Remove the output operand from stores.Dan Gohman2016-10-067-88/+64
| | | | | | | | | Per spec changes, store instructions in WebAssembly no longer have a return value. Update the instruction descriptions. Differential Revision: https://reviews.llvm.org/D25122 llvm-svn: 283501
* Preserve the debug location when CodeGenPrepare sinks a compare instruction ↵Wolfgang Pieb2016-10-061-0/+2
| | | | | | | | | | | | into the basic block of a user. Patch by Andrea DiBiagio. Differential Revision: https://reviews.llvm.org/D24632 llvm-svn: 283500
* Handle *_EXTEND_VECTOR_INREG during Integer LegalizationPirama Arumuga Nainar2016-10-062-0/+25
| | | | | | | | | | | | | | | | Summary: These nodes need legalization for 3-element vectors. This commit handles the legalization and adds tests for zext and sext. This fixes PR30614. Reviewers: RKSimon, srhines Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D25268 llvm-svn: 283496
* [PGO] Create weak alias for the renamed Comdat functionRong Xu2016-10-061-0/+4
| | | | | | | | | | Add a weak alias to the renamed Comdat function in IR level instrumentation, using it's original name. This ensures the same behavior w/ and w/o IR instrumentation, even for non standard conforming code. Differential Revision: http://reviews.llvm.org/D25339 llvm-svn: 283490
* [X86] Preserve BasePtr for LEA64_32rMichael Kuperstein2016-10-061-3/+5
| | | | | | | | | | | | When replacing FrameIndex with BasePtr, we must preserve BasePtr for LEA64_32r since BasePtr is used later for stack adjustment if it is the same as StackPtr. Patch by H.J Lu <hjl.tools@gmail.com> Differential Revision: https://reviews.llvm.org/D23575 llvm-svn: 283486
* [DAG] Generalize build_vector -> vector_shuffle combine for more than 2 inputsMichael Kuperstein2016-10-061-135/+191
| | | | | | | | | | | | | | | | This generalizes the build_vector -> vector_shuffle combine to support any number of inputs. The idea is to create a binary tree of shuffles, where the first layer performs pairwise shuffles of the input vectors placing each input element into the correct lane, and the rest of the tree blends these shuffles together. This doesn't try to be smart and create any sort of "optimal" shuffles. The assumption is that even a "poor" shuffle sequence is better than extracting and inserting the elements one by one. Differential Revision: https://reviews.llvm.org/D24683 llvm-svn: 283480
* Revert "Add -strip-nonlinetable-debuginfo capability"Michael Ilseman2016-10-064-353/+0
| | | | | | | | This reverts commit r283473. Reverted until review is completed. llvm-svn: 283478
* AMDGPU: Don't fold undef uses or copies with implicit usesMatt Arsenault2016-10-061-4/+22
| | | | llvm-svn: 283476
* AMDGPU: Remove scheduling info from si_mask_branchMatt Arsenault2016-10-061-0/+2
| | | | llvm-svn: 283475
* Add -strip-nonlinetable-debuginfo capabilityMichael Ilseman2016-10-064-0/+353
| | | | | | | | | | | | | | | | | | | | | | This adds a new function to DebugInfo.cpp that takes an llvm::Module as input and removes all debug info metadata that is not directly needed for line tables, thus effectively stripping all type and variable information from the module. The primary motivation for this feature was the bitcode work flow (cf. http://lists.llvm.org/pipermail/llvm-dev/2016-June/100643.html for more background). This is not wired up yet, but will be in subsequent patches. For testing, the new functionality is exposed to opt with a -strip-nonlinetable-debuginfo option. The secondary use-case (and one that works right now!) is as a reduction pass in bugpoint. I added two new bugpoint options (-disable-strip-debuginfo and -disable-strip-debug-types) to control the new features. By default it will first attempt to remove all debug information, then only the type info, and then proceed to hack at any remaining MDNodes. llvm-svn: 283473
* AMDGPU: Remove leftover implicit operands when folding immediatesMatt Arsenault2016-10-061-7/+26
| | | | | | | | When constant folding an operation to a copy or an immediate mov, the implicit uses/defs of the old instruction were left behind, e.g. replacing v_or_b32 left the implicit exec use on the new copy. llvm-svn: 283471
* Reapply "AMDGPU: Support using tablegened MC pseudo expansions"Matt Arsenault2016-10-065-44/+75
| | | | | | Fix bad merge llvm-svn: 283470
* Revert "AMDGPU: Support using tablegened MC pseudo expansions"Matt Arsenault2016-10-065-68/+44
| | | | llvm-svn: 283469
* AMDGPU: Support using tablegened MC pseudo expansionsMatt Arsenault2016-10-065-44/+68
| | | | | | Make the necessary refactorings to make use of PseudoInstExpansion llvm-svn: 283467
* BranchRelaxation: Support expanding unconditional branchesMatt Arsenault2016-10-0610-22/+355
| | | | | | | AMDGPU needs to expand unconditional branches in a new block with an indirect branch. llvm-svn: 283464
* [Hexagon] Avoid replacing full regs with subregisters in tied operandsKrzysztof Parzyszek2016-10-061-0/+20
| | | | | | Doing so will result in the two-address pass generating incorrect code. llvm-svn: 283463
* BranchRelaxation: Account for function alignmentMatt Arsenault2016-10-061-9/+18
| | | | llvm-svn: 283462
* Move AArch64BranchRelaxation to generic codeMatt Arsenault2016-10-066-54/+43
| | | | llvm-svn: 283459
* AArch64: Move remaining target specific BranchRelaxation bits to TIIMatt Arsenault2016-10-063-53/+37
| | | | llvm-svn: 283458
* [X86] Fix intel syntax push parsing bugNirav Dave2016-10-061-2/+29
| | | | | | | | | | | | | | | Change erroneous parsing of push immediate instructions in intel syntax to default to pointer size by rewriting into the ATT style for matching. This fixes PR22028. Reviewers: majnemer, rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D25288 llvm-svn: 283457
* Revert "Use StringRef in LTOModule implementation (NFC)"Mehdi Amini2016-10-062-30/+26
| | | | | | | This reverts commit r282997, a windows bot is asserting in one test apparently. llvm-svn: 283456
* [AMDGPU] Disassembler: print label names in branch instructionsSam Kolton2016-10-063-66/+156
| | | | | | | | | | | | | Summary: Add AMDGPUSymbolizer for finding names for labels from ELF symbol table. Initialize MCObjectFileInfo with some default values. Reviewers: vpykhtin, artem.tamazov, tstellarAMD Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye Differential Revision: https://reviews.llvm.org/D24802 llvm-svn: 283450
* [RS4GC] Fix comment to show TODO. NFCAnna Thomas2016-10-061-1/+1
| | | | llvm-svn: 283449
* [RDF] Replace some expensive copies with references in range-based loopsKrzysztof Parzyszek2016-10-061-7/+7
| | | | llvm-svn: 283446
* [RDF] Replace potentially unclear autos with real typesKrzysztof Parzyszek2016-10-062-59/+53
| | | | llvm-svn: 283445
* Revert "[ARM] Use __rt_div functions for divrem on Windows"Diana Picus2016-10-061-45/+21
| | | | | | | | | | This reverts commit r283383 because it broke some of the bots: undefined reference to ` __aeabi_uldivmod' It affected (at least) clang-cmake-armv7-a15-selfhost, clang-cmake-armv7-a15-selfhost and clang-native-arm-lnt. llvm-svn: 283442
* Test commit access (NFC)Henric Karlsson2016-10-061-1/+1
| | | | llvm-svn: 283439
* AMDGPU: Partially fix reported code size for some instructionsMatt Arsenault2016-10-064-4/+8
| | | | | | | | These ones need to have the size on the pseudo instruction set for getInstSizeInBytes to work correctly. These also have a statically known size. llvm-svn: 283437
* [ValueTracking] Teach computeKnownBits and ComputeNumSignBits to look ↵Bjorn Pettersson2016-10-061-0/+14
| | | | | | | | | | | | | | | through ExtractElement. Summary: The computeKnownBits and ComputeNumSignBits functions in ValueTracking can now do a simple look-through of ExtractElement. Reviewers: majnemer, spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D24955 llvm-svn: 283434
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