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* set SDNPVariadic on nodes throughout the rest of the targets thatChris Lattner2010-03-198-15/+27
| | | | | | need them. llvm-svn: 98937
* Remove a memory leak from ThumbTargetMachine.Jeffrey Yasskin2010-03-191-2/+6
| | | | llvm-svn: 98936
* add a new SDNPVariadic SDNP node flag, and use it inChris Lattner2010-03-191-4/+5
| | | | | | | | dag isel gen instead of instruction properties. This allows the oh-so-useful behavior of matching a variadic non-root node. llvm-svn: 98934
* remove some damaged sign extend patterns that can never match.Chris Lattner2010-03-191-8/+6
| | | | llvm-svn: 98932
* disable some illegal blackfin patterns. sext from i32 to i32 can neverChris Lattner2010-03-191-5/+5
| | | | | | match. Jakob, please take a look when you get a chance. llvm-svn: 98931
* comment out a bunch of parallel store patterns that apparentlyChris Lattner2010-03-192-14/+44
| | | | | | | can't match or just have no testcases. Will remove after confirmation from dan that they really are dead. llvm-svn: 98930
* Fix -Asserts warnings.Daniel Dunbar2010-03-191-5/+4
| | | | llvm-svn: 98928
* MC/Mach-O: Add isScatteredFixupFullyResolved, which implements the correct ↵Daniel Dunbar2010-03-191-1/+59
| | | | | | | | algorithm (used on x86_64) for determining whether an evaluated fixup is fully resolved (doesn't need relocation). - Test cases will follow, once we have x86_64 relocation support. llvm-svn: 98926
* MC/Mach-O/x86_64: Add getAtom[ForAddress].Daniel Dunbar2010-03-191-0/+36
| | | | | | - These find the defining symbol which identifies the containing atom for a symbol or address. They are currently very slow, but will be eliminated eventually. llvm-svn: 98925
* MC/Mach-O: Factor out isScatteredFixupFullyResolvedSimple predicate, and fix ↵Daniel Dunbar2010-03-191-15/+52
| | | | | | some corner cases. llvm-svn: 98924
* MC/Mach-O: Factor out isSymbolLinkerVisible method; "linker visible" is a ↵Daniel Dunbar2010-03-191-10/+18
| | | | | | made up term to refer to non-temporary labels + temporary labels in sections-which-require symbols. For Darwin, it corresponds to symbols which effectively define an atom. llvm-svn: 98923
* Fixed a widening bug where we were not using the correct size for the loadMon P Wang2010-03-191-1/+1
| | | | llvm-svn: 98920
* X86: Fix encoding for TEST64rr.Daniel Dunbar2010-03-191-1/+1
| | | | llvm-svn: 98919
* FP16 constfoldingAnton Korobeynikov2010-03-191-0/+25
| | | | llvm-svn: 98911
* Now that tblgen can handle matching implicit defs of instructionsChris Lattner2010-03-194-131/+104
| | | | | | | | | | | | | | | | | | | | | | | | | to input patterns, we can fix X86ISD::CMP and X86ISD::BT as taking two inputs (which have to be the same type) and *returning an i32*. This is how the SDNodes get made in the graph, but we weren't able to model it this way due to deficiencies in the pattern language. Now we can change things like this: def UCOM_FpIr80: FpI_<(outs), (ins RFP80:$lhs, RFP80:$rhs), CompareFP, - [(X86cmp RFP80:$lhs, RFP80:$rhs), - (implicit EFLAGS)]>; // CC = ST(0) cmp ST(i) + [(set EFLAGS, (X86cmp RFP80:$lhs, RFP80:$rhs))]>; and fix terrible crimes like this: -def : Pat<(parallel (X86cmp GR8:$src1, 0), (implicit EFLAGS)), +def : Pat<(X86cmp GR8:$src1, 0), (TEST8rr GR8:$src1, GR8:$src1)>; This relies on matching the result of TEST8rr (which is EFLAGS, which is an implicit def) to the result of X86cmp, an i32. llvm-svn: 98903
* Update comment to refer to the right filename.Bob Wilson2010-03-181-1/+1
| | | | llvm-svn: 98902
* tidy upChris Lattner2010-03-181-2/+2
| | | | llvm-svn: 98901
* Get rid of target-specific fp <-> int nodes when still I'm here.Anton Korobeynikov2010-03-186-79/+69
| | | | llvm-svn: 98889
* Get rid of target-specific nodes for fp16 <-> fp32 conversion.Anton Korobeynikov2010-03-184-21/+11
| | | | llvm-svn: 98888
* Refactor Reg-Reg copy emission routine for ARM. This makes cross-regclass ↵Anton Korobeynikov2010-03-181-29/+39
| | | | | | copies weirdness more straightforward. Also, add GPR <-> SPR copy support. llvm-svn: 98887
* Couple of changes that Dan mentioned for llvm.stackprotector fast-isel.Eric Christopher2010-03-181-2/+2
| | | | llvm-svn: 98881
* X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, weDaniel Dunbar2010-03-181-2/+4
| | | | | | | were missing it on some movq instructions and were not including the appropriate PCrel bias. llvm-svn: 98880
* fix some buggy ops concatentationChris Lattner2010-03-181-12/+12
| | | | llvm-svn: 98869
* use ins/outs.Chris Lattner2010-03-182-49/+49
| | | | llvm-svn: 98866
* outs come before ins.Chris Lattner2010-03-181-3/+3
| | | | llvm-svn: 98864
* Make fast-isel understand llvm.stackprotector.Eric Christopher2010-03-181-0/+15
| | | | llvm-svn: 98862
* Refactor NEON ld/st instructions to hardcode class arguments that are constants.Bob Wilson2010-03-181-201/+193
| | | | | | No functional changes. llvm-svn: 98860
* MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement aDaniel Dunbar2010-03-182-3/+43
| | | | | | | | temporary workaround for matching inc/dec on x86_64 to the correct instruction. - This hack will eventually be replaced with a robust mechanism for handling matching instructions based on the available target features. llvm-svn: 98858
* fix an x86-64 encoding bug Daniel found.Chris Lattner2010-03-181-1/+4
| | | | llvm-svn: 98855
* Simplify this code.Dan Gohman2010-03-181-16/+8
| | | | llvm-svn: 98853
* Define placement new wrappers for BumpPtrAllocator andDan Gohman2010-03-184-125/+90
| | | | | | | RecyclingAllocator to allow client code to be simpler, and simplify several clients. llvm-svn: 98847
* Fix pr6543: svn r88806 changed MachineJumpTableInfo::getJumpTableIndex() toBob Wilson2010-03-182-6/+14
| | | | | | | | | | | | | | | | | always create a new jump table. The intention was to avoid merging jump tables in SelectionDAGBuilder, and to wait for the branch folding pass to merge tables. Unfortunately, the same getJumpTableIndex() method is also used to merge tables in branch folding, so as a result of this change branch tables are never merged. Worse, the branch folding code is expecting getJumpTableIndex to always return the index of an existing table, but with this change, it never does so. In at least some cases, e.g., pr6543, this creates references to non-existent tables. I've fixed the problem by adding a new createJumpTableIndex function, which will always create a new table, and I've changed getJumpTableIndex to only look at existing tables. llvm-svn: 98845
* add a special relocation type for movq loads for objectChris Lattner2010-03-182-4/+14
| | | | | | | files that produce special relocation types where the linker changes movq's into lea's. llvm-svn: 98839
* Add explicit braces to avoid ambiguous ‘else’.Dan Gohman2010-03-181-1/+2
| | | | llvm-svn: 98838
* callq is pcrelativeChris Lattner2010-03-181-1/+1
| | | | llvm-svn: 98835
* Check if function names start with "llvm." before trying to lookup them up asBob Wilson2010-03-182-0/+8
| | | | | | | | intrinsics. The intrinsic lookup code assumes that this check has been done and assumes the names are at least 6 characters long. Valgrind complained about this. pr6638. llvm-svn: 98831
* Fix comment.Devang Patel2010-03-181-1/+1
| | | | llvm-svn: 98830
* Add the ability to "intern" FoldingSetNodeID data into aDan Gohman2010-03-182-16/+26
| | | | | | | | | | | | BumpPtrAllocator-allocated region to allow it to be stored in a more compact form and to avoid the need for a non-trivial destructor call. Use this new mechanism in ScalarEvolution instead of FastFoldingSetNode to avoid leaking memory in the case where a FoldingSetNodeID uses heap storage, and to reduce overall memory usage. llvm-svn: 98829
* Try to fix a valgrind error on 32 bit platforms: use %zu instead of %llu to ↵Benjamin Kramer2010-03-181-2/+2
| | | | | | format a size_t. llvm-svn: 98819
* Turning off post-ra scheduling for x86. It isn't a consistent win.Evan Cheng2010-03-182-15/+0
| | | | llvm-svn: 98810
* Reapply r98755 with a thinko which miscompiled gengtype fixed.Dan Gohman2010-03-182-34/+35
| | | | llvm-svn: 98793
* MCValue: Change to holding MCSymbolRefExprs instead of MCSymbols, we will ↵Daniel Dunbar2010-03-183-37/+44
| | | | | | need this for accessing to symbol modifiers. llvm-svn: 98791
* MC/Darwin: Add a new target hook for whether the target uses "reliable" ↵Daniel Dunbar2010-03-182-7/+11
| | | | | | | | symbol differences, basically whether the assembler should attempt to understand atoms when using scattered symbols. Also, avoid some virtual call overhead. llvm-svn: 98789
* Revert "Change coalescer complexity from N^2 to N logN by changing one letter."Jakob Stoklund Olesen2010-03-181-1/+12
| | | | | | This reverts commit 98776. It broke the llvm-gcc boot strap. llvm-svn: 98784
* X86 address mode matching code MatchAddressRecursively does some aggressive ↵Evan Cheng2010-03-171-14/+60
| | | | | | hack which require doing a RAUW. It may end up deleting some SDNode up stream. It should avoid referencing deleted nodes. llvm-svn: 98780
* Debug info intrinsic does not intefer during tail call optimization.Devang Patel2010-03-171-0/+3
| | | | llvm-svn: 98778
* Revert 98745 with respect to the addition of NEONFrm subformats for disassembly.Johnny Chen2010-03-172-453/+85
| | | | | | There is a better way coming up. llvm-svn: 98777
* Change coalescer complexity from N^2 to N logN by changing one letter.Jakob Stoklund Olesen2010-03-171-12/+1
| | | | | | | | | Remove ugly hack that aborted the coalescer before using N^2 time. This affects functions with very complicated live intervals for physical registers, i.e. functions with thousands of function calls. llvm-svn: 98776
* Fixed a bug in the IT mask printing where T means the cond bit in the maskJohnny Chen2010-03-171-3/+5
| | | | | | | | | | | | | | matches that of Firstcond[0] and E means otherwise. The Firstcond[0] is also tagged in the Mask to facilitate Asm printing. The disassembler also depends on this arrangement. This is similar to what's described in A2.5.2 ITSTATE. Ran: utils/lit/lit.py test/CodeGen/ARM test/CodeGen/Thumb test/CodeGen/Thumb2 successfully. llvm-svn: 98775
* Refines 98745 so that it only contains the patch related to the output of theJohnny Chen2010-03-171-12/+1
| | | | | | | | | addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. This patch removes the impl of printT2AddrModeImm8s4OffsetOperand() from ARMAsmPrinter.cpp. It is used by disassembler as of now. llvm-svn: 98774
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