summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* [DAGCombiner] Dropped explicit (sra 0, x) -> 0 and (sra -1, x) -> 0 folds.Simon Pilgrim2017-05-101-6/+2
| | | | | | These are both handled (and tested) by the earlier ComputeNumSignBits == EltSizeInBits fold. llvm-svn: 302651
* [IfConversion] Add missing check in IfConversion/canFallThroughToMikael Holmen2017-05-101-1/+2
| | | | | | | | | | | | | | | | | Summary: When trying to figure out if MBB could fallthrough to ToMBB (possibly by falling through a bunch of other MBBs) we didn't actually check if there was fallthrough between the last two blocks in the chain. Reviewers: kparzysz, iteratee, MatzeB Reviewed By: kparzysz, iteratee Subscribers: javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D32996 llvm-svn: 302650
* [SystemZ] Implement getRepRegClassFor()Jonas Paulsson2017-05-102-0/+11
| | | | | | | | | | | | This method must return a valid register class, or the list-ilp isel scheduler will crash. For MVT::Untyped nullptr was previously returned, but now ADDR128BitRegClass is returned instead. This is needed just as long as list-ilp (and probably also list-hybrid) is still there. Review: Ulrich Weigand, A Trick https://reviews.llvm.org/D32802 llvm-svn: 302649
* [AMDGPU][MC] Corrected v_madak/madmk to avoid printing "_e32" in ↵Dmitry Preobrazhensky2017-05-101-6/+12
| | | | | | | | | | | | disassembler output See bug 32927: https://bugs.llvm.org//show_bug.cgi?id=32927 Reviewers: vpykhtin, artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D32913 llvm-svn: 302648
* [SystemZ] Add decimal integer instructionsUlrich Weigand2017-05-1010-2/+247
| | | | | | | This adds the set of decimal integer (BCD) instructions for assembler / disassembler use. llvm-svn: 302646
* [SystemZ] Add crypto instructionsUlrich Weigand2017-05-108-4/+97
| | | | | | | This adds the set of message-security assist instructions for assembler / disassembler use. llvm-svn: 302645
* [SystemZ] Add translate/convert instructionsUlrich Weigand2017-05-105-0/+117
| | | | | | | This adds the set of character-set translate and convert instructions for assembler / disassembler use. llvm-svn: 302644
* [SystemZ] Add missing memory/string instructionsUlrich Weigand2017-05-105-15/+77
| | | | | | | This adds a number of missing memory and string instructions for assembler / disassembler use. llvm-svn: 302643
* [DAGCombiner] Add vector support to fold (shl/srl 0, x) -> 0Simon Pilgrim2017-05-101-2/+2
| | | | llvm-svn: 302641
* Revert r301950: SpeculativeExecution: Stop using whitelist for costsChandler Carruth2017-05-101-1/+42
| | | | | | | | | | This pass doesn't correctly handle testing for when it is legal to hoist arbitrary instructions. The whitelist happens to make it safe, so before it is removed the pass's legality checks will need to be enhanced. Details have been added to the code review thread for the patch. llvm-svn: 302640
* [AArch64] Fix a comment to match the code. NFC.Martin Storsjo2017-05-101-4/+6
| | | | | | | | | | | | | | | For the ELF case, the default/preferred form is the generic one, not the short one as used for Apple - fix the comment to say so. Currently it is a copy-paste typo. Make the comments on the darwin default a bit more verbose. Use enum names instead of literal 0/1 to further increase readability and reduce fragility. Differential Revision: https://reviews.llvm.org/D32963 llvm-svn: 302634
* Add a late IR expansion pass for the experimental reduction intrinsics.Amara Emerson2017-05-106-5/+182
| | | | | | | | | This pass uses a new target hook to decide whether or not to expand a particular intrinsic to the shuffevector sequence. Differential Revision: https://reviews.llvm.org/D32245 llvm-svn: 302631
* [APInt] Fix indentation of tcDivide. Combine variable declaration and ↵Craig Topper2017-05-101-15/+13
| | | | | | initialization. llvm-svn: 302626
* [APInt] Use getNumWords function in udiv/urem/udivrem instead of ↵Craig Topper2017-05-101-12/+6
| | | | | | reimplementinging it. llvm-svn: 302625
* [GlobalISel][X86] G_ZEXT i1 to i32/i64 support.Igor Breger2017-05-102-3/+53
| | | | | | | | | | | | | | Summary: Support G_ZEXT i1 to i32/i64 instruction selection. Reviewers: zvi, guyblank Reviewed By: guyblank Subscribers: rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D32965 llvm-svn: 302623
* [UnreachableBlockElim] Check return value of constrainRegClass().Mikael Holmen2017-05-101-3/+4
| | | | | | | | | | | | | | | | | | | Summary: MachineRegisterInfo::constrainRegClass() can fail if two register classes don't have a common subclass or if the register class doesn't contain enough registers. Check the return value before trying to remove Phi nodes, and if we can't constrain, we output a COPY instead of simply replacing registers. Reviewers: kparzysz, david2050, wmi Reviewed By: kparzysz Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32999 llvm-svn: 302622
* [CodeGen] Don't require AA in TwoAddress at -O0.Ahmed Bougacha2017-05-101-2/+5
| | | | | | | | | | | | | This is a follow-up to r302611, which moved an -O0 computation of DT from SDAGISel to TwoAddress. Don't use it here either, and avoid computing it completely. The only use was forwarding the analysis as an optional argument to utility functions. Differential Revision: https://reviews.llvm.org/D32766 llvm-svn: 302612
* [CodeGen] Don't require AA in SDAGISel at -O0.Ahmed Bougacha2017-05-104-27/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | Before r247167, the pass manager builder controlled which AA implementations were used, exporting them all in the AliasAnalysis analysis group. Now, AAResultsWrapperPass always uses BasicAA, but still uses other AA implementations if made available in the pass pipeline. But regardless, SDAGISel is required at O0, and really doesn't need to be doing fancy optimizations based on useful AA results. Don't require AA at CodeGenOpt::None, and only use it otherwise. This does have a functional impact (and one testcase is pessimized because we can't reuse a load). But I think that's desirable no matter what. Note that this alone doesn't result in less DT computations: TwoAddress was previously able to reuse the DT we computed for SDAG. That will be fixed separately. Differential Revision: https://reviews.llvm.org/D32766 llvm-svn: 302611
* [CodeGen] Compute DT/LI lazily in SafeStackLegacyPass. NFC.Ahmed Bougacha2017-05-101-2/+15
| | | | | | | | | | | | | We currently require SCEV, which requires DT/LI. Those are expensive to compute, but the pass only runs for functions that have the safestack attribute. Compute DT/LI to build SCEV lazily, only when the pass is actually going to transform the function. Differential Revision: https://reviews.llvm.org/D31302 llvm-svn: 302610
* [CodeGen] Split SafeStack into a LegacyPass and a utility. NFC.Ahmed Bougacha2017-05-102-72/+89
| | | | | | | | | This lets the pass focus on gathering the required analyzes, and the utility class focus on the transformation. Differential Revision: https://reviews.llvm.org/D31303 llvm-svn: 302609
* [WebAssembly] Fix build error in wasm YAML codeSam Clegg2017-05-101-3/+3
| | | | | | | | | | | This warning didn't show up on my local build but is causing the bots to fail. Seems like a bad idea to have types and variables with the same name anyhow. Differential Revision: https://reviews.llvm.org/D33022 llvm-svn: 302606
* [InstCombine] add helper function for add X, C folds; NFCISanjay Patel2017-05-101-34/+45
| | | | llvm-svn: 302605
* [WebAssembly] Improve libObject support for wasm imports and exportsSam Clegg2017-05-092-12/+35
| | | | | | | | | | | | Previously we had only supported the importing and exporting of functions and globals. Also, add usefull overload of getWasmSymbol() and getNumberOfSymbols() in support of lld port. Differential Revision: https://reviews.llvm.org/D33011 llvm-svn: 302601
* [ProfileSummary] Make getProfileCount a non-static member function.Easwaran Raman2017-05-094-12/+14
| | | | | | | | | | This change is required because the notion of count is different for sample profiling and getProfileCount will need to determine the underlying profile type. Differential revision: https://reviews.llvm.org/D33012 llvm-svn: 302597
* FunctionImport: Simplify function llvm::thinLTOInternalizeModule. NFCI.Peter Collingbourne2017-05-091-10/+5
| | | | llvm-svn: 302595
* [ExecutionEngine] Make RuntimeDyld::MemoryManager responsible for tracking EHLang Hames2017-05-099-24/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | frames. RuntimeDyld was previously responsible for tracking allocated EH frames, but it makes more sense to have the RuntimeDyld::MemoryManager track them (since the frames are allocated through the memory manager, and written to memory owned by the memory manager). This patch moves the frame tracking into RTDyldMemoryManager, and changes the deregisterFrames method on RuntimeDyld::MemoryManager from: void deregisterEHFrames(uint8_t *Addr, uint64_t LoadAddr, size_t Size); to: void deregisterEHFrames(); Separating this responsibility will allow ORC to continue to throw the RuntimeDyld instances away post-link (saving a few dozen bytes per lazy function) while properly deregistering frames when modules are unloaded. This patch also updates ORC to call deregisterEHFrames when modules are unloaded. This fixes a bug where an exception that tears down the JIT can then unwind through dangling EH frames that have been deallocated but not deregistered, resulting in UB. For people using SectionMemoryManager this should be pretty much a no-op. For people with custom allocators that override registerEHFrames/deregisterEHFrames, you will now be responsible for tracking allocated EH frames. Reviewed in https://reviews.llvm.org/D32829 llvm-svn: 302589
* [GVN] Fix a crash on encountering non-integral pointersKeno Fischer2017-05-091-0/+9
| | | | | | | | | | | | | | | | | | Summary: This fixes the immediate crash caused by introducing an incorrect inttoptr before attempting the conversion. There may still be a legality check missing somewhere earlier for non-integral pointers, but this change seems necessary in any case. Reviewers: sanjoy, dberlin Reviewed By: dberlin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32623 llvm-svn: 302587
* [AMDGPU] Fixed typo in GCNRegPressure, NFCStanislav Mekhanoshin2017-05-092-15/+15
| | | | | | VGRP -> VGPR, SGRP -> SGPR llvm-svn: 302586
* DAGCombine: Combine shuffles of splat-shufflesZvi Rackover2017-05-091-0/+54
| | | | | | | | | | | | | | Summary: Reapply r299047, but this time handle correctly splat-masks with undef elements. Reviewers: spatel, RKSimon, eli.friedman, andreadb Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31961 llvm-svn: 302583
* [AArch64] Consider widening instructions in cost calculationsMatthew Simpson2017-05-094-10/+112
| | | | | | | | | | | | | | | The AArch64 instruction set has a few "widening" instructions (e.g., uaddl, saddl, uaddw, etc.) that take one or more doubleword operands and produce quadword results. The operands are automatically sign- or zero-extended as appropriate. However, in LLVM IR, these extends are explicit. This patch updates TTI to consider these widening instructions as single operations whose cost is attached to the arithmetic instruction. It marks extends that are part of a widening operation "free" and applies a sub-target specified overhead (zero by default) to the arithmetic instructions. Differential Revision: https://reviews.llvm.org/D32706 llvm-svn: 302582
* [InstCombine] clean up matchDeMorgansLaws(); NFCISanjay Patel2017-05-091-32/+13
| | | | | | | | | | | | | | The motivation for getting rid of dyn_castNotVal is to allow fixing: https://bugs.llvm.org/show_bug.cgi?id=32706 So this was supposed to be functional-change-intended for the case of inverting constants and applying DeMorgan. However, I can't find any cases where that pattern will actually get to matchDeMorgansLaws() because we have other folds in visitAnd/visitOr that do the same thing. So this ends up just being a clean-up patch with slight efficiency improvement, but no-functional-change-intended. llvm-svn: 302581
* [NewGVN] Simplify a DEBUG() statement. NFCI.Davide Italiano2017-05-091-2/+1
| | | | llvm-svn: 302579
* [codeview] Check for a DIExpression offset for local variablesReid Kleckner2017-05-092-1/+27
| | | | | | | | Fixes inalloca parameters, which previously all pointed to the same offset. Extend the test to use llvm-readobj so that we can test the offset in a readable way. llvm-svn: 302578
* Make it illegal for two Functions to point to the same DISubprogramAdrian Prantl2017-05-094-46/+156
| | | | | | | | | | | | | | | | | | | As recently discussed on llvm-dev [1], this patch makes it illegal for two Functions to point to the same DISubprogram and updates FunctionCloner to also clone the debug info of a function to conform to the new requirement. To simplify the implementation it also factors out the creation of inlineAt locations from the Inliner into a general-purpose utility in DILocation. [1] http://lists.llvm.org/pipermail/llvm-dev/2017-May/112661.html <rdar://problem/31926379> Differential Revision: https://reviews.llvm.org/D32975 This reapplies r302469 with a fix for a bot failure (reparentDebugInfo now checks for the case the orig and new function are identical). llvm-svn: 302576
* NFC: refactor replaceDominatedUsesWithPiotr Padlewski2017-05-091-27/+26
| | | | | | | | | | | | | | | Summary: Since I will post patch with some changes to replaceDominatedUsesWith, it would be good to avoid duplicating code again. Reviewers: davide, dberlin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32798 llvm-svn: 302575
* [DWARF] Fix a parsing issue with type unit headers.Wolfgang Pieb2017-05-091-1/+5
| | | | | | | | Reviewers: dblaikie Differential Revision: https://reviews.llvm.org/D32987 llvm-svn: 302574
* Fix the Endianness bug by adding the little endian UTF marker.Eric Beckmann2017-05-091-2/+0
| | | | | | | | | | | | Summary: Quick fix Reviewers: zturner, uweigand Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33014 llvm-svn: 302573
* Suppress all uses of LLVM_END_WITH_NULL. NFC.Serge Guelton2017-05-0915-128/+59
| | | | | | | | | Use variadic templates instead of relying on <cstdarg> + sentinel. This enforces better type checking and makes code more readable. Differential Revision: https://reviews.llvm.org/D32541 llvm-svn: 302571
* [lanai] Add computeKnownBitsForTargetNode for Lanai.Jacques Pienaar2017-05-093-5/+29
| | | | | | | | | | | | | | Summary: computeKnownBitsForTargetNode was not defined for Lanai which resulted in additional AND's with 0x1 for the output of SETCC instructions. Reviewers: eliben, majnemer Reviewed By: majnemer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29605 llvm-svn: 302568
* [NewGVN] Explain why sorting by pointer values doesn't introduce ↵Davide Italiano2017-05-091-0/+4
| | | | | | | | non-determinism. Thanks to Eli for pointing out in a post-commit review comment. llvm-svn: 302566
* [SystemZ] Support missing relocation types in RuntimeDyldELFUlrich Weigand2017-05-091-3/+18
| | | | | | | | | Handle some more relocation types in RuntimeDyldELF::resolveSystemZRelocation This fixes a number of failing LLDB test cases. llvm-svn: 302565
* [WebAssembly] Fix validation of start functionSam Clegg2017-05-091-1/+1
| | | | | | | | | | The check for valid start function was inverted. Added a new test in test/Object to check this case and fixed the existing tests in for ObjectYAML. Differential Revision: https://reviews.llvm.org/D32986 llvm-svn: 302560
* [RegScavenger] Rangify a loop, NFCKrzysztof Parzyszek2017-05-091-4/+3
| | | | llvm-svn: 302554
* [NewGVN] Fix a consistent order for phi nodes operands.Davide Italiano2017-05-091-7/+19
| | | | | | | | | | | | | | | | | | | | | | | | | The way we currently define congruency for two PHIExpression(s) is: 1) The operands to the phi functions are congruent 2) The PHIs are defined in the same BasicBlock. NewGVN works under the assumption that phi operands are in predecessor order, or at least in some consistent order. OTOH, is valid IR: patatino: %meh = phi i16 [ %0, %winky ], [ %conv1, %tinky ] %banana = phi i16 [ %0, %tinky ], [ %conv1, %winky ] br label %end and the in-memory representations of the two SSA registers have an inconsistent order. This violation of NewGVN assumptions results into two PHIs found congruent when they're not. While we think it's useful to have always a consistent order enforced, let's fix this in NewGVN sorting uses in predecessor order before creating a PHI expression. Differential Revision: https://reviews.llvm.org/D32990 llvm-svn: 302552
* [APInt] Remove return value from tcFullMultiply.Craig Topper2017-05-091-11/+5
| | | | | | | | The description says it returns the number of words needed to represent the results. But the way it was coded it always returns (lhsWords + rhsWords) or (lhsWords + rhsWords - 1). But the result could be even smaller than that and it wouldn't tell you. No one uses the result today so rather than try to fix it, just remove it. llvm-svn: 302551
* NewGVN: Make all of symbolic evaluation logically const.Daniel Berlin2017-05-091-64/+74
| | | | llvm-svn: 302550
* [X86] Add more patterns for BZHI iselCraig Topper2017-05-091-0/+32
| | | | | | | | | | | | | | | | | | | | | | This patch adds more patterns that a reasonable person might write that can be compiled to BZHI. This adds support for (~0U >> (32 - b)) & a; and a << (32 - b) >> (32 - b); This was inspired by the code in APInt::clearUnusedBits. This can pass an index of 32 to the bzhi instruction which a quick test of Haswell hardware shows will not mask any bits. Though the description text in the Intel manual says the "index is saturated to OperandSize-1". The pseudocode in the same manual indicates no bits will be zeroed for this case. I think this is still missing cases where the subtract portion is an 8-bit operation. Differential Revision: https://reviews.llvm.org/D32616 llvm-svn: 302549
* [InstCombineCasts] Fix checks in sext->lshr->trunc pattern.Sanjay Patel2017-05-091-6/+14
| | | | | | | | | | | | | | | The comment says to avoid the case where zero bits are shifted into the truncated value, but the code checks that the shift is smaller than the truncated value instead of the number of bits added by the sign extension. Fixing this allows a shift by more than the value size to be introduced, which is undefined behavior, so the shift is capped at the value size minus one, which has the expected behavior of filling the value with the sign bit. Patch by Jacob Young! Differential Revision: https://reviews.llvm.org/D32285 llvm-svn: 302548
* VX512] Only look at lower bit in constant scalar masksGuy Blank2017-05-091-2/+4
| | | | | | | | | for scalar masked instructions only the lower bit of the mask is relevant. so for constant masks we should either do an unmasked operation or no operation, depending on the value of the lower bit. This patch handles cases where the lower bit is '1'. Differential Revision: https://reviews.llvm.org/D32805 llvm-svn: 302546
* Re-land "Use the frame index side table for byval and inalloca arguments"Reid Kleckner2017-05-094-41/+68
| | | | | | This re-lands r302483. It was not the cause of PR32977. llvm-svn: 302544
OpenPOWER on IntegriCloud