summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* [AVX] Implement BUILD_VECTOR lowering for 256-bit vectors. ForDavid Greene2011-02-081-3/+64
| | | | | | | anything but the simplest of cases, lower a 256-bit BUILD_VECTOR by splitting it into 128-bit parts and recombining. llvm-svn: 125105
* Add SplitEditor::overlapIntv() to create small ranges where both registers ↵Jakob Stoklund Olesen2011-02-083-2/+53
| | | | | | | | | | | | | | | | | | | | | | are live. If a live range is used by a terminator instruction, and that live range needs to leave the block on the stack or in a different register, it can be necessary to have both sides of the split live at the terminator instruction. Example: %vreg2 = COPY %vreg1 JMP %vreg1 Becomes after spilling %vreg2: SPILL %vreg1 JMP %vreg1 The spill doesn't kill the register as is normally the case. llvm-svn: 125102
* Add assertion.Jakob Stoklund Olesen2011-02-081-3/+4
| | | | llvm-svn: 125101
* Fix PostRA antidependence breaker.Andrew Trick2011-02-082-11/+49
| | | | | | | | Avoid using the same register for two def operands or and earlyclobber def and use operand. This fixes PR8986 and improves on the prior fix for rdar://problem/8959122. llvm-svn: 125089
* Temporary workaround for a bad bug introduced by r121082 which replacedEvan Cheng2011-02-082-8/+19
| | | | | | | | | | | | t2LDRpci with t2LDRi12. There are a couple of problems with this. 1. The encoding for the literal and immediate constant are different. Note bit 7 of the literal case is 'U' so it can be negative. 2. t2LDRi12 is now narrowed to tLDRpci before constant island pass is run. So we end up never using the Thumb2 instruction, which ends up creating a lot more constant islands. llvm-svn: 125074
* Don't split any loop backedges, including backedges of loops other thanDan Gohman2011-02-081-15/+17
| | | | | | | | the active loop. This is generally desirable, and it avoids trouble in situations such as the testcase in PR9123, though the failure mode depends on use-list order, so it is infeasible to test. llvm-svn: 125065
* Add LiveIntervals::shrinkToUses().Jakob Stoklund Olesen2011-02-083-23/+135
| | | | | | | | After uses of a live range are removed, recompute the live range to only cover the remaining uses. This is necessary after rematerializing the value before some (but not all) uses. llvm-svn: 125058
* SimplifyCFG: Track the number of used icmps when turning a icmp chain into a ↵Benjamin Kramer2011-02-071-7/+22
| | | | | | | | switch. If we used only one icmp, don't turn it into a switch. Also prevent the switch-to-icmp transform from creating identity adds, noticed by Marius Wachtler. llvm-svn: 125056
* Add support for parsing dmb/dsb instructionsBruno Cardoso Lopes2011-02-073-0/+65
| | | | llvm-svn: 125055
* Remove comment about an argument that was removed couple of years ago.Devang Patel2011-02-071-1/+0
| | | | llvm-svn: 125054
* Remove the MCR asm parser hack and start using the custom target specific asmBruno Cardoso Lopes2011-02-072-31/+106
| | | | | | | | | | | | | | | | | | parsing of operands introduced in r125030. As a small note, besides using a more generic approach we can also have more descriptive output when debugging llvm-mc, example: mcr p7, #1, r5, c1, c1, #4 note: parsed instruction: ['mcr', <ARMCC::al>, <coprocessor number: 7>, 1, <register 73>, <coprocessor register: 1>, <coprocessor register: 1>, 4] llvm-svn: 125052
* fix comment change.Chris Lattner2011-02-071-1/+1
| | | | llvm-svn: 125047
* [AVX] Insert/extract subvector lowering support. This includes aDavid Greene2011-02-071-2/+101
| | | | | | | couple of utility functions that will be used in other places for more AVX lowering. llvm-svn: 125029
* ARM/MC/ELF Lowercase .cpu attributes in .s, but make them uppercase in .oJason W Kim2011-02-071-3/+3
| | | | llvm-svn: 125025
* Fix an obvious typo which caused an isel assertion. rdar://8964854.Evan Cheng2011-02-071-1/+1
| | | | llvm-svn: 125023
* Add codegen support for using post-increment NEON load/store instructions.Bob Wilson2011-02-073-145/+546
| | | | | | | | The vld1-lane, vld1-dup and vst1-lane instructions do not yet support using post-increment versions, but all the rest of the NEON load/store instructions should be handled now. llvm-svn: 125014
* Change VLD3/4 and VST3/4 for quad registers to not update the address register.Bob Wilson2011-02-073-65/+89
| | | | | | | | | | | | These operations are expanded to pairs of loads or stores, and the first one uses the address register update to produce the address for the second one. So far, the second load/store has also updated the address register, just for convenience, since that output has never been used. In anticipation of actually supporting post-increment updates for these operations, this changes the non-updating operations to use a non-updating load/store for the second instruction. llvm-svn: 125013
* Fix some NEON instruction itineraries.Bob Wilson2011-02-071-12/+16
| | | | llvm-svn: 125012
* Fix a comment: addrmode6 no longer includes the optional writeback flag.Bob Wilson2011-02-071-1/+1
| | | | llvm-svn: 125011
* Remove inaccurate comments: so_imm and t2_so_imm operands are not encodedBob Wilson2011-02-072-8/+2
| | | | | | until the instructions are emitted or printed. llvm-svn: 125010
* Move code for OffsetCompare struct closer to where it is used.Bob Wilson2011-02-071-11/+11
| | | | llvm-svn: 125009
* implement .ll and .bc support for nsw/nuw on shl and exact on lshr/ashr.Chris Lattner2011-02-073-101/+114
| | | | | | Factor some code better. llvm-svn: 125006
* Add an m_Div pattern for matching either a udiv or an sdiv and use itDuncan Sands2011-02-071-4/+2
| | | | | | to simplify the "(X/Y)*Y->X when the division is exact" transform. llvm-svn: 125004
* Teach ARM/MC/ELF about gcc compatible reloc output to get past odd linkageJason W Kim2011-02-071-3/+45
| | | | | | | | | | | | | | | | | | failures with relocations. The code committed is a first cut at compatibility for emitted relocations in ELF .o. Why do this? because existing ARM tools like emitting relocs symbols as explicit relocations, not as section-offset relocs. Result is that with these changes, 1) relocs are now substantially identical what to gcc outputs. 2) larger apps (including many spec2k tests) compile, cross-link, and pass Added reminder fixme to tests for future conversion to .s form. llvm-svn: 124996
* Rework some .ARM.attribute work for improved gcc compatibility.Jason W Kim2011-02-072-13/+84
| | | | | | | Unified EmitTextAttribute for both Asm and Obj emission (.cpu only) Added necessary cortex-A8 related attrs for codegen compat tests. llvm-svn: 124995
* teach instsimplify to transform (X / Y) * Y to XChris Lattner2011-02-061-3/+5
| | | | | | when the div is an exact udiv. llvm-svn: 124994
* enhance vmcore to know that udiv's can be exact, and add a trivialChris Lattner2011-02-067-17/+26
| | | | | | | | instcombine xform to exercise this. Nothing forms exact udivs yet though. This is progress on PR8862 llvm-svn: 124992
* Remove premature optimization that avoided calculating argument weightsEric Christopher2011-02-061-5/+0
| | | | | | | | | if we weren't going to inline the function. The rest of the code using this was removed. Fixes PR9154. llvm-svn: 124991
* Simplify test, as suggested by Chris.Anders Carlsson2011-02-061-6/+2
| | | | llvm-svn: 124990
* Remove a virtual inheritance case that clang can devirtualize fully now.Anders Carlsson2011-02-061-21/+0
| | | | llvm-svn: 124989
* When loading from a constant, fold inttoptr if the integer type and the ↵Anders Carlsson2011-02-061-0/+11
| | | | | | resulting pointer type both have the same size. llvm-svn: 124987
* Simplify away redundant test, and document what's going on.Nick Lewycky2011-02-061-2/+5
| | | | llvm-svn: 124977
* Remove specialized comparison of InlineAsm objects. They're uniqued on creationNick Lewycky2011-02-061-6/+2
| | | | | | now, and this wasn't comparing some of their relevant bits anyhow. llvm-svn: 124976
* Fix another warning.Anders Carlsson2011-02-051-1/+1
| | | | llvm-svn: 124961
* Fix a clang warning.Anders Carlsson2011-02-051-1/+2
| | | | llvm-svn: 124960
* Windows/DynamicLibrary.inc: Split explicit symbols into explicit_symbols.inc.NAKAMURA Takumi2011-02-052-60/+83
| | | | | | | config.h.* have conditions whether each symbol is defined or not. Autoconf and CMake may check symbols in libgcc.a for JIT on Mingw. llvm-svn: 124950
* Target/X86: Tweak allocating shadow area (aka home) on Win64. It must be ↵NAKAMURA Takumi2011-02-053-9/+20
| | | | | | enough for caller to allocate one. llvm-svn: 124949
* lib/Target/X86/X86ISelLowering.cpp: Introduce a new variable "IsWin64". No ↵NAKAMURA Takumi2011-02-051-3/+4
| | | | | | functional changes. llvm-svn: 124948
* lib/Target/X86/X86JITInfo.cpp: Add Win64 stuff.NAKAMURA Takumi2011-02-051-0/+8
| | | | llvm-svn: 124947
* Target/X86: Fix whitespace.NAKAMURA Takumi2011-02-053-7/+7
| | | | llvm-svn: 124946
* Windows/Program.inc: Quote arguments when dubious characters (used by ↵NAKAMURA Takumi2011-02-051-1/+1
| | | | | | cmd.exe or MSYS shell) are included to invoke CreateProcess(). Thanks to Danil Malyshev. llvm-svn: 124945
* Fix an anti-dep breaker corner case.Andrew Trick2011-02-051-1/+0
| | | | | | | | | | | | | <rdar://problem/8959122> illegal register operands for UMULL instruction in cfrac nightly test I'm stil working on a unit test, but the case is: rx = movcc rx, r3 r2 = ldr r2, r3 = umull r2, r2 The anti-dep breaker should not convert this into an illegal instruction: r2, r2 = umull llvm-svn: 124932
* Fix cut and paste error spotted by Jakob.Eric Christopher2011-02-051-1/+1
| | | | llvm-svn: 124930
* Be more strict about the first/last interference-free use.Jakob Stoklund Olesen2011-02-051-4/+25
| | | | | | If the interference overlaps the instruction, we cannot separate it. llvm-svn: 124918
* Add assertions to verify that the new interval is clear of the interference.Jakob Stoklund Olesen2011-02-051-7/+14
| | | | | | | If these inequalities don't hold, we are creating a live range split that won't allocate. llvm-svn: 124917
* Rewrite how the indirect call bonus is handled. This now works by:Eric Christopher2011-02-051-78/+125
| | | | | | | | | | | | | | | | | a) Making it a per call site bonus for functions that we can move from indirect to direct calls. b) Reduces the bonus from 500 to 100 per call site. c) Subtracts the size of the possible newly inlineable call from the bonus to only add a bonus if we can inline a small function to devirtualize it. Also changes the bonus from a positive that's subtracted to a negative that's added. Fixes the remainder of rdar://8546196 by reducing the object file size after inlining by 84%. llvm-svn: 124916
* [AVX] Revert 124910 until clients are ready.David Greene2011-02-051-122/+0
| | | | llvm-svn: 124912
* [AVX] Add some utilities to insert and extract 128-bit subvectors.David Greene2011-02-041-0/+122
| | | | | | | | This allows us to easily support 256-bit operations that don't have native 256-bit support. This applies to integer operations, certain types of shuffles and various othher things. llvm-svn: 124910
* Apparently, it is possible for a block with a landing pad successor to have ↵Jakob Stoklund Olesen2011-02-041-1/+1
| | | | | | | | | no calls. In that case we simply ignore the landing pad and split live ranges before the first terminator. llvm-svn: 124907
* Merge .debug_loc entries whenever possible to reduce debug_loc size.Devang Patel2011-02-042-15/+32
| | | | llvm-svn: 124904
OpenPOWER on IntegriCloud