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* [WebAssembly] Remove the override of haveFastSqrt.Dan Gohman2015-12-082-6/+0
| | | | | | | The default implementation in BasicTTI already checks TLI and does the right thing. llvm-svn: 254993
* IR: Allow vectors of halfs to be ConstantDataVectorsJustin Bogner2015-12-081-3/+15
| | | | | | | | Currently, vectors of halfs end up as ConstantVectors, but there isn't a good reason they can't be ConstantDataVectors. This should save some memory. llvm-svn: 254991
* AsmPrinter: Use emitGlobalConstantFP to emit elements of constant dataJustin Bogner2015-12-081-16/+4
| | | | | | | | | | It's strange to duplicate the logic for emitting FP values into emitGlobalConstantDataSequential, and it's even stranger that we end up printing the verbose assembly comments differently between the two paths. Just call into emitGlobalConstantFP rather than crudely duplicating its logic. llvm-svn: 254988
* [CXX TLS calling convention] Add support for AArch64.Manman Ren2015-12-082-0/+13
| | | | | | rdar://9001553 llvm-svn: 254978
* [IndVars] Have getInsertPointForUses preserve LCSSASanjoy Das2015-12-082-14/+37
| | | | | | | | | | | | | | | Summary: Also add a stricter post-condition for IndVarSimplify. Fixes PR25578. Test case by Michael Zolotukhin. Reviewers: hfinkel, atrick, mzolotukhin Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D15059 llvm-svn: 254977
* [SCEVExpander] Have hoistIVInc preserve LCSSASanjoy Das2015-12-081-0/+3
| | | | | | | | | | | | | | | | Summary: (Note: the problematic invocation of hoistIVInc that caused PR24804 came from IndVarSimplify, not from SCEVExpander itself) Fixes PR24804. Test case by David Majnemer. Reviewers: hfinkel, majnemer, atrick, mzolotukhin Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D15058 llvm-svn: 254976
* Add Instruction::getFunction; NFCSanjoy Das2015-12-081-0/+5
| | | | | | Will be used in a upcoming patch. llvm-svn: 254975
* fix return values to match bool return type; NFC Sanjay Patel2015-12-071-2/+2
| | | | llvm-svn: 254968
* Factor two calls to a common location.Rafael Espindola2015-12-071-7/+3
| | | | llvm-svn: 254967
* Remove debug output that snuck into 254957Philip Reames2015-12-071-6/+0
| | | | llvm-svn: 254960
* Reapply 254950 w/fixPhilip Reames2015-12-072-44/+57
| | | | | | | | | | | | | | | | | 254950 ended up being not NFC. The previous code was overriding the flags for whether an instruction read or wrote memory using the target specific flags returned via TTI. I'd missed this in my refactoring. Since I mistakenly built only x86 and didn't notice the number of unsupported tests, I didn't catch that before the original checkin. This raises an interesting issue though. Given we have function attributes (i.e. readonly, readnone, argmemonly) which describe the aliasing of intrinsics, why does TTI have this information overriding the instruction definition at all? I see no reason for this, but decided to preserve existing behavior for the moment. The root issue might be that we don't have a "writeonly" attribute. Original commit message: [EarlyCSE] Simplify and invert ParseMemoryInst [NFCI] Restructure ParseMemoryInst - which was introduced to abstract over target specific load and stores instructions - to just query the underlying instructions. In theory, this could be slightly slower than caching the results, but in practice, it's very unlikely to be measurable. The simple query scheme makes it far easier to understand, and much easier to extend with new queries. Given I'm about to need to add new query types, doing the cleanup first seemed worthwhile. Do we still believe the target specific intrinsic handling is worthwhile in EarlyCSE? It adds quite a bit of complexity and makes the code harder to read. Being able to delete the abstraction entirely would be wonderful. llvm-svn: 254957
* Revert 254950Philip Reames2015-12-071-45/+44
| | | | | | It's causing test failures on AArch64. Due to a bad build config on my part, I apparently wasn't running the tests I thought I was. llvm-svn: 254954
* Simplify the error handling a bit. NFC.Rafael Espindola2015-12-071-10/+9
| | | | llvm-svn: 254952
* [EarlyCSE] Simplify and invert ParseMemoryInst [NFCI]Philip Reames2015-12-071-44/+45
| | | | | | | | | | Restructure ParseMemoryInst - which was introduced to abstract over target specific load and stores instructions - to just query the underlying instructions. In theory, this could be slightly slower than caching the results, but in practice, it's very unlikely to be measurable. The simple query scheme makes it far easier to understand, and much easier to extend with new queries. Given I'm about to need to add new query types, doing the cleanup first seemed worthwhile. Do we still believe the target specific intrinsic handling is worthwhile in EarlyCSE? It adds quite a bit of complexity and makes the code harder to read. Being able to delete the abstraction entirely would be wonderful. llvm-svn: 254950
* Use updated threshold for indirect call bonusEaswaran Raman2015-12-071-2/+2
| | | | | | | | When considering foo->bar inlining, if there is an indirect call in foo which gets resolved to a direct call (say baz), then we try to inline baz into bar with a threshold T and subtract max(T - Cost(bar->baz), 0) from Cost(foo->bar). This patch uses max(Threshold(bar->baz) - Cost(bar->baz)) instead, where Thresheld(bar->baz) could be different from T due to bonuses or subtractions. Threshold(bar->baz) - Cost(bar->baz) better represents the desirability of inlining baz into bar. Differential Revision: http://reviews.llvm.org/D14309 llvm-svn: 254945
* [PPC64] Convert bool literals to i32Kit Barton2015-12-074-0/+261
| | | | | | | Convert i1 values to i32 values if they should be allocated in GPRs instead of CRs. Phabricator: http://reviews.llvm.org/D14064 llvm-svn: 254942
* don't repeat function names in comments; NFCSanjay Patel2015-12-071-30/+23
| | | | llvm-svn: 254930
* fix 'the the '; NFCSanjay Patel2015-12-073-3/+3
| | | | llvm-svn: 254928
* [ThinLTO] Support for specifying function index from pass managerTeresa Johnson2015-12-072-11/+33
| | | | | | | | | | | | | | | | Summary: Add a field on the PassManagerBuilder that clang or gold can use to pass down a pointer to the function index in memory to use for importing when the ThinLTO backend is triggered. Add support to supply this to the function import pass. Reviewers: joker.eph, dexonsmith Subscribers: davidxl, llvm-commits, joker.eph Differential Revision: http://reviews.llvm.org/D15024 llvm-svn: 254926
* remove redundant check: optForSize() includes a check for the minsize ↵Sanjay Patel2015-12-071-3/+1
| | | | | | attribute; NFCI llvm-svn: 254925
* Link declaration lazily.Rafael Espindola2015-12-071-0/+3
| | | | | | | We already linked available_externally and linkonce lazily, this just adds declarations to the list. llvm-svn: 254917
* VX-512: Fixed a bug in FP logic operation loweringElena Demikhovsky2015-12-073-20/+38
| | | | | | | | | | | | | | FP logic instructions are supported in DQ extension on AVX-512 target. I use integer operations instead. Added tests. I also enabled FABS in this patch in order to check ANDPS. The operations are FOR, FXOR, FAND, FANDN. The instructions, that supported for 512-bit vector under DQ are: VORPS/PD, VXORPS/PD, VANDPS/PD, FANDNPS/PD. Differential Revision: http://reviews.llvm.org/D15110 llvm-svn: 254913
* [ARM] Generate ABI_optimization_goals build attribute, as described in the ↵Artyom Skrobov2015-12-073-7/+49
| | | | | | | | | | | | | | ARM ARM. Summary: This reverts r254234, and adds a simple fix for the annoying case of use-after-free. Reviewers: rengolin Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15236 llvm-svn: 254912
* AVX-512: Fixed masked load / store instruction selection for KNL.Elena Demikhovsky2015-12-073-28/+109
| | | | | | | | | | | | | | | Patterns were missing for KNL target for <8 x i32>, <8 x float> masked load/store. This intrinsic comes with all legal types: <8 x float> @llvm.masked.load.v8f32(<8 x float>* %addr, i32 align, <8 x i1> %mask, <8 x float> %passThru), but still requires lowering, because VMASKMOVPS, VMASKMOVDQU32 work with 512-bit vectors only. All data operands should be widened to 512-bit vector. The mask operand should be widened to v16i1 with zeroes. Differential Revision: http://reviews.llvm.org/D15265 llvm-svn: 254909
* AVX-512: implement kunpck intrinsics.Igor Breger2015-12-073-28/+43
| | | | | | Differential Revision: http://reviews.llvm.org/D14821 llvm-svn: 254908
* Change how the linker handles the old llvm.global_ctors.Rafael Espindola2015-12-071-92/+34
| | | | | | | | | | | | | | | | | Now instead of changing it to the new format and then linking, it just handles the old format while copying it over. The main differences are: * There is no rauw in the source module. * An old format input is always upgraded. The first item helps with having a sane API that passes in a GV list to the linker. The second one is a small step in deprecating the old format. llvm-svn: 254907
* [X86] Adding support for FWORD type for MS inline asmMarina Yatsina2015-12-071-0/+1
| | | | | | | | Adding support for FWORD type for MS inline asm. Differential Revision: http://reviews.llvm.org/D15268 llvm-svn: 254904
* [ARM] Flag vcvt{t,b} with an f16 type specifier as part of the FP16 extensionBradley Smith2015-12-072-4/+9
| | | | | | Additionally correct the Cortex-R7 definition to allow the FP16 feature. llvm-svn: 254900
* [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructionsZlatko Buljan2015-12-072-10/+37
| | | | | | Differential Revision: http://reviews.llvm.org/D9824 llvm-svn: 254897
* [Verifier] Fix !dbg validation if Scope is the SubprogramKeno Fischer2015-12-061-1/+4
| | | | | | | | | | | | | | | | | | Summary: We are inserting both Scope and SP into the Seen map and check whether it was already there in which case we skip the validation (the idea being that we already checked this Subprogram before). However, if (Scope == SP) as MDNodes, then inserting the Scope, will trigger the Seen check causing us to incorrectly not validate this !dbg attachment. Fix this by not performing the SP Seen check if Scope == SP Reviewers: pcc, dexonsmith, dblaikie Subscribers: dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D14697 llvm-svn: 254887
* [Orc] Rename IndirectStubsManagerBase to IndirectStubsManager.Lang Hames2015-12-063-3/+4
| | | | | | No functional change. llvm-svn: 254885
* [WebAssembly] Factor out a TypeToString function, since we need it in ↵Dan Gohman2015-12-063-31/+24
| | | | | | multiple places. llvm-svn: 254884
* [WebAssembly] Make tableswitch's 'default' operand explicit. NFC.Dan Gohman2015-12-061-6/+6
| | | | llvm-svn: 254883
* [WebAssembly] Enable folding of offsets into global variable addresses.Dan Gohman2015-12-062-8/+11
| | | | llvm-svn: 254882
* [WebAssembly] Add some more ideas to README.txt.Dan Gohman2015-12-061-0/+43
| | | | llvm-svn: 254880
* Create llvm.global_ctors in the new format.Rafael Espindola2015-12-061-2/+2
| | | | llvm-svn: 254878
* [X86] Add support for loopz, loopnz for Intel syntaxMarina Yatsina2015-12-061-2/+2
| | | | | | | | According to x86 spec, loopz and loopnz should be supported for Intel syntax, where loopz is equivalent to loope and loopnz is equivalent to loopne. Differential Revision: http://reviews.llvm.org/D15148 llvm-svn: 254877
* [X86][AVX512] add vmovss/sd missing encoding Asaf Badouh2015-12-062-39/+50
| | | | | | Differential Revision: http://reviews.llvm.org/D14701 llvm-svn: 254875
* [X86] Always generate precise CFA adjustments.Michael Kuperstein2015-12-063-12/+18
| | | | | | | | | | This removes the code path that generate "synchronous" (only correct at call site) CFA. We will probably want to re-introduce it once we are capable of emitting different .eh_frame and .debug_frame sections. Differential Revision: http://reviews.llvm.org/D14948 llvm-svn: 254874
* AVX512: support AVX512BW Intrinsic in 32bit mode.Igor Breger2015-12-061-51/+77
| | | | | | Differential Revision: http://reviews.llvm.org/D15076 llvm-svn: 254873
* Use make_range to reduce mentions of iterator type. NFCCraig Topper2015-12-063-11/+6
| | | | llvm-svn: 254872
* [InstCombine] Call getCmpPredicateForMinMax only with a valid SPFSanjoy Das2015-12-051-1/+5
| | | | | | | | | | | | | | | | Summary: There are `SelectPatternFlavor`s that don't represent min or max idioms, and we should not be passing those to `getCmpPredicateForMinMax`. Fixes PR25745. Reviewers: majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D15249 llvm-svn: 254869
* [WebAssembly] Don't perform the returned-argument optimization on constants.Dan Gohman2015-12-051-0/+3
| | | | llvm-svn: 254866
* [WebAssembly] Replace the fake JUMP_TABLE instruction with a def : Pat. NFC.Dan Gohman2015-12-051-5/+2
| | | | llvm-svn: 254864
* [WebAssembly] Implement direct calls to external symbols.Dan Gohman2015-12-052-7/+32
| | | | llvm-svn: 254863
* [WebAssembly] Support inline asm constraints of type i16 and similar.Dan Gohman2015-12-051-4/+7
| | | | llvm-svn: 254861
* [WebAssembly] Update a stale comment. NFC.Dan Gohman2015-12-051-2/+2
| | | | llvm-svn: 254859
* WebAssembly: improve readme, add placeholder for tests.JF Bastien2015-12-052-0/+11
| | | | llvm-svn: 254857
* [WebAssembly] Move useAA() out of line to make it more convenient to ↵Dan Gohman2015-12-052-1/+2
| | | | | | experiment with. llvm-svn: 254856
* [WebAssembly] Call TargetPassConfig base class functions in overriding ↵Dan Gohman2015-12-051-1/+11
| | | | | | functions. llvm-svn: 254855
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