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* AVX512: vpextrb/w/d/q and vpinsrb/w/d/q implementation.Igor Breger2015-10-083-44/+173
| | | | | | | | | This instructions doesn't have intrincis. Added tests for lowering and encoding. Differential Revision: http://reviews.llvm.org/D12317 llvm-svn: 249688
* Compute demanded bits for icmp instructionsJames Molloy2015-10-081-0/+7
| | | | | | | | | Instead of bailing out when we see an icmp, we can instead at least say that if the upper bits of both operands are known zero, they are not demanded. This doesn't help with signed comparisons, but it's at least better than bailing out. llvm-svn: 249687
* Treat Mul just like Add and SubtractJames Molloy2015-10-081-0/+12
| | | | | | | | | | Like adds and subtracts, muls ripple only to the left so we can use the same logic. While we're here, add a print method to DemandedBits so it can be used with -analyze, which we'll use in the testcase. llvm-svn: 249686
* Make demanded bits lazyJames Molloy2015-10-081-7/+19
| | | | | | | | | | The algorithm itself is still eager, but it doesn't get run until a query function is called. This greatly reduces the compile-time impact of requiring DemandedBits when at runtime it is not often used. NFCI. llvm-svn: 249685
* [X86] Fix wrong treatment of multi-lane blends in BUILD_VECTORtoBlendMask()Michael Kuperstein2015-10-081-2/+12
| | | | | | | | | | | This fixes two separate bugs: 1) The mask for the high lane was not set correctly. That fixes PR24532. 2) The transformation should bail out if it believes it involves more than 2 lanes, as it does not currently do anything sensible in this case. Differential Revision: http://reviews.llvm.org/D13505 llvm-svn: 249669
* Do not assert on first non-prologue instruction being a CFI directive.Michael Kuperstein2015-10-081-5/+1
| | | | llvm-svn: 249668
* [SystemZ] SystemZElimCompare pass improved.Jonas Paulsson2015-10-082-5/+38
| | | | | | | | | | | | | | Compare elimination extended to recognize load-and-test instructions used for comparison and eliminate them the same way as with compare instructions. Test case fp-cmp-05.ll updated to expect optimized results now also for z13. The order of instruction shortening and compare elimination passes have been changed so that opcodes do not have to be handled in both passes. Reviewed by Ulrich Weigand. llvm-svn: 249666
* [SystemZ] Bugfix: check CC reg liveness in SystemZShortenInst.Jonas Paulsson2015-10-081-4/+25
| | | | | | | | | | | | | | The following instruction shortening transformations would introduce a definition of the CC reg, so therefore liveness of CC reg must be checked: WFADB -> ADBR WFSDB -> SDBR Also add the CC reg implicit def operand to the MI in case of change of opcode. Reviewed by Ulrich Weigand. llvm-svn: 249665
* [SystemZ] Use load-and-test for fp compare with 0 if vector support is present.Jonas Paulsson2015-10-083-3/+52
| | | | | | | | | Since the LTxBRCompare instructions can't be used with vector registers, a normal load-and-test instruction (with a modelled def operand) is used instead. Reviewed by Ulrich Weigand. llvm-svn: 249664
* [SystemZ] More minor fixing in SystemZElimCompare.cppJonas Paulsson2015-10-081-9/+5
| | | | | | | | Don't use subreg indices since they are not used after regalloc. Reviewed by Ulrich Weigand. llvm-svn: 249663
* [SystemZ] Minor fixes in SystemZElimCompare.cppJonas Paulsson2015-10-081-4/+3
| | | | | | Reviewed by Ulrich Weigand. llvm-svn: 249662
* Use range-based for loops. NFC.Craig Topper2015-10-081-13/+7
| | | | llvm-svn: 249659
* [SCEV] Check `Pred` first in isKnownPredicateViaSplittingSanjoy Das2015-10-081-2/+2
| | | | | | | Comparing `Pred` with `ICmpInst::ICMP_ULT` is cheaper that memory access -- do that check before loading / storing `ProvingSplitPredicate`. llvm-svn: 249654
* [SCEV] Use `auto *` instead of `auto`; NFCISanjoy Das2015-10-081-7/+7
| | | | | | (As prescribed by the coding style document) llvm-svn: 249653
* Revert "Handle inline stacks in gcov-encoded sample profiles."Diego Novillo2015-10-082-88/+47
| | | | | | | | This reverts commit r249644. The buildbots are failing the new test I added. Investigating. llvm-svn: 249648
* [libFuzzer] fix 32-bit buildKostya Serebryany2015-10-081-1/+1
| | | | llvm-svn: 249646
* Handle inline stacks in gcov-encoded sample profiles.Diego Novillo2015-10-082-47/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for reading sample profiles with inline stacks. Inline stacks in a profile are generated when the sampled binary has samples in inlined functions. For instance, if main() calls foo() and foo() calls bar(), and bar() is inlined into foo() and foo() inlined into main(), the profile may look something like: main total:364084 head:0 [ ... ] 2.3: _Z3fool total:243786 1: 60149 1.2: 38568 1.4: 46511 1.7: _Z3bari total:98558 1.1: 52672 1.2: 45886 At line 2, discriminator 3, main() calls foo(). In turn, foo() calls bar() at line 1, discriminator 7. In the textual format, this stacking of inline calls is represented with indentation. With this change, LLVM can now read sample profile files generated by the create_gcov tool from https://github.com/google/autofdo. llvm-svn: 249644
* CodeGen: print and verify after TargetPassConfig::insertPass by defaultJustin Bogner2015-10-082-20/+34
| | | | | | | | | | | | | | In r224059, we started verifying after addPass, but missed doing so on insertPass. There isn't a good reason for the discrepancy, and skipping the verifier in these cases causes bugs. This also exposes a verifier error that was introduced in r249087, but the verifier doesn't run until after the register coalescer, when the issue happens to have been resolved. I've skipped the verifier after SIFixSGPRLiveRangesID to avoid the failures for now and will follow up with Matt for a proper fix. llvm-svn: 249643
* [WinEH] Fix 32-bit funclet epilogues in the presence of dynamic allocasReid Kleckner2015-10-071-2/+5
| | | | | | | | In particular, passing non-trivially copyable objects by value on win32 uses a dynamic alloca (inalloca). We would clobber ESP in the epilogue and end up returning to outer space. llvm-svn: 249637
* [WinEH] Refer to filter funclets using their symbol-table symbolDavid Majnemer2015-10-071-1/+2
| | | | | | | | The relocation for the filter funclet will be against a symbol table entry for a function instead of the section, making it easier to understand what is going on. llvm-svn: 249621
* [RS4GC] Use AssertingVH for RematerializedValueMapTy, NFCISanjoy Das2015-10-071-1/+2
| | | | | | | | | | Reviewers: reames, swaroop.sridhar Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D13489 llvm-svn: 249620
* [WinEH] Undo the effect of r249578 for 32-bitReid Kleckner2015-10-073-25/+22
| | | | | | | | | | | | The __CxxFrameHandler3 tables for 32-bit are supposed to hold stack offsets relative to EBP, not ESP. I blindly updated the win-catchpad.ll test case, and immediately noticed that 32-bit catching stopped working. While I'm at it, move the frame index to frame offset WinEH table logic out of PEI. PEI shouldn't have to know about WinEHFuncInfo. I realized we can calculate frame index offsets just fine from the table printer. llvm-svn: 249618
* [WinEH] Remove unreachable blocks before preparationDavid Majnemer2015-10-071-5/+5
| | | | | | | | | | | | | We remove unreachable blocks because it is pointless to consider them for coloring. However, we still had stale pointers to these blocks in some data structures after we removed them from the function. Instead, remove the unreachable blocks before attempting to do anything with the function. This fixes PR25099. llvm-svn: 249617
* git-clang-format r249548.Rafael Espindola2015-10-071-19/+19
| | | | | | Sorry for missing this the first time. llvm-svn: 249610
* [mips][FastISel] Factor out common code from switch statement. NFCVasileios Kalintiris2015-10-071-3/+7
| | | | llvm-svn: 249603
* IR: Create SymbolTableList wrapper around iplist, NFCDuncan P. N. Exon Smith2015-10-074-22/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | Create `SymbolTableList`, a wrapper around `iplist` for lists that automatically manage a symbol table. This commit reduces a ton of code duplication between the six traits classes that were used previously. As a drive by, reduce the number of template parameters from 2 to 1 by using a SymbolTableListParentType metafunction (I originally had this as a separate commit, but it touched most of the same lines so I squashed them). I'm in the process of trying to remove the UB in `createSentinel()` (see the FIXMEs I added for `ilist_embedded_sentinel_traits` and `ilist_half_embedded_sentinel_traits`). My eventual goal is to separate the list logic into a base class layer that knows nothing about (and isn't templated on) the downcasted nodes -- removing the need to invoke UB -- but for now I'm just trying to get a handle on all the current use cases (and cleaning things up as I see them). Besides these six SymbolTable lists, there are two others that use the addNode/removeNode/transferNodes() hooks: the `MachineInstruction` and `MachineBasicBlock` lists. Ideally there'll be a way to factor these hooks out of the low-level API entirely, but I'm not quite there yet. llvm-svn: 249602
* [IRBuilder] Add gc.statepoint related methods to IRBuilderSanjoy Das2015-10-071-32/+74
| | | | | | | | | | | | | | Summary: This adds some more routines to `IRBuilder` around creating calls and invokes to `gc.statepoint`. These will be used later. Reviewers: reames, swaroop.sridhar Subscribers: sanjoy, llvm-commits Differential Revision: http://reviews.llvm.org/D13371 llvm-svn: 249596
* [mips][FastISel] Use ternary operator to select opcode. NFCVasileios Kalintiris2015-10-071-8/+2
| | | | llvm-svn: 249594
* [WinEH] Set NoModuleLevelChanges in clone flagsJoseph Tremoulet2015-10-071-2/+7
| | | | | | | | | | | | | | | | Summary: This is necessary to keep the cloner from making bogus copies of debug metadata attached to the IR it is cloning. Also, avoid running RemapInstruction over all instructions in the common case that no cloning was performed. Reviewers: rnk, andrew.w.kaylor, majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D13514 llvm-svn: 249591
* Use SpecificBumpPtrAllocator to simplify the MCSeciton destruction.Rafael Espindola2015-10-071-14/+11
| | | | llvm-svn: 249589
* Revert "Revert "This patch builds on top of D13378 to handle constant ↵Mehdi Amini2015-10-071-0/+5
| | | | | | | | | | condition."" This reverts commit r249528 and reapply r249431. The fix for the fallout has been commited in r249575. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 249581
* [mips][FastISel] Simple refactoring of MipsFastISel::emitLogicalOP(). NFC.Vasileios Kalintiris2015-10-071-13/+17
| | | | llvm-svn: 249580
* [AArch64] Fold a floating-point divide by power of two into fp conversion.Chad Rosier2015-10-071-0/+67
| | | | | | Part of http://reviews.llvm.org/D13442 llvm-svn: 249579
* [WinEH] Fix two minor issues in __CxxFrameHandler3 tablesReid Kleckner2015-10-072-4/+3
| | | | | | | | | | | | There was an off-by-one bug in ip2state tables which manifested when one call immediately preceded the try-range of the next. The return address of the previous call would appear to be within the try range of the next scope, resulting in extra destructors or catches running. We also computed the wrong offset for catch parameter stack objects. The offset should be from RSP, not from RBP. llvm-svn: 249578
* AMDGPU: Fix missing implicit m0 uses on movrel instructionsMatt Arsenault2015-10-071-0/+7
| | | | llvm-svn: 249577
* [AArch64] Fold a floating-point multiply by power of two into fp conversion.Chad Rosier2015-10-071-0/+70
| | | | | | Part of http://reviews.llvm.org/D13442 llvm-svn: 249576
* [IndVars] Preserve LCSSA in `eliminateIdentitySCEV`Sanjoy Das2015-10-071-0/+3
| | | | | | | | | | | | | | | | | | | | Summary: After r249211, SCEV can see through some LCSSA phis. Add a `replacementPreservesLCSSAForm` check before replacing uses of these phi nodes with a simplified use of the induction variable to avoid breaking LCSSA. Fixes 25047. Depends on D13460. Reviewers: atrick, hfinkel Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D13461 llvm-svn: 249575
* [SCEV] Use some C++11'ism, NFCSanjoy Das2015-10-071-26/+21
| | | | | | | | | | Summary: Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D13457 llvm-svn: 249574
* [ARM] Promote helper function to SelectionDAG.Chad Rosier2015-10-072-34/+31
| | | | | | | | | I'll be using the function in a similar combine for AArch64. The helper was also improved to handle undef values. Part of http://reviews.llvm.org/D13442 llvm-svn: 249572
* Test commit access. Fixed comment to have correct input parameter name andKevin B. Smith2015-10-071-1/+1
| | | | | | period termination. llvm-svn: 249571
* [WinEH] Update CoreCLR EH for catchpad MBBsJoseph Tremoulet2015-10-072-4/+5
| | | | | | | | | | | | | | | Summary: Set the pad MBB as a funclet entry for CoreCLR as well as MSVCCXX, and update state numbering to put the catchpad block rather than its normal successor into the unwind map. Reviewers: majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D13492 llvm-svn: 249569
* [ARM] Use correct half-precision functions in EABI modeOliver Stannard2015-10-071-0/+8
| | | | | | | | | The ARM RTABI defines the half- to single-precision float conversion functions with an __aeabi prefix, but libgcc only has them with a __gnu prefix. Therefore we need to emit the __aeabi version when compiling with an eabi or eabihf triple, and the __gnu version with a gnueabi or gnueabihf triple. llvm-svn: 249565
* [ARM] Prevent PerformVDIVCombine from combining a vcvt/vdiv with 8 lanes.Chad Rosier2015-10-071-3/+4
| | | | | | This would result in a crash since the vcvt used does not support v8i32 types. llvm-svn: 249560
* Teach computeKnownBits to use new align attribute/metadataArtur Pilipenko2015-10-071-3/+12
| | | | | | | | Reviewed By: reames Differential Revision: http://reviews.llvm.org/D13470 llvm-svn: 249557
* [ARM][AArch64] Only lower to interleaved load/store if the target has NEONJeroen Ketema2015-10-072-10/+11
| | | | | | | | | Without an additional check for NEON, the compiler crashes during legalization of NEON ldN/stN. Differential Revision: http://reviews.llvm.org/D13508 llvm-svn: 249550
* Use non virtual destructors for sections.Rafael Espindola2015-10-072-21/+21
| | | | llvm-svn: 249548
* [ARM] Push more complex check down to reduce compile time. NFC.Chad Rosier2015-10-071-10/+10
| | | | llvm-svn: 249547
* Don't repeat names in comments and don't indent in namespaces. NFC.Rafael Espindola2015-10-071-3/+2
| | | | llvm-svn: 249546
* Revert: r249536 - Testing commit access with a trival whitespace change.Scott Egerton2015-10-071-1/+1
| | | | llvm-svn: 249537
* Testing commit access with a trival whitespace change.Scott Egerton2015-10-071-1/+1
| | | | llvm-svn: 249536
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