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* [MC] Move bundling and MCSubtargetInfo to MCEncodedFragment [NFC]Peter Smith2018-06-153-21/+25
| | | | | | | | | | | | | | Instruction bundling is only supported on descendants of the MCEncodedFragment type. By moving the bundling functionality and MCSubtargetInfo to this class it makes it easier to set and extract the MCSubtargetInfo when it is necessary. This is a refactoring change that will make it easier to pass the MCSubtargetInfo through to writeNops when nop padding is required. Differential Revision: https://reviews.llvm.org/D45959 llvm-svn: 334814
* Revert r334802 "[X86] Prevent folding stack reloads with instructions that ↵Craig Topper2018-06-151-7/+4
| | | | | | | | have an undefined register update." There's a typo causing the build to fail. llvm-svn: 334803
* [X86] Prevent folding stack reloads with instructions that have an undefined ↵Craig Topper2018-06-151-4/+7
| | | | | | | | register update. We want to keep the load unfolded so we can use the same register for both sources to avoid a false dependency. llvm-svn: 334802
* [X86] Add more instructions to the memory folding tables using the ↵Craig Topper2018-06-151-1/+220
| | | | | | | | | | autogenerated table as a guide. I think this covers most of the unmasked vector instructions. We're still missing a lot of the masked instructions. There are some test changes here because of the new folding support. I don't think these particular cases should be folded because it creates an undef register dependency. I think the changes introduced in r334175 are not handling stack folding. They're only blocking the peephole pass. llvm-svn: 334800
* [X86] Add 'Z' to the internal names of various EVEX instructions for overall ↵Craig Topper2018-06-153-76/+76
| | | | | | consistency. llvm-svn: 334785
* Add debug info for OProfile profiling supportAndrew Kaylor2018-06-152-2/+26
| | | | | | | | Patch by Gaetano Priori Differential Revision: https://reviews.llvm.org/D47925 llvm-svn: 334782
* Make uitofp and sitofp defined on overflow.Eli Friedman2018-06-141-7/+2
| | | | | | | | | | | IEEE 754 defines the expected result on overflow. As far as I know, hardware implementations (of f16), and compiler-rt (__floatuntisf) correctly return +-Inf on overflow. And I can't think of any useful transform that would take advantage of overflow being undefined here. Differential Revision: https://reviews.llvm.org/D47807 llvm-svn: 334777
* [ORC] Strip weak flags from a symbol once it is selected for materialization.Lang Hames2018-06-141-3/+4
| | | | | | | | | Once a symbol has been selected for materialization it can no longer be overridden. Stripping the weak flag guarantees this (override attempts will then be treated as duplicate definitions and result in a DuplicateDefinition error). llvm-svn: 334771
* easing the constraint for isNegatibleForFree and GetNegatedExpressionMichael Berg2018-06-141-4/+0
| | | | | | | | | | | | | | | | | Summary: Here we relax the old constraint which utilized unsafe with the TargetOption flag HonorSignDependentRoundingFPMathOption, with the assertion that unsafe is no longer needed or never was required for correctness on FDIV/FMUL. Reviewers: spatel, hfinkel, wristow, arsenm, javed.absar Reviewed By: spatel Subscribers: efriedma, wdng, tpr Differential Revision: https://reviews.llvm.org/D48057 llvm-svn: 334769
* [MSSA] Print more optimization informationGeorge Burgess IV2018-06-143-49/+71
| | | | | | | | | | | | | | In particular, when asked to print a MemoryAccess, we'll now print where defs are optimized to, and we'll print optimized access types. This patch also introduces an operator<< to make printing AliasResults easier. Patch by Juneyoung Lee! Differential Revision: https://reviews.llvm.org/D47860 llvm-svn: 334760
* [x86] be more selective about converting 'and' to shuffle (PR37749)Sanjay Patel2018-06-141-0/+6
| | | | | | | | | | | | | | | | | isVectorClearMaskLegal() is the TLI hook used by the generic DAGCombiner::XformToShuffleWithZero(). We've grown to accomodate/expect this transform to shuffle (disabling it more generally results in many regressions). So I'm narrowly excluding the 256-bit types that clearly are not worthwhile for AVX1. I think in most cases we are able to recover by converting the shuffle back into 'and' ops, but the cases in: https://bugs.llvm.org/show_bug.cgi?id=37749 ...show that there are cracks. llvm-svn: 334759
* [X86] Fix stale comment in folding tables.Craig Topper2018-06-141-3/+3
| | | | llvm-svn: 334758
* AMDGPU/GlobalISel: Implement select() for @llvm.amdgcn.cvt.pkrtzTom Stellard2018-06-143-0/+49
| | | | | | | | | | | | Reviewers: arsenm, nhaehnle Reviewed By: arsenm Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D45907 llvm-svn: 334757
* Re-apply "[VirtRegRewriter] Avoid clobbering registers when expanding copy ↵Justin Bogner2018-06-141-7/+46
| | | | | | | | | | | | | | | | bundles" This is r334750 (which was reverted in r334754) with a fix for an uninitialized variable that was caught by msan. Original commit message: > If a copy bundle happens to involve overlapping registers, we can end > up with emitting the copies in an order that ends up clobbering some > of the subregisters. Since instructions in the copy bundle > semantically happen at the same time, this is incorrect and we need to > make sure we order the copies such that this doesn't happen. llvm-svn: 334756
* Revert "[VirtRegRewriter] Avoid clobbering registers when expanding copy ↵Justin Bogner2018-06-141-46/+7
| | | | | | | | | | | | bundles" There's an msan failure: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/19549 This reverts r334750. llvm-svn: 334754
* updating isNegatibleForFree and GetNegatedExpression with fmf for faddMichael Berg2018-06-141-4/+3
| | | | | | | | | | | | | | Summary: A FMF constraint is added to FADD with unsafe still available as the fallback Reviewers: spatel, wristow, arsenm, hfinkel Reviewed By: spatel Subscribers: wdng Differential Revision: https://reviews.llvm.org/D48180 llvm-svn: 334753
* [WebAssembly] Ignore explicit section names for functionsSam Clegg2018-06-141-0/+6
| | | | | | | | | | | | | | | WebAssembly doesn't support more than one function per section and we rely on function sections being unique. This change ignores the section provided by the function to avoid two functions being in the same section. Without this change the object writer produces the following error for this test: LLVM ERROR: section already has a defining function: baz Differential Revision: https://reviews.llvm.org/D48178 llvm-svn: 334752
* [VirtRegRewriter] Avoid clobbering registers when expanding copy bundlesJustin Bogner2018-06-141-7/+46
| | | | | | | | | | | | If a copy bundle happens to involve overlapping registers, we can end up with emitting the copies in an order that ends up clobbering some of the subregisters. Since instructions in the copy bundle semantically happen at the same time, this is incorrect and we need to make sure we order the copies such that this doesn't happen. Differential Revision: https://reviews.llvm.org/D48154 llvm-svn: 334750
* [SCEV] Fix a variable name, NFC.Justin Lebar2018-06-141-6/+6
| | | | llvm-svn: 334738
* [SCEV] Simplify zext/trunc idiom that appears when handling bitmasks.Justin Lebar2018-06-141-0/+26
| | | | | | | | | | | | | | | | | | | Summary: Specifically, we transform zext(2^K * (trunc X to iN)) to iM -> 2^K * (zext(trunc X to i{N-K}) to iM)<nuw> This is helpful because pulling the 2^K out of the zext allows further optimizations. Reviewers: sanjoy Subscribers: hiraditya, llvm-commits, timshen Differential Revision: https://reviews.llvm.org/D48158 llvm-svn: 334737
* [SCEV] Simplify trunc-of-add/mul to add/mul-of-trunc under more circumstances.Justin Lebar2018-06-141-32/+22
| | | | | | | | | | | | | | | | | | | | Summary: Previously we would do this simplification only if it did not introduce any new truncs (excepting new truncs which replace other cast ops). This change weakens this condition: If the number of truncs stays the same, but we're able to transform trunc(X + Y) to X + trunc(Y), that's still simpler, and it may open up additional transformations. While we're here, also clean up some duplicated code. Reviewers: sanjoy Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D48160 llvm-svn: 334736
* [SCEV] Fix indentation and combine two if statements in getMulExpr, NFC.Justin Lebar2018-06-141-15/+14
| | | | llvm-svn: 334735
* Revert "[MC] Factor MCObjectStreamer::addFragmentAtoms out of MachO streamer."Sam Clegg2018-06-143-30/+24
| | | | | | | | | This reverts rL331412. We didn't up using fragment atoms in the wasm object writer after all. Differential Revision: https://reviews.llvm.org/D48173 llvm-svn: 334734
* Revert rL334704: "[DebugInfo] Check size of variable in ↵Bjorn Pettersson2018-06-142-45/+0
| | | | | | | | | | ConvertDebugDeclareToDebugValue" This reverts commit r334704. Buildbots detected an assertion in "test tsan in debug compiler-rt build". llvm-svn: 334732
* Avoid unused variable in non-assert builds.Nirav Dave2018-06-141-0/+1
| | | | llvm-svn: 334731
* [DAG] Avoid needing to walk out legalization tables. NFCI.Nirav Dave2018-06-142-193/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To avoid redundant work, during DAG legalization we keep tables mapping pre-legalized SDValues to post-legalized SDValues and a SDValue-to-SDValue map to enable fast node replacements. However, as the keys are nodes which may be reused it is possible that an entry in a table refers to a now deleted node N (that should have been renamed by the value replacement map) while a new node N' exists. If N' is then replaced that entry would be wrong. Previously we avoided this by when potentially violating this property, walking every table and updating all node pointers. This is very expensive but hopefully rare occurance. This patch assigns each instance of a SDValue used in legalization a unique id and uses these ids in the legalization tables. This avoids any such aliasing issue, avoiding the full table search and allowing more aggressive incremental table pruning. In some cases this is a 1000x speedup to compilation. Reviewers: jyknight, echristo, bogner, tra Reviewed By: bogner Subscribers: dberris, grandinj, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D47959 llvm-svn: 334729
* [X86] Add more vector instructions to the memory folding table using the ↵Craig Topper2018-06-141-1/+215
| | | | | | | | autogenerated table as a guide. The test cahnge is because we now fold stack reload into RNDSCALE and RNDSCALE can be turned into ROUND by EVEX->VEX. llvm-svn: 334728
* [X86] Remove '128' from the internal name of some scalar FP instructions to ↵Craig Topper2018-06-141-8/+8
| | | | | | be consistent with other scalar instructions. llvm-svn: 334727
* [X86] Disable load unfolding for a bunch of instruction where unfolding ↵Craig Topper2018-06-141-16/+16
| | | | | | | | would increase the size of the load. Found by an audit of the manual table vs the autogenerated table. llvm-svn: 334726
* [X86] Remove NotMemoryFoldable from some AVX/AVX512 scalar instructions.Craig Topper2018-06-142-15/+14
| | | | | | Some of these instructions are already in the manual folding table so we should have them in the auto table too. llvm-svn: 334725
* [ORC] Filter out self-dependencies in VSO::addDependencies.Lang Hames2018-06-141-1/+1
| | | | llvm-svn: 334724
* [ORC] Assert that the query argument to VSO::lookup must be non-null.Lang Hames2018-06-141-0/+2
| | | | llvm-svn: 334723
* [ORC] Add a WaitUntilReady argument to blockingLookup.Lang Hames2018-06-142-24/+44
| | | | | | | | | | | If WaitUntilReady is set to true then blockingLookup will return once all requested symbols are ready. If WaitUntilReady is set to false then blockingLookup will return as soon as all requested symbols have been resolved. In the latter case, if any error occurs in finalizing the symbols it will be reported to the ExecutionSession, rather than returned by blockingLookup. llvm-svn: 334722
* [ORC] Strip the Materializing flag off finalized symbols in VSOs.Lang Hames2018-06-141-3/+6
| | | | | | Finalized symbols are no longer in the materializing state. llvm-svn: 334721
* [EarlyCSE] Fix MSVC build. NFCI.Simon Pilgrim2018-06-141-9/+5
| | | | | | MSVC doesn't let you assign different lambdas through a ternary operator. llvm-svn: 334715
* [MC] Move MCAssembler::dump into the correct cpp file. NFCSam Clegg2018-06-142-22/+24
| | | | | | Differential Revision: https://reviews.llvm.org/D46556 llvm-svn: 334713
* [DWARFv5] Tolerate files not all having an MD5 checksum.Paul Robinson2018-06-143-15/+27
| | | | | | | | | | | | | | | | | | In some cases, for example when compiling a preprocessed file, the front-end is not able to provide an MD5 checksum for all files. When that happens, omit the MD5 checksums from the final DWARF, because DWARF doesn't have a way to indicate that some but not all files have a checksum. When assembling a .s file, and some but not all .file directives provide an MD5 checksum, issue a warning and don't emit MD5 into the DWARF. Fixes PR37623. Differential Revision: https://reviews.llvm.org/D48135 llvm-svn: 334710
* [mips] Correct predicates for MSA pseudo instructionsSimon Dardis2018-06-141-1/+2
| | | | llvm-svn: 334708
* [EarlyCSE] Propagate conditions of AND and OR instructionsMax Kazantsev2018-06-141-14/+43
| | | | | | | | | | | This patches teaches EarlyCSE to figure out that if `and i1 %x, %y` is true then both `%x` and `%y` are true in the taken branch, and if `or i1 %x, %y` is false then both `%x` and `%y` are false in non-taken branch. Fix for PR37635. Differential Revision: https://reviews.llvm.org/D47574 Reviewed By: reames llvm-svn: 334707
* [DebugInfo] Check size of variable in ConvertDebugDeclareToDebugValueBjorn Pettersson2018-06-142-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Do not convert a DbgDeclare to DbgValue if the store instruction only refer to a fragment of the variable described by the DbgDeclare. Problem was seen when for example having an alloca for an array or struct, and there were stores to individual elements. In the past we inserted a DbgValue intrinsics for each store, just as if the store wrote the whole variable. When handling store instructions we insert a DbgValue that indicates that the variable is "undefined", as we do not know which part of the variable that is updated by the store. When ConvertDebugDeclareToDebugValue is used with a load/phi instruction we assert that the referenced value is large enough to cover the whole variable. Afaict this should be true for all scenarios where those methods are used on trunk. If the assert blows in the future I guess we could simply skip to insert a dbg.value instruction. In the future I think we should examine which part of the variable that is accessed, and add a DbgValue instrinsic with an appropriate DW_OP_LLVM_fragment expression. Reviewers: dblaikie, aprantl, rnk Reviewed By: aprantl Subscribers: JDevlieghere, llvm-commits Tags: #debug-info Differential Revision: https://reviews.llvm.org/D48024 llvm-svn: 334704
* [SLPVectorizer] Remove RawInstructionsData/getMainOpcode and merge into ↵Simon Pilgrim2018-06-141-49/+20
| | | | | | | | | | | | getSameOpcode This is part of the work to cleanup use of 'alternate' ops so we can use the more general SK_Select shuffle type. Only getSameOpcode calls getMainOpcode and much of the logic is repeated in both functions. This will require some reworking of D28907 but that patch has hit trouble and is unlikely to be completed anytime soon. Differential Revision: https://reviews.llvm.org/D48120 llvm-svn: 334701
* [CostModel] Cleanup isSingleSourceVectorMask to match other shuffle ↵Simon Pilgrim2018-06-141-10/+12
| | | | | | matchers. NFCI. llvm-svn: 334699
* [CostModel] Recognise REVERSE shuffle mask if the elements come from the ↵Simon Pilgrim2018-06-141-4/+11
| | | | | | second src llvm-svn: 334698
* [NFC] fix trivial typos in commentsHiroshi Inoue2018-06-1414-31/+31
| | | | llvm-svn: 334687
* [x86] fix mappings of cvttp2si/cvttp2ui x86 intrinsics to x86-specific nodes ↵Craig Topper2018-06-144-43/+178
| | | | | | | | | | | | | | | | | | | | | and isel patterns (PR37551) Summary: The tests in: https://bugs.llvm.org/show_bug.cgi?id=37751 ...show miscompiles because we wrongly mapped and folded x86-specific intrinsics into generic DAG nodes. This patch corrects the mappings in X86IntrinsicsInfo.h and adds isel matching corresponding to the new patterns. The complete tests for the failure cases should be in avx-cvttp2si.ll and sse-cvttp2si.ll and avx512-cvttp2i.ll Reviewers: RKSimon, gbedwell, spatel Reviewed By: spatel Subscribers: mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D47993 llvm-svn: 334685
* AMDGPU/GlobalISel: Implement select() for 32-bit G_FADD and G_FMULTom Stellard2018-06-133-0/+16
| | | | | | | | | | | | Reviewers: arsenm, nhaehnle Reviewed By: arsenm Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D46171 llvm-svn: 334665
* Revert "Enable ThreadPool to queue tasks that return values."Zachary Turner2018-06-131-2/+19
| | | | | | | | This is failing to compile when LLVM_ENABLE_THREADS is false, and the fix is not immediately obvious, so reverting while I look into it. llvm-svn: 334658
* Reland: [Timers] Use the pass argument name for JSON keys in time-passesFrancis Visoiu Mistrih2018-06-131-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using clang --save-stats -mllvm -time-passes, both timers and stats end up in the same json file. We could end up with things like: { "asm-printer.EmittedInsts": 1, "time.pass.Virtual Register Map.wall": 2.9015541076660156e-04, "time.pass.Virtual Register Map.user": 2.0500000000000379e-04, "time.pass.Virtual Register Map.sys": 8.5000000000001741e-05, } This patch makes use of the pass argument name (if available) in the JSON key to end up with things like: { "asm-printer.EmittedInsts": 1, "time.pass.virtregmap.wall": 2.9015541076660156e-04, "time.pass.virtregmap.user": 2.0500000000000379e-04, "time.pass.virtregmap.sys": 8.5000000000001741e-05, } This also helps avoiding to write another JSON printer to handle all the cases that we could have in our pass names. Fixed test instead of adding a new one originally from r334649. Differential Revision: https://reviews.llvm.org/D48109 llvm-svn: 334657
* [WinASan] Don't instrument globals in sections containing '$'Reid Kleckner2018-06-131-5/+9
| | | | | | | | | | | | | Such globals are very likely to be part of a sorted section array, such the .CRT sections used for dynamic initialization. The uses its own sorted sections called ATL$__a, ATL$__m, and ATL$__z. Instead of special casing them, just look for the dollar sign, which is what invokes linker section sorting for COFF. Avoids issues with ASan and the ATL uncovered after we started instrumenting comdat globals on COFF. llvm-svn: 334653
* Revert r334649 "[Timers] Use the pass argument name for JSON keys in ↵Francis Visoiu Mistrih2018-06-131-5/+1
| | | | | | | | | | time-passes" This reverts commit r334649. This breaks a test. llvm-svn: 334651
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