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* MIR Parser: Extract the parsing of the operand's offset into a new method. NFC.Alex Lorenz2015-08-071-2/+10
| | | | | | | | This commit extract the code that parses the 64-bit offset from the method 'parseOperandsOffset' to a new method 'parseOffset' so that we can reuse it when parsing the offset for the machine memory operands. llvm-svn: 244355
* AMDGPU: Assume SMRD access for constant address spaceMatt Arsenault2015-08-072-40/+76
| | | | | | | Since r243294 these are selected to SMRD and moved later if required. llvm-svn: 244354
* Add Intel family 6 model 90 as Silvermont. Fixes PR24392.Craig Topper2015-08-071-0/+1
| | | | llvm-svn: 244352
* [LAA] Remove unused pointer partition argument from print(), NFCAdam Nemet2015-08-071-4/+2
| | | | | | | This is now handled in the client. No need for LAA to provide this variant. llvm-svn: 244349
* [ConstantFoldTerminator] Preserve make.implicit metadata when converting ↵Chen Li2015-08-071-0/+5
| | | | | | | | | | | | | | SwitchInst to BranchInst Summary: llvm::ConstantFoldTerminator function can convert SwitchInst with single case (and default) to a conditional BranchInst. This patch adds support to preserve make.implicit metadata on this conversion. Reviewers: sanjoy, weimingz, chenli Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D11841 llvm-svn: 244348
* [InstCombine] Fix SSE2/AVX2 vector logical shift by constantSimon Pilgrim2015-08-071-16/+39
| | | | | | | | | | | | | | | | This patch fixes the sse2/avx2 vector shift by constant instcombine call to correctly deal with the fact that the shift amount is formed from the entire lower 64-bit and not just the lowest element as it currently assumes. e.g. %1 = tail call <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32> %v, <4 x i32> <i32 15, i32 15, i32 15, i32 15>) In this case, (V)PSRLD doesn't perform a lshr by 15 but in fact attempts to shift by 64424509455 ((15 << 32) | 15) - giving a zero result. In addition, this review also recognizes shift-by-zero from a ConstantAggregateZero type (PR23821). Differential Revision: http://reviews.llvm.org/D11760 llvm-svn: 244341
* Add functions to save and restore the PrettyStackTrace state.Nico Weber2015-08-071-0/+14
| | | | | | | | | | | | | | | | PrettyStackTraceHead is a LLVM_THREAD_LOCAL, which means it's just a global in LLVM_ENABLE_THREADS=NO builds. If a CrashRecoveryContext is used with code that uses PrettyStackEntries, and a crash happens, PrettyStackTraceHead is currently not reset to its pre-crash value. These functions make it possible to add a cleanup to such code that does this. (Not reseting the value then causes the assert in ~PrettyStackTraceEntry() to fire if the code outside of the CrashRecoveryContext also uses PrettyStackEntries -- for example, clang when building a module.) Part of PR11974. llvm-svn: 244338
* Add a comment.Nico Weber2015-08-071-0/+4
| | | | llvm-svn: 244337
* [ARM] Remove an unused reference to MachineRegisterInfo. NFC.Chad Rosier2015-08-071-2/+1
| | | | llvm-svn: 244334
* AMDGPU/SI: Use correct encoding of vopc for VI in the assemblerTom Stellard2015-08-071-0/+2
| | | | | | | | | | | | Summary: We were using the SI encoding for VI. Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11812 llvm-svn: 244332
* AMDGPU/SI: v_mac_legacy_f32 does not exist on VITom Stellard2015-08-071-6/+6
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11810 llvm-svn: 244322
* AMDGPU/SI: Remove unused outs parameter from VOPC TableGen classesTom Stellard2015-08-071-5/+5
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11809 llvm-svn: 244321
* Add dynamic_table iterators back to ELF.h.Rafael Espindola2015-08-071-0/+2
| | | | | | | | | In tree they are only used by llvm-readobj, but it is also used by https://github.com/mono/CppSharp. While at it, add some missing error checking. llvm-svn: 244320
* [MC/Dwarf] Allow to specify custom parameters for linetable emission.Frederic Riss2015-08-074-53/+56
| | | | | | | | | NFC patch for current users, but llvm-dsymutil will use the new functionality to adapt to the input linetable. Based on a patch by Adrian Prantl. llvm-svn: 244318
* Fix unused variable warning introduced in r244314Silviu Baranga2015-08-071-2/+4
| | | | llvm-svn: 244315
* [ARM] Update ReconstructShuffle to handle mismatched typesSilviu Baranga2015-08-071-92/+154
| | | | | | | | | | | | | | | | | | Summary: Port the ReconstructShuffle function from AArch64 to ARM to handle mismatched incoming types in the BUILD_VECTOR node. This fixes an outstanding FIXME in the ReconstructShuffle code. Reviewers: t.p.northover, rengolin Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D11720 llvm-svn: 244314
* Revert "Make global aliases have symbol size equal to their type"John Brawn2015-08-071-10/+0
| | | | | | | This reverts r242520, as it caused pr24379. Also removes part of the test added by r243874 that checks the size of alias symbols. llvm-svn: 244313
* ShrinkWrap.cpp: Tweak r244235 for a non-functional member, PredicateFtor. ↵NAKAMURA Takumi2015-08-071-2/+2
| | | | | | [-Wdocumentation] llvm-svn: 244309
* WebAssembly: textual emission uses expected opcode namesJF Bastien2015-08-071-12/+13
| | | | | | | | | | | | Summary: WebAssembly's tablegen instructions have the names WebAssembly expects, but by LLVM convention they're uppercase and suffixed with their type after an underscore. Leave the C++ code that way, but print outt he names WebAssembly expects (lowercase, no type). We could teach tablegen to do this later, maybe by using `!cast<string>(node)` in the .td files. Reviewers: sunfish Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D11776 llvm-svn: 244305
* ValueMapper: Resolve uniquing cycles more aggressivelyDuncan P. N. Exon Smith2015-08-071-9/+14
| | | | | | | | | | | | As a follow-up to r244181, resolve uniquing cycles underneath distinct nodes on the fly. This prevents uniquing cycles in early operands from affecting later operands. It also removes an iteration through distinct nodes' operands. No real functional change here, just more prompt resolution of temporary nodes. llvm-svn: 244302
* ValueMapper: Pull out helper to resolve cycles, NFCDuncan P. N. Exon Smith2015-08-071-8/+10
| | | | | | | Pull out a helper for resolving uniquing cycles of `Metadata` to remove the boiler-plate of downcasting to `MDNode`. llvm-svn: 244301
* MIR Serialization: Fix serialization of unnamed IR block references.Alex Lorenz2015-08-062-11/+33
| | | | | | | | The block address machine operands can reference IR blocks in other functions. This commit fixes a bug where the references to unnamed IR blocks in other functions weren't serialized correctly. llvm-svn: 244299
* MIR Parser: Simplify the token's string value handling.Alex Lorenz2015-08-063-56/+67
| | | | | | | | | | | | | | | | | This commit removes the 'StringOffset' and 'HasStringValue' fields from the MIToken struct and simplifies the 'stringValue' method which now returns the new 'StringValue' field. This commit also adopts a different way of initializing the lexed tokens - instead of constructing a new MIToken instance, the lexer resets the old token using the new 'reset' method and sets its attributes using the new 'setStringValue', 'setOwnedStringValue', and 'setIntegerValue' methods. Reviewers: Sean Silva Differential Revision: http://reviews.llvm.org/D11792 llvm-svn: 244295
* [AArch64][FastISel] Always use AND before checking the branch flag.Juergen Ributzka2015-08-061-1/+5
| | | | | | | | | | | | | When we are not emitting the condition for the branch, because the condition is in another BB or SDAG did the selection for us, then we have to mask the flag in the register with AND. This is required when the condition comes from a truncate, because SDAG only truncates down to a legal size of i32. This fixes rdar://problem/22161062. llvm-svn: 244291
* Revert "[AArch64][FastISel] Add more truncation tests." and ↵Juergen Ributzka2015-08-061-24/+31
| | | | | | | | | | | "[AArch64][FastISel] Always use an AND instruction when truncating to non-legal types." This reverts commit r243198 and 243304. Turns out this wasn't the correct fix for this problem. It works only within FastISel, but fails when the truncate is selected by SDAG. llvm-svn: 244287
* Revert accidentally committed WinEHPrepare changesDavid Majnemer2015-08-062-374/+9
| | | | | | This reverts commit r244272, r244273, r244274, and r244275. llvm-svn: 244278
* [IR] Remove TerminateInst's "NameStr" argumentDavid Majnemer2015-08-061-11/+7
| | | | | | | TerminateInst can't have a name because it doesn't produce a result. No functionality change is intended, this is just a cleanup. llvm-svn: 244276
* PHIs don't need to be postprocessedDavid Majnemer2015-08-061-31/+6
| | | | llvm-svn: 244275
* Handle PHI nodes prefacing EH pads tooDavid Majnemer2015-08-062-14/+88
| | | | llvm-svn: 244274
* handle phi nodesDavid Majnemer2015-08-061-4/+27
| | | | llvm-svn: 244273
* [WinEHPrepare] Add rudimentary support for the new EH instructionsDavid Majnemer2015-08-061-8/+301
| | | | | | | | | | | | | | | | | | | | | | | Summary: This adds somewhat basic preparation functionality including: - Formation of funclets via coloring basic blocks. - Cloning of polychromatic blocks to ensure that funclets have unique program counters. - Demotion of values used between different funclets. - Some amount of cleanup once we have removed predecessors from basic blocks. - Verification that we are left with a CFG that makes some amount of sense. N.B. Arguments and numbering still need to be done. Reviewers: rnk, JosephTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11750 llvm-svn: 244272
* Thread premissions through sys::fs::create_director{y|ies}Frederic Riss2015-08-063-7/+10
| | | | llvm-svn: 244268
* [IndVars] Fix PR24356.Sanjoy Das2015-08-061-36/+30
| | | | | | | Unsigned predicates increase or decrease agnostic of the signs of their increments. llvm-svn: 244265
* [IndVars] Improved logging under DEBUG(); NFC.Sanjoy Das2015-08-061-6/+3
| | | | | | | Before this, we'd print the modified comparision in the "Simplified comparison" case. That looked misleading. llvm-svn: 244264
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-08-0612-31/+22
| | | | | | | | After r244074, we now have a successors() method to iterate over all the successors of a TerminatorInst. This commit changes a bunch of eligible loops to use it. llvm-svn: 244260
* AMDGPU/SI: Add Fiji supportTom Stellard2015-08-061-0/+4
| | | | | | Patch by: Alex Deucher llvm-svn: 244255
* AMDGPU/SI: Add support for 32-bit immediate SMRD offsets on CITom Stellard2015-08-065-20/+115
| | | | | | | | | | Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11604 llvm-svn: 244254
* AMDGPU/SI: Use ComplexPatterns for SMRD addressing modesTom Stellard2015-08-064-54/+127
| | | | | | | | | | | | Summary: This allows us to consolidate several of the TableGen patterns. Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11602 llvm-svn: 244253
* Fix nested CrashRecoveryContexts with LLVM_ENABLE_THREADS=OFF, allow them.Nico Weber2015-08-061-6/+14
| | | | | | | | | | | | | | | | | | libclang uses a CrashRecoveryContext, and building a module does too. If a module gets built through libclang, nested CrashRecoveryContexts are used. They work fine with threads as things are stored in ThreadLocal variables, but in LLVM_ENABLE_THREADS=OFF builds the two recovery contexts would write to the same globals. To fix, keep active CrashRecoveryContextImpls in a list and have the global point to the innermost one, and do something similar for tlIsRecoveringFromCrash. Necessary (but not sufficient) for PR11974 and PR20325 http://reviews.llvm.org/D11770 llvm-svn: 244251
* [libFuzzer] move the mutators to public interface so that custom mutators ↵Kostya Serebryany2015-08-064-38/+33
| | | | | | may reuse these functions directly llvm-svn: 244250
* Rename inst_range() to instructions() for consistency. NFCNico Rieck2015-08-0612-18/+18
| | | | llvm-svn: 244248
* Fix possible infinite loop in shrink wrapping when searching for save/restoreKit Barton2015-08-061-6/+24
| | | | | | | | | | | | | | | | | | | | points. There is an infinite loop that can occur in Shrink Wrapping while searching for the Save/Restore points. Part of this search checks whether the save/restore points are located in different loop nests and if so, uses the (post) dominator trees to find the immediate (post) dominator blocks. However, if the current block does not have any immediate (post) dominators then this search will result in an infinite loop. This can occur in code containing an infinite loop. The modification checks whether the immediate (post) dominator is different from the current save/restore block. If it is not, then the search terminates and the current location is not considered as a valid save/restore point for shrink wrapping. Phabricator: http://reviews.llvm.org/D11607 llvm-svn: 244247
* LibDriver: Replace references to lld-link2 with lld-link.Peter Collingbourne2015-08-061-1/+1
| | | | llvm-svn: 244246
* [Reassociation] Fix miscompile for va_arg arguments.Quentin Colombet2015-08-062-22/+6
| | | | | | | | | | | | | | | | iisUnmovableInstruction() had a list of instructions hardcoded which are considered unmovable. The list lacked (at least) an entry for the va_arg and cmpxchg instructions. Fix this by introducing a new Instruction::mayBeMemoryDependent() instead of maintaining another instruction list. Patch by Matthias Braun <matze@braunis.de>. Differential Revision: http://reviews.llvm.org/D11577 rdar://problem/22118647 llvm-svn: 244244
* MIR Parser: Report an error when parsing duplicate memory operand flags.Alex Lorenz2015-08-061-1/+5
| | | | llvm-svn: 244240
* Revert r244154 which causes some build failure. See ↵Cong Hou2015-08-064-61/+40
| | | | | | https://llvm.org/bugs/show_bug.cgi?id=24377. llvm-svn: 244239
* This patch changes the interface to enable the shrink wrapping optimization. Kit Barton2015-08-062-22/+50
| | | | | | | | | | | | | | | It adds a new constructor, which takes a std::function predicate function that is run at the beginning of shrink wrapping to determine whether the optimization should run on the given machine function. The std::function can be overridden by each target, allowing target-specific decisions to be made on each machine function. This is necessary for PowerPC, as the decision to run shrink wrapping is partially based on the ABI. Futhermore, this operates nicely with the GCC iFunc capability, which allows option overrides on a per-function basis. Phabricator: http://reviews.llvm.org/D11421 llvm-svn: 244235
* [AArch64] Use a static function and other minor cleanup for readability. NFC.Chad Rosier2015-08-061-11/+12
| | | | llvm-svn: 244233
* MIR Serialization: Serialize the 'invariant' machine memory operand flag.Alex Lorenz2015-08-064-3/+11
| | | | llvm-svn: 244230
* Fix an alignment error in `llvm::expandAtomicRMWToCmpXchg` without breaking ↵Richard Diamond2015-08-061-1/+1
| | | | | | | | | | | | | | the build where X86 isn't enabled. Summary: Divide the primitive size in bits by eight so the initial load's alignment is in bytes as expected. Tested with the included unit test. Reviewers: rengolin, jfb Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11804 llvm-svn: 244229
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