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* MemorySSA: Remove MemorySSA walker caching.Daniel Berlin2017-04-051-217/+14
| | | | | | | | | | | | | | | | | | | | | | Summary: Remove all the caching the clobber walker does, and that the caching walker does. With the patch to enable storing clobbering access results for stores, i can find no improvement with the cache turned on (and a number of degradations, both time and memory, from the cost of caching. For a large program i have, we do millions of lookups and inserts with zero hits). I haven't tried to rename or simplify the walker otherwise yet. (Appreciate some perf testing on this past my own testing) Reviewers: george.burgess.iv, davide Subscribers: Prazek, llvm-commits Differential Revision: https://reviews.llvm.org/D31576 llvm-svn: 299578
* [InstCombine] add fold for icmp with or mask of low bits (PR32542)Sanjay Patel2017-04-051-0/+9
| | | | | | | | | | | | | | | | | | | | We already have these 'and' folds: // X & -C == -C -> X > u ~C // X & -C != -C -> X <= u ~C // iff C is a power of 2 ...but we were missing the 'or' siblings. http://rise4fun.com/Alive/n6 This should improve: https://bugs.llvm.org/show_bug.cgi?id=32524 ...but there are 2 or more other pieces to fix still. Differential Revision: https://reviews.llvm.org/D31712 llvm-svn: 299570
* [InstCombine] fix formatting and variable names; NFCISanjay Patel2017-04-051-236/+252
| | | | | | | There must be some opportunity to refactor big chunks of nearly duplicated code in FoldOrOfICmps / FoldAndOfICmps. Also, none of this works with vectors, but it should. llvm-svn: 299568
* MemorySSA: Fix and use optimized_def_chainDaniel Berlin2017-04-051-1/+1
| | | | llvm-svn: 299566
* [ObjCArc] Do not dereference an invalidated iterator.Akira Hatanaka2017-04-051-0/+1
| | | | | | | | | | | | | Fix a bug in ARC contract pass where an iterator that pointed to a deleted instruction was dereferenced. It appears that tryToContractReleaseIntoStoreStrong was incorrectly assuming that a call to objc_retain would not immediately follow a call to objc_release. rdar://problem/25276306 llvm-svn: 299507
* ThinLTOBitcodeWriter: handle aliases first in filterModuleBob Haarman2017-04-051-20/+20
| | | | | | | | | | | | | | Summary: This change fixes a "local linkage requires default visibility" assert when attempting to build LLVM with ThinLTO on Windows. Reviewers: pcc, tejohnson, mehdi_amini Reviewed By: pcc Subscribers: llvm-commits, Prazek Differential Revision: https://reviews.llvm.org/D31632 llvm-svn: 299491
* Re-apply MemorySSA: Add support for caching clobbering access inDaniel Berlin2017-04-042-9/+9
| | | | | | | | | | | | | | | | | | | | stores with some fixes. Summary: This enables us to cache the clobbering access for stores, despite the fact that we can't rewrite the use-def chains themselves. Early testing shows that, after this change, for larger testcases, it will be a significant net positive (memory and time) to remove the walker caching. Reviewers: george.burgess.iv, davide Subscribers: Prazek, llvm-commits Differential Revision: https://reviews.llvm.org/D31567 llvm-svn: 299486
* Revert "MemorySSA: Add support for caching clobbering access in stores"Daniel Berlin2017-04-042-9/+9
| | | | | | This reverts revision r299322. llvm-svn: 299485
* [InstCombine] rename variable for easier reading; NFCSanjay Patel2017-04-041-7/+8
| | | | | | We usually give constants a 'C' somewhere in the name... llvm-svn: 299474
* [InstCombine] Turn subtract of vectors of i1 into xor like we do for scalar ↵Craig Topper2017-04-041-1/+1
| | | | | | i1. Matches what we already do for add. llvm-svn: 299472
* [InstCombine] Support folding and/or/xor with a constant vector RHS into ↵Craig Topper2017-04-041-3/+6
| | | | | | | | | | selects and phis Currently we only fold with ConstantInt RHS. This generalizes to any Constant RHS. Differential Revision: https://reviews.llvm.org/D31610 llvm-svn: 299466
* [PGO] Memory intrinsic calls optimization based on profiled sizeRong Xu2017-04-045-55/+389
| | | | | | | | | | | | | | | | | | | | | | | | This patch optimizes two memory intrinsic operations: memset and memcpy based on the profiled size of the operation. The high level transformation is like: mem_op(..., size) ==> switch (size) { case s1: mem_op(..., s1); goto merge_bb; case s2: mem_op(..., s2); goto merge_bb; ... default: mem_op(..., size); goto merge_bb; } merge_bb: Differential Revision: http://reviews.llvm.org/D28966 llvm-svn: 299446
* [InstCombine] Use setAllBits in place of getAllOnesValue since we know the ↵Craig Topper2017-04-041-1/+1
| | | | | | bitwidths are the same. NFCI llvm-svn: 299413
* InstCombine: Use the InstSimplify hook for shufflevectorZvi Rackover2017-04-041-5/+4
| | | | | | | | | | | | | | Summary: Start using the recently added InstSimplify hook for shuffles in the respective InstCombine visitor. Reviewers: spatel, RKSimon, craig.topper, majnemer Reviewed By: majnemer Subscribers: majnemer, llvm-commits Differential Revision: https://reviews.llvm.org/D31526 llvm-svn: 299412
* [InstCombine] Remove canonicalization for (X & C1) | C2 --> (X | C2) & ↵Craig Topper2017-04-031-11/+0
| | | | | | | | | | (C1|C2) when C1 & C2 have common bits. It turns out that SimplifyDemandedInstructionBits will get called earlier and remove bits from C1 first. Effectively doing (X & (C1&C2)) | C2. So by the time it got to this check there could be no common bits. I think the DAGCombiner has the same check but its check can be executed because it handles demanded bits later. I'll look at it next. llvm-svn: 299384
* [DAGCombine][InstCombine] Fix inverted if condition in equivalent comments ↵Craig Topper2017-04-031-1/+1
| | | | | | in DAGCombine and InstCombine. NFC llvm-svn: 299378
* Revert r299337 "[InstCombine] Remove redundant combine from visitAnd"Craig Topper2017-04-032-0/+89
| | | | | | | | One of the tsan bots started failing at this commit. I don't see anything obviously wrong with the commit so trying this to see if it recovers. Failing log: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/6792 llvm-svn: 299366
* [InstCombine] fix formatting for foldLogOpOfMaskedICmps and related bits; NFCISanjay Patel2017-04-031-145/+158
| | | | | | | | | | | | 1. Improve enum, function, and variable names. 2. Improve comments. 3. Fix variable capitalization. 4. Run clang-format. As an existing code comment suggests, this should work with vector types / splat constants too, so making this look right first will reduce the diffs needed for that change. llvm-svn: 299365
* [APInt] Move isMask and isShiftedMask out of APIntOps and into the APInt ↵Craig Topper2017-04-031-1/+1
| | | | | | | | | | class. Implement them without memory allocation for multiword This moves the isMask and isShiftedMask functions to be class methods. They now use the MathExtras.h function for single word size and leading/trailing zeros/ones or countPopulation for the multiword size. The previous implementation made multiple temorary memory allocations to do the bitwise arithmetic operations to match the MathExtras.h implementation. Differential Revision: https://reviews.llvm.org/D31565 llvm-svn: 299362
* [InstCombine] Make foldOpWithConstantIntoOperand take a BinaryOperator ↵Craig Topper2017-04-032-2/+2
| | | | | | | | instead of a generic Instruction. It blindly assumes there are two operands so make it explicit. llvm-svn: 299351
* [InstCombine] Remove a And transform that should be handled by ↵Craig Topper2017-04-031-7/+0
| | | | | | SimplifyDemandedInstructionBits. NFCI llvm-svn: 299349
* [InstCombine] Make InstCombiner::OptAndOp take a BinaryOperator instead of ↵Craig Topper2017-04-022-4/+4
| | | | | | | | | | an Instruction. The callers have already performed the necessary cast before calling. This allows us to remove a comment that says the instruction must be a BinaryOperator and make it explicit in the argument type. Had to add a default case to the switch because BinaryOperator::getOpcode() returns a BinaryOps enum. llvm-svn: 299339
* [InstCombine] Remove redundant combine from visitAndCraig Topper2017-04-022-89/+0
| | | | | | | | | | As far as I can tell this combine is fully handled by SimplifyDemandedInstructionBits. I was only looking at this because it is the only user of APIntOps::isShiftedMask which is itself broken. As demonstrated by r299187. I was going to fix isShiftedMask and needed to make sure we had coverage for the new cases it would expose to this combine. But looks like we can nuke it instead. Differential Revision: https://reviews.llvm.org/D31543 llvm-svn: 299337
* NewGVN: Handle coercion of constant stores, loads, memory insts.Daniel Berlin2017-04-021-1/+93
| | | | | | | | | | | | | | | | | Summary: Depends on D30928. This adds support for coercion of stores and memory instructions that do not require insertion to process. Another few tests down. I added the relevant tests from rle.ll Reviewers: davide Subscribers: llvm-commits, Prazek Differential Revision: https://reviews.llvm.org/D30929 llvm-svn: 299330
* [BypassSlowDivision] Do not bypass division of hash-like valuesNikolai Bozhenov2017-04-021-12/+81
| | | | | | | | | | | | | | | | | Disable bypassing if one of the operands looks like a hash value. Slow division often occurs in hashtable implementations and fast division is never taken there because a hash value is extremely unlikely to have enough upper bits set to zero. A value is considered to be hash-like if it is produced by 1) XOR operation 2) Multiplication by a constant wider than the shorter type 3) PHI node with all incoming values being hash-like Differential Revision: https://reviews.llvm.org/D28200 llvm-svn: 299329
* MemorySSA: Add support for caching clobbering access in storesDaniel Berlin2017-04-022-9/+9
| | | | | | | | | | | | | | | | Summary: This enables us to cache the clobbering access for stores, despite the fact that we can't rewrite the use-def chains themselves. Early testing shows that, after this change, for larger testcases, it will be a significant net positive (memory and time) to remove the walker caching. Reviewers: george.burgess.iv, davide Subscribers: Prazek, llvm-commits Differential Revision: https://reviews.llvm.org/D31567 llvm-svn: 299322
* NewGVN: Don't try to kill off the stored value of stores whenDaniel Berlin2017-04-011-9/+22
| | | | | | | | | | | | | processing the congruence class of the store. Because we use the stored value of a store as the def, it isn't dead just because it appears as a def when it comes from a store. Note: I have not hit any cases with the memory code as it is where this breaks anything, just because of what memory congruences we actually allow. In a followup that improves memory congruence, this bug actually breaks real stuff (but the verifier catches it). llvm-svn: 299300
* NewGVN: Clean up GVNExpression memory hierarchy, restructure hash ↵Daniel Berlin2017-04-011-16/+8
| | | | | | computation a bit so we don't have to redefine it for loads, stores, and calls llvm-svn: 299299
* NewGVN: Use def_chain iterator in singleReachablePhiPath instead of recursionDaniel Berlin2017-04-011-20/+24
| | | | llvm-svn: 299298
* Move def_chain iterator to MemorySSA.h so it can be reusedDaniel Berlin2017-04-011-36/+0
| | | | llvm-svn: 299297
* MemorySSA: Push const correctness further.Daniel Berlin2017-04-011-8/+10
| | | | llvm-svn: 299295
* MemorySSA: Kill the WalkTargetCache now that we have getBlockDefs.Daniel Berlin2017-04-011-39/+6
| | | | llvm-svn: 299294
* [APInt] Fix bugs in isShiftedMask to match behavior of the similar function ↵Craig Topper2017-03-311-1/+1
| | | | | | | | | | in MathExtras.h This removes a parameter from the routine that was responsible for a lot of the issue. It was a bit count that had to be set to the BitWidth of the APInt and would get passed to getLowBitsSet. This guaranteed the call to getLowBitsSet would create an all ones value. This was then compared to (V | (V-1)). So the only shifted masks we detected had to have the MSB set. The one in tree user is a transform in InstCombine that never fires due to earlier transforms covering the case better. I've submitted a patch to remove it completely, but for now I've just adapted it to the new interface for isShiftedMask. llvm-svn: 299273
* [InstCombine] When adding an Instruction and its Users to the worklist at ↵Craig Topper2017-03-311-2/+2
| | | | | | | | the same time, make sure we put the Users in first. Then put in the instruction. This way we ensure we immediately revisit the instruction and do any additional optimizations before visiting the users. Otherwise we might visit the users, then the instruction, then users again, then instruction again. llvm-svn: 299267
* [APInt] Remove shift functions from APIntOps namespace. Replace the few ↵Craig Topper2017-03-311-5/+5
| | | | | | users with the APInt class methods. NFCI llvm-svn: 299248
* Do not translate rint into nearbyint, but truncate it like nearbyint.Joerg Sonnenberger2017-03-312-1/+3
| | | | | | | | | | | | | | A common way to implement nearbyint is by fiddling with the floating point environment and calling rint. This is used at least by the BSD libm and musl. As such, canonicalizing the latter to the former will create infinite loops for libm and generally pessimize performance, at least when the generic C versions are used. This change preserves the rint in the libcall translation and also handles the domain truncation logic, so that rint with float argument will be reduced to rintf etc. llvm-svn: 299247
* Fix the InstCombine to reserve the VP metadata and sets correct call count.Dehao Chen2017-03-311-0/+6
| | | | | | | | | | | | | | Summary: Currently the VP metadata was dropped when InstCombine converts a call to direct call. This patch converts the VP metadata to branch_weights so that its hotness is recorded. Reviewers: eraman, davidxl Reviewed By: davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31344 llvm-svn: 299228
* [Scalarizer] Handle scalar arguments in vector GEPMikael Holmen2017-03-311-3/+16
| | | | | | | | | | | | | | | | | | Summary: Triggered by commit r298620: "[LV] Vectorize GEPs". If we encounter a vector GEP with scalar arguments, we splat the scalar into a vector of appropriate size before we scatter the argument. Reviewers: arsenm, mehdi_amini, bkramer Reviewed By: arsenm Subscribers: bjope, mssimpso, wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D31416 llvm-svn: 299186
* ThinLTOBitcodeWriter: Use Module::global_values(). NFCI.Peter Collingbourne2017-03-301-25/+7
| | | | llvm-svn: 299132
* [InstCombine] Fix typo last->least. NFCCraig Topper2017-03-301-3/+3
| | | | llvm-svn: 299123
* AMDGPU: Add all atomicrmw fields to atomic.inc/decMatt Arsenault2017-03-301-2/+8
| | | | | | Add scope, order, isVolatile llvm-svn: 299122
* [SimplifyIndvar] Replace the sdiv used by IV if we can prove both of its ↵Hongbin Zheng2017-03-301-4/+38
| | | | | | | | | | operands are non-negative Since there is no sdiv in SCEV, an 'udiv' is a better canonical form than an 'sdiv' as the user of induction variable Differential Revision: https://reviews.llvm.org/D31488 llvm-svn: 299118
* Spelling mistakes in comments. NFCI.Simon Pilgrim2017-03-301-1/+1
| | | | | | Based on corrections mentioned in patch for clang for PR27635 llvm-svn: 299072
* [InstCombine] Correct the check for vector GEPsMatthew Simpson2017-03-291-5/+5
| | | | | | | | | | | | | | Some of the GEP combines (e.g., descaling) can't handle vector GEPs. We have an existing check that attempts to bail out if given a vector GEP. However, the check only tests the GEP's pointer operand. A GEP results in a vector of pointers if at least one of its operands is vector-typed (e.g., its pointer operand could be a scalar, but its index could be a vector). We should just check the type of the GEP itself. This should fix PR32414. Reference: https://bugs.llvm.org/show_bug.cgi?id=32414 Differential Revision: https://reviews.llvm.org/D31470 llvm-svn: 299017
* Cleanup in preparation for D30703. NFCIFilipe Cabecinhas2017-03-291-27/+22
| | | | | | Make the enumerators follow the coding convention and start with OW_... llvm-svn: 298996
* [InstCombine] For select rule, use positive check of constant int for select ↵Anna Thomas2017-03-281-1/+1
| | | | | | operand. NFCI llvm-svn: 298906
* Revert "[asan] Delay creation of asan ctor."Alex Shlyapnikov2017-03-272-26/+21
| | | | | | | | Speculative revert. Some libfuzzer tests are affected. This reverts commit r298731. llvm-svn: 298890
* Revert "[asan] Put ctor/dtor in comdat."Alex Shlyapnikov2017-03-271-41/+9
| | | | | | | | Speculative revert, some libfuzzer tests are affected. This reverts commit r298756. llvm-svn: 298889
* [LV] Transform truncations of non-primary induction variablesMatthew Simpson2017-03-271-11/+10
| | | | | | | | | | | | The vectorizer tries to replace truncations of induction variables with new induction variables having the smaller type. After r295063, this optimization was applied to all integer induction variables, including non-primary ones. When optimizing the truncation of a non-primary induction variable, we still need to transform the new induction so that it has the correct start value. This should fix PR32419. Reference: https://bugs.llvm.org/show_bug.cgi?id=32419 llvm-svn: 298882
* [InstCombine] Avoid incorrect folding of select into phi nodes when incoming ↵Anna Thomas2017-03-271-1/+5
| | | | | | | | | | | | | | | | | | | | | | element is a vector type Summary: We are incorrectly folding selects into phi nodes when the incoming value of a phi node is a constant vector. This optimization is done in `FoldOpIntoPhi` when the select condition is a phi node with constant incoming values. Without the fix, we are miscompiling (i.e. incorrectly folding the select into the phi node) when the vector contains non-zero elements. This patch fixes the miscompile and we will correctly fold based on the select vector operand (see added test cases). Reviewers: majnemer, sanjoy, spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31189 llvm-svn: 298845
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