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* [SCCP] Resolve indirect branch target when possible.Xin Tong2017-04-101-8/+71
| | | | | | | | | | | | | | Summary: Resolve indirect branch target when possible. This potentially eliminates more basicblocks and result in better evaluation for phi and other things. Reviewers: davide, efriedma, sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30322 llvm-svn: 299830
* [InstCombine] remove dead cases from icmp pair switches; NFCISanjay Patel2017-04-091-32/+0
| | | | | | | | | | | | "PredicatesFoldable" returns false for signed/unsigned mismatched pairs, so these cases should never exist. We'll default to 'unreachable' on those predicate combos instead. Most of what's left in these switches belongs in InstSimplify (and may already be there), so there's probably more that can be done to reduce this code. llvm-svn: 299829
* [Mem2Reg] Remove AliasSetTracker updating logic from the pass.Davide Italiano2017-04-093-40/+8
| | | | | | No caller has been passing it for a long time. llvm-svn: 299827
* [MemorySSA] Fix use of pointsToConstantMemory in ↵Hal Finkel2017-04-091-1/+2
| | | | | | | | | | isUseTriviallyOptimizableToLiveOnEntry In isUseTriviallyOptimizableToLiveOnEntry, pointsToConstantMemory needs to be called on the load's pointer operand, not on the result of the load (which might not even be a pointer). llvm-svn: 299823
* [InstCombine] Extend some OR combines to support vectors.Craig Topper2017-04-091-19/+23
| | | | | | | | This adds support for these combines for vectors (X^C)|Y -> (X|Y)^C iff Y&C == 0 Y|(X^C) -> (X|Y)^C iff Y&C == 0 llvm-svn: 299822
* [InstCombine] Extend a canonicalization check to apply to vector constants too.Craig Topper2017-04-091-1/+2
| | | | llvm-svn: 299821
* [InstCombine] Use the SubOne helper function to shorten some code. NFCCraig Topper2017-04-091-7/+4
| | | | llvm-svn: 299819
* [InstCombine] rename variable for easier reading; NFCCraig Topper2017-04-091-9/+9
| | | | | | We usually give constants a 'C' somewhere in the name... llvm-svn: 299818
* [coroutines] Make CoroSplit pass deterministicGor Nishanov2017-04-081-2/+0
| | | | | | | | | | | | | | | coro-split-after-phi.ll test was flaky due to non-determinism in the coroutine frame construction that was sorting the spill vector using a pointer to a def as a part of the key. The sorting was intended to make sure that spills for the same def are kept together, however, we populate the vector by processing defs in order, so the spill entires will end up together anyways. This change removes spill sorting and restores the determinism in the test. llvm-svn: 299809
* [cfi] Take over existing __cfi_check in CrossDSOCFI.Evgeniy Stepanov2017-04-071-0/+3
| | | | | | | https://reviews.llvm.org/D31796 will emit a dummy __cfi_check in the frontend. llvm-svn: 299805
* NewGVN: Make CongruenceClass a real class in preparation for splittingDaniel Berlin2017-04-071-207/+259
| | | | | | NewGVN into analysis and eliminator. llvm-svn: 299792
* [coroutines] Insert spills of PHI instructions correctlyGor Nishanov2017-04-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Fix a bug where we were inserting a spill in between the PHIs in the beginning of the block. Consider this fragment: ``` begin: %phi1 = phi i32 [ 0, %entry ], [ 2, %alt ] %phi2 = phi i32 [ 1, %entry ], [ 3, %alt ] %sp1 = call i8 @llvm.coro.suspend(token none, i1 false) switch i8 %sp1, label %suspend [i8 0, label %resume i8 1, label %cleanup] resume: call i32 @print(i32 %phi1) ``` Unless we are spilling the argument or result of the invoke, we were always inserting the spill immediately following the instruction. The fix adds a check that if the spilled instruction is a PHI Node, select an appropriate insert point with `getFirstInsertionPt()` that skips all the PHI Nodes and EH pads. Reviewers: majnemer, rnk Reviewed By: rnk Subscribers: qcolombet, EricWF, llvm-commits Differential Revision: https://reviews.llvm.org/D31799 llvm-svn: 299771
* Reapply r298620: [LV] Vectorize GEPsMatthew Simpson2017-04-071-79/+206
| | | | | | | | | | | | | This patch reapplies r298620. The original patch was reverted because of two issues. First, the patch exposed a bug in InstCombine that caused the Chromium builds to fail (PR32414). This issue was fixed in r299017. Second, the patch introduced a bug in the vectorizer's scalars analysis that caused test suite builds to fail on SystemZ. The scalars analysis was too aggressive and marked a memory instruction scalar, even though it was going to be vectorized. This issue has been fixed in the current patch and several new test cases for the scalars analysis have been added. llvm-svn: 299770
* [InstCombine] Handle more commuted cases of ((A & B) | ~A) -> (~A | B)Craig Topper2017-04-071-3/+4
| | | | llvm-svn: 299747
* AliasAnalysis: Be less conservative about volatile than atomic.Daniel Berlin2017-04-071-2/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: getModRefInfo is meant to answer the question "what impact does this instruction have on a given memory location" (not even another instruction). Long debate on this on IRC comes to the conclusion the answer should be "nothing special". That is, a noalias volatile store does not affect a memory location just by being volatile. Note: DSE and GVN and memdep currently believe this, because memdep just goes behind AA's back after it says "modref" right now. see line 635 of memdep. Prior to this patch we would get modref there, then check aliasing, and if it said noalias, we would continue. getModRefInfo *already* has this same AA check, it just wasn't being used because volatile was lumped in with ordering. (I am separately testing whether this code in memdep is now dead except for the invariant load case) Reviewers: jyknight, chandlerc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31726 llvm-svn: 299741
* [InstCombine] Add more commuted patterns to support folding ((~A & B) | A) ↵Craig Topper2017-04-071-3/+4
| | | | | | -> (A | B). llvm-svn: 299737
* [InstCombine] Remove testing assert I accidentally left in r299710.Craig Topper2017-04-061-3/+1
| | | | llvm-svn: 299715
* [InstCombine] When checking to see if we can turn subtracts of 2^n - 1 into ↵Craig Topper2017-04-061-5/+7
| | | | | | | | xor, we only need to call computeKnownBits on the RHS not the whole subtract. While there use isMask instead of isPowerOf2(C+1) Calling computeKnownBits on the RHS should allows us to recurse one step further. isMask is equivalent to the isPowerOf2(C+1) except in the case where C is all ones. But that was already handled earlier by creating a not which is an Xor with all ones. So this should be fine. llvm-svn: 299710
* [PGO] Preserve GlobalsAA in pgo-memop-opt pass.Rong Xu2017-04-061-1/+5
| | | | | | | Preserve GlobalsAA analysis in memory intrinsic calls optimization based on profiled size. llvm-svn: 299707
* [InstCombine] Remove redundant combine from visitAndCraig Topper2017-04-062-92/+0
| | | | | | | | This combine is fully handled by SimplifyDemandedInstructionBits as of r299658 where I fixed this code to ensure the Add/Sub had only a single user. Otherwise it would fire and create additional instructions. That fix resulted in an improvement to code generated for tsan which is why I committed it before deleting. Differential Revision: https://reviews.llvm.org/D31543 llvm-svn: 299704
* Revert "Turn some C-style vararg into variadic templates"Mehdi Amini2017-04-0610-166/+168
| | | | | | This reverts commit r299699, the examples needs to be updated. llvm-svn: 299702
* Turn some C-style vararg into variadic templatesMehdi Amini2017-04-0610-168/+166
| | | | | | | | | | | | | | | | Module::getOrInsertFunction is using C-style vararg instead of variadic templates. From a user prospective, it forces the use of an annoying nullptr to mark the end of the vararg, and there's not type checking on the arguments. The variadic template is an obvious solution to both issues. Patch by: Serge Guelton <serge.guelton@telecom-bretagne.eu> Differential Revision: https://reviews.llvm.org/D31070 llvm-svn: 299699
* [asan] Fix dead stripping of globals on Linux.Evgeniy Stepanov2017-04-063-39/+137
| | | | | | | | | | | | | | | | | | | | | | | Use a combination of !associated, comdat, @llvm.compiler.used and custom sections to allow dead stripping of globals and their asan metadata. Sometimes. Currently this works on LLD, which supports SHF_LINK_ORDER with sh_link pointing to the associated section. This also works on BFD, which seems to treat comdats as all-or-nothing with respect to linker GC. There is a weird quirk where the "first" global in each link is never GC-ed because of the section symbols. At this moment it does not work on Gold (as in the globals are never stripped). This is a re-land of r298158 rebased on D31358. This time, asan.module_ctor is put in a comdat as well to avoid quadratic behavior in Gold. llvm-svn: 299697
* [asan] Put ctor/dtor in comdat.Evgeniy Stepanov2017-04-061-9/+41
| | | | | | | | | | | | | | | | | | When possible, put ASan ctor/dtor in comdat. The only reason not to is global registration, which can be TU-specific. This is not the case when there are no instrumented globals. This is also limited to ELF targets, because MachO does not have comdat, and COFF linkers may GC comdat constructors. The benefit of this is a lot less __asan_init() calls: one per DSO instead of one per TU. It's also necessary for the upcoming gc-sections-for-globals change on Linux, where multiple references to section start symbols trigger quadratic behaviour in gold linker. This is a rebase of r298756. llvm-svn: 299696
* [asan] Delay creation of asan ctor.Evgeniy Stepanov2017-04-062-21/+26
| | | | | | | | | | | Create the constructor in the module pass. This in needed for the GC-friendly globals change, where the constructor can be put in a comdat in some cases, but we don't know about that in the function pass. This is a rebase of r298731 which was reverted due to a false alarm. llvm-svn: 299695
* [StripDeadDebugInfo] Drop dead CUs entirelyKeno Fischer2017-04-061-0/+25
| | | | | | | | | | | | | Summary: Prior to this while it would delete the dead DIGlobalVariables, it would leave dead DICompileUnits and everything referenced therefrom. For a bit bitcode file with thousands of compile units those dead nodes easily outnumbered the real ones. Clean that up. Reviewed By: aprantl Differential Revision: https://reviews.llvm.org/D31720 llvm-svn: 299692
* NewGVN: Rename some functions for consistencyDaniel Berlin2017-04-061-34/+35
| | | | llvm-svn: 299685
* NewGVN: Fixup some small issuesDaniel Berlin2017-04-061-21/+11
| | | | llvm-svn: 299684
* NewGVN: Fix a small formatting issue in performSymbolicLoadEvaluation.Daniel Berlin2017-04-061-3/+3
| | | | llvm-svn: 299683
* NewGVN: This patch makes memory congruence work for all types ofDaniel Berlin2017-04-061-202/+501
| | | | | | | | memorydefs, not just stores. Along the way, we audit and fixup issues about how we were tracking memory leaders, and improve the verifier to notice more memory congruency issues. llvm-svn: 299682
* [InstCombine] Fix a case where we weren't checking that an instruction had a ↵Craig Topper2017-04-061-6/+9
| | | | | | single use resulting in extra instructions being created. llvm-svn: 299658
* MemorySSA: Remove MemorySSA walker caching.Daniel Berlin2017-04-051-217/+14
| | | | | | | | | | | | | | | | | | | | | | Summary: Remove all the caching the clobber walker does, and that the caching walker does. With the patch to enable storing clobbering access results for stores, i can find no improvement with the cache turned on (and a number of degradations, both time and memory, from the cost of caching. For a large program i have, we do millions of lookups and inserts with zero hits). I haven't tried to rename or simplify the walker otherwise yet. (Appreciate some perf testing on this past my own testing) Reviewers: george.burgess.iv, davide Subscribers: Prazek, llvm-commits Differential Revision: https://reviews.llvm.org/D31576 llvm-svn: 299578
* [InstCombine] add fold for icmp with or mask of low bits (PR32542)Sanjay Patel2017-04-051-0/+9
| | | | | | | | | | | | | | | | | | | | We already have these 'and' folds: // X & -C == -C -> X > u ~C // X & -C != -C -> X <= u ~C // iff C is a power of 2 ...but we were missing the 'or' siblings. http://rise4fun.com/Alive/n6 This should improve: https://bugs.llvm.org/show_bug.cgi?id=32524 ...but there are 2 or more other pieces to fix still. Differential Revision: https://reviews.llvm.org/D31712 llvm-svn: 299570
* [InstCombine] fix formatting and variable names; NFCISanjay Patel2017-04-051-236/+252
| | | | | | | There must be some opportunity to refactor big chunks of nearly duplicated code in FoldOrOfICmps / FoldAndOfICmps. Also, none of this works with vectors, but it should. llvm-svn: 299568
* MemorySSA: Fix and use optimized_def_chainDaniel Berlin2017-04-051-1/+1
| | | | llvm-svn: 299566
* [ObjCArc] Do not dereference an invalidated iterator.Akira Hatanaka2017-04-051-0/+1
| | | | | | | | | | | | | Fix a bug in ARC contract pass where an iterator that pointed to a deleted instruction was dereferenced. It appears that tryToContractReleaseIntoStoreStrong was incorrectly assuming that a call to objc_retain would not immediately follow a call to objc_release. rdar://problem/25276306 llvm-svn: 299507
* ThinLTOBitcodeWriter: handle aliases first in filterModuleBob Haarman2017-04-051-20/+20
| | | | | | | | | | | | | | Summary: This change fixes a "local linkage requires default visibility" assert when attempting to build LLVM with ThinLTO on Windows. Reviewers: pcc, tejohnson, mehdi_amini Reviewed By: pcc Subscribers: llvm-commits, Prazek Differential Revision: https://reviews.llvm.org/D31632 llvm-svn: 299491
* Re-apply MemorySSA: Add support for caching clobbering access inDaniel Berlin2017-04-042-9/+9
| | | | | | | | | | | | | | | | | | | | stores with some fixes. Summary: This enables us to cache the clobbering access for stores, despite the fact that we can't rewrite the use-def chains themselves. Early testing shows that, after this change, for larger testcases, it will be a significant net positive (memory and time) to remove the walker caching. Reviewers: george.burgess.iv, davide Subscribers: Prazek, llvm-commits Differential Revision: https://reviews.llvm.org/D31567 llvm-svn: 299486
* Revert "MemorySSA: Add support for caching clobbering access in stores"Daniel Berlin2017-04-042-9/+9
| | | | | | This reverts revision r299322. llvm-svn: 299485
* [InstCombine] rename variable for easier reading; NFCSanjay Patel2017-04-041-7/+8
| | | | | | We usually give constants a 'C' somewhere in the name... llvm-svn: 299474
* [InstCombine] Turn subtract of vectors of i1 into xor like we do for scalar ↵Craig Topper2017-04-041-1/+1
| | | | | | i1. Matches what we already do for add. llvm-svn: 299472
* [InstCombine] Support folding and/or/xor with a constant vector RHS into ↵Craig Topper2017-04-041-3/+6
| | | | | | | | | | selects and phis Currently we only fold with ConstantInt RHS. This generalizes to any Constant RHS. Differential Revision: https://reviews.llvm.org/D31610 llvm-svn: 299466
* [PGO] Memory intrinsic calls optimization based on profiled sizeRong Xu2017-04-045-55/+389
| | | | | | | | | | | | | | | | | | | | | | | | This patch optimizes two memory intrinsic operations: memset and memcpy based on the profiled size of the operation. The high level transformation is like: mem_op(..., size) ==> switch (size) { case s1: mem_op(..., s1); goto merge_bb; case s2: mem_op(..., s2); goto merge_bb; ... default: mem_op(..., size); goto merge_bb; } merge_bb: Differential Revision: http://reviews.llvm.org/D28966 llvm-svn: 299446
* [InstCombine] Use setAllBits in place of getAllOnesValue since we know the ↵Craig Topper2017-04-041-1/+1
| | | | | | bitwidths are the same. NFCI llvm-svn: 299413
* InstCombine: Use the InstSimplify hook for shufflevectorZvi Rackover2017-04-041-5/+4
| | | | | | | | | | | | | | Summary: Start using the recently added InstSimplify hook for shuffles in the respective InstCombine visitor. Reviewers: spatel, RKSimon, craig.topper, majnemer Reviewed By: majnemer Subscribers: majnemer, llvm-commits Differential Revision: https://reviews.llvm.org/D31526 llvm-svn: 299412
* [InstCombine] Remove canonicalization for (X & C1) | C2 --> (X | C2) & ↵Craig Topper2017-04-031-11/+0
| | | | | | | | | | (C1|C2) when C1 & C2 have common bits. It turns out that SimplifyDemandedInstructionBits will get called earlier and remove bits from C1 first. Effectively doing (X & (C1&C2)) | C2. So by the time it got to this check there could be no common bits. I think the DAGCombiner has the same check but its check can be executed because it handles demanded bits later. I'll look at it next. llvm-svn: 299384
* [DAGCombine][InstCombine] Fix inverted if condition in equivalent comments ↵Craig Topper2017-04-031-1/+1
| | | | | | in DAGCombine and InstCombine. NFC llvm-svn: 299378
* Revert r299337 "[InstCombine] Remove redundant combine from visitAnd"Craig Topper2017-04-032-0/+89
| | | | | | | | One of the tsan bots started failing at this commit. I don't see anything obviously wrong with the commit so trying this to see if it recovers. Failing log: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/6792 llvm-svn: 299366
* [InstCombine] fix formatting for foldLogOpOfMaskedICmps and related bits; NFCISanjay Patel2017-04-031-145/+158
| | | | | | | | | | | | 1. Improve enum, function, and variable names. 2. Improve comments. 3. Fix variable capitalization. 4. Run clang-format. As an existing code comment suggests, this should work with vector types / splat constants too, so making this look right first will reduce the diffs needed for that change. llvm-svn: 299365
* [APInt] Move isMask and isShiftedMask out of APIntOps and into the APInt ↵Craig Topper2017-04-031-1/+1
| | | | | | | | | | class. Implement them without memory allocation for multiword This moves the isMask and isShiftedMask functions to be class methods. They now use the MathExtras.h function for single word size and leading/trailing zeros/ones or countPopulation for the multiword size. The previous implementation made multiple temorary memory allocations to do the bitwise arithmetic operations to match the MathExtras.h implementation. Differential Revision: https://reviews.llvm.org/D31565 llvm-svn: 299362
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