| Commit message (Collapse) | Author | Age | Files | Lines |
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This changes loop unrolling to use the same mechanism for trip count
computation as indvars. This is a stronger check that tends to unroll
more loops. A very common side-effect is that many single iteration
loops will be removed sooner. The real goal was simply to remove
dependence on canonical IVs.
x86 is break even.
ARM performance changes to expect (+ is good):
External/SPEC/CFP2000/183.equake/183.equake +13%
SingleSource/Benchmarks/Dhrystone/fldry +21%
MultiSource/Applications/spiff/spiff +3%
SingleSource/Benchmarks/Stanford/Puzzle -14%
The Puzzle regression is actually an improvement in loop optimization
that defeats GVN: rdar://problem/10065079.
llvm-svn: 139009
|
| |
|
|
|
|
| |
will be valid. This fixes PR10820.
llvm-svn: 139005
|
| |
|
|
|
|
| |
Duncan noticed this!
llvm-svn: 138967
|
| |
|
|
|
|
| |
anyone is actually using this, but might as well fix it since I found the issue.)
llvm-svn: 138965
|
| |
|
|
|
|
|
|
|
| |
The landingpad instruction is required in the landing pad block. Because we're
not deleting terminating instructions, the invoke may still jump to here (see
Transforms/SCCP/2004-11-16-DeadInvoke.ll). Remove all uses of the landingpad
instruction, but keep it around until code-gen can remove the basic block.
llvm-svn: 138890
|
| |
|
|
|
|
|
| |
ssa, so it has to be run really early in the pipeline. Any replacement
should probably use the SSAUpdater.
llvm-svn: 138841
|
| |
|
|
| |
llvm-svn: 138829
|
| |
|
|
|
|
| |
function, encountering an unrelated store should not cause us to give up like encountering a load does.
llvm-svn: 138809
|
| |
|
|
| |
llvm-svn: 138651
|
| |
|
|
|
|
| |
proper function to do it.
llvm-svn: 138550
|
| |
|
|
|
|
| |
getFirstNonPHI so that it will skip over the landingpad instructions as well.
llvm-svn: 138537
|
| |
|
|
| |
llvm-svn: 138481
|
| |
|
|
|
|
| |
insertion place.
llvm-svn: 138473
|
| |
|
|
| |
llvm-svn: 138243
|
| |
|
|
| |
llvm-svn: 138242
|
| |
|
|
| |
llvm-svn: 138102
|
| |
|
|
| |
llvm-svn: 138025
|
| |
|
|
|
|
|
|
| |
known-incremented level, because the two concepts can be used
to prove the saftey of a retain+release removal in different
ways.
llvm-svn: 138016
|
| |
|
|
| |
llvm-svn: 138008
|
| |
|
|
| |
llvm-svn: 137985
|
| |
|
|
|
|
| |
and b) doing a separate pass over dbg.value instructions.
llvm-svn: 137908
|
| |
|
|
| |
llvm-svn: 137888
|
| |
|
|
|
|
|
|
| |
PRE needs the landing pads to have their critical edges split. Doing this for a
landing pad is non-trivial. Abandon the attempt to perform PRE when we come
across a landing pad. (Reviewed by Owen!)
llvm-svn: 137876
|
| |
|
|
|
|
|
|
|
|
| |
here, be a bit more defensive
with unknown instructions.
Fixes PR10687.
llvm-svn: 137836
|
| |
|
|
|
|
|
|
|
| |
making random bad assumptions about instructions which are not explicitly listed.
Includes fix for rdar://9956541, a version of "undef ^ undef should return
0 because it's easier than arguing with users".
llvm-svn: 137777
|
| |
|
|
|
|
| |
this with a normal pass pipeline, but fixing for completeness.)
llvm-svn: 137755
|
| |
|
|
|
|
| |
check for a LandingPadInst.
llvm-svn: 137745
|
| |
|
|
|
|
| |
if necessary.
llvm-svn: 137679
|
| |
|
|
| |
llvm-svn: 137648
|
| |
|
|
| |
llvm-svn: 137626
|
| |
|
|
|
|
|
|
|
|
|
|
| |
This implements the 'landingpad' instruction. It's used to indicate that a basic
block is a landing pad. There are several restrictions on its use (see
LangRef.html for more detail). These restrictions allow the exception handling
code to gather the information it needs in a much more sane way.
This patch has the definition, implementation, C interface, parsing, and bitcode
support in it.
llvm-svn: 137501
|
| |
|
|
|
|
| |
when building with assertions disabled.
llvm-svn: 137460
|
| |
|
|
|
|
| |
is returned through a bitcast.
llvm-svn: 137402
|
| |
|
|
|
|
|
|
|
| |
the retains and releases all use the same SSA pointer value.
Also, don't let CFG hazards disrupt nested retain+release pair
optimizations.
llvm-svn: 137399
|
| |
|
|
|
|
|
| |
rather than plain postorder, so that CFG constructs like single-exit loops
are reliably visited in a sensible order.
llvm-svn: 137398
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
SCEV unrolling can unroll loops with arbitrary induction variables. It
is a prerequisite for -disable-iv-rewrite performance. It is also
easily handles loops of arbitrary structure including multiple exits
and is generally more robust.
This is under a temporary option to avoid affecting default
behavior for the next couple of weeks. It is needed so that I can
checkin unit tests for updateUnloop.
llvm-svn: 137384
|
| |
|
|
| |
llvm-svn: 137352
|
| |
|
|
| |
llvm-svn: 137203
|
| |
|
|
|
|
| |
SimplifyIndVar utility since it is required.
llvm-svn: 137202
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
based on ScalarEvolution without changing the induction variable phis.
This utility is the main tool of IndVarSimplifyPass, but the pass also
restructures induction variables in strange ways that are sensitive to
pass ordering. This provides a way for other loop passes to simplify
new uses of induction variables created during transformation. The
utility may be used by any pass that preserves ScalarEvolution. Soon
LoopUnroll will use it.
The net effect in this checkin is to cleanup the IndVarSimplify pass
by factoring out the SimplifyIndVar algorithm into a standalone utility.
llvm-svn: 137197
|
| |
|
|
| |
llvm-svn: 137170
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
recurrence, the initial values low bits can sometimes be ignored.
To take advantage of this, added FoldIVUser to IndVarSimplify to fold
an IV operand into a udiv/lshr if the operator doesn't affect the
result.
-indvars -disable-iv-rewrite now transforms
i = phi i4
i1 = i0 + 1
idx = i1 >> (2 or more)
i4 = i + 4
into
i = phi i4
idx = i0 >> ...
i4 = i + 4
llvm-svn: 137013
|
| |
|
|
| |
llvm-svn: 136900
|
| |
|
|
|
|
| |
spam.
llvm-svn: 136723
|
| |
|
|
|
|
| |
llvm-gcc buildbots on i386. Devang is looking into the root cause.
llvm-svn: 136674
|
| |
|
|
|
|
|
|
|
| |
This adds the 'resume' instruction class, IR parsing, and bitcode reading and
writing. The 'resume' instruction resumes propagation of an existing (in-flight)
exception whose unwinding was interrupted with a 'landingpad' instruction (to be
added later).
llvm-svn: 136589
|
| |
|
|
|
|
|
| |
r136339, r136341, r136369, r136387, r136392, r136396, r136429, r136430, r136444,
r136445, r136446, r136253 pending review.
llvm-svn: 136556
|
| |
|
|
| |
llvm-svn: 136503
|
| |
|
|
| |
llvm-svn: 136480
|
| |
|
|
|
|
|
|
|
| |
working on x86 (at least for trivial testcases); other architectures will
need more work so that they actually emit the appropriate instructions for
orderings stricter than 'monotonic'. (As far as I can tell, the ARM, PPC,
Mips, and Alpha backends need such changes.)
llvm-svn: 136457
|