summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp
Commit message (Collapse)AuthorAgeFilesLines
* The element insertion code in scalar replacement doesn't handle incorrectCameron Zwarich2011-10-231-2/+4
| | | | | | | element types, even though the element extraction code does. It is surprising that this bug has been here for so long. Fixes <rdar://problem/10318778>. llvm-svn: 142740
* Fix PR11106 by correcting a typo that has been in the code for over a year. ThisCameron Zwarich2011-10-111-2/+2
| | | | | | | | would have never worked, since the element type of a vector type is never a vector type. Also fix the conditional to be more direct in checking whether EltTy is a vector type. llvm-svn: 141713
* Remove a lot of the fancy scalar replacement code for dealing with llvm-gcc'sCameron Zwarich2011-10-111-205/+16
| | | | | | | lowering of NEON code. It provides little-to-no benefit now and only introduces additional complexity. llvm-svn: 141646
* Stop emitting instructions with the name "tmp" they eat up memory and have ↵Benjamin Kramer2011-09-271-41/+30
| | | | | | | | to be uniqued, without any benefit. If someone prefers %tmp42 to %42, run instnamer. llvm-svn: 140634
* PR10987: add a missed safety check to isSafePHIToSpeculate in scalarrepl.Eli Friedman2011-09-221-7/+11
| | | | llvm-svn: 140327
* Change a bunch of isVolatile() checks to check for atomic load/store as well.Eli Friedman2011-09-121-11/+11
| | | | | | | | No tests; these changes aren't really interesting in the sense that the logic is the same for volatile and atomic. I believe this completes all of the changes necessary for the optimizer to handle loads and stores correctly. I'm going to try and come up with some additional testing, though. llvm-svn: 139533
* Finish adding support for lifetime intrinsics to SROA. Fixes PR10121!Nick Lewycky2011-07-251-1/+110
| | | | llvm-svn: 136008
* Convert GetElementPtrInst to use ArrayRef.Jay Foad2011-07-251-3/+2
| | | | llvm-svn: 135904
* Fix MergeInVectorType to check for vector types with the same allocDan Gohman2011-07-211-0/+6
| | | | | | | size but different element types, so that it filters out the cases that CreateShuffleVectorCast doesn't handle. This fixes rdar://9786827. llvm-svn: 135721
* Convert TargetData::getIndexedOffset to use ArrayRef.Jay Foad2011-07-191-6/+4
| | | | llvm-svn: 135478
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-181-91/+91
| | | | llvm-svn: 135375
* Use DBG_VALUE location while inserting DBG_VALUE during alloca promotion.Devang Patel2011-07-071-2/+2
| | | | llvm-svn: 134568
* Handle cases where multiple dbg.declare and dbg.value intrinsics are tied to ↵Devang Patel2011-07-061-11/+58
| | | | | | one alloca. llvm-svn: 134549
* Simplify. Consolidate dbg.declare handling in AllocaPromoter.Devang Patel2011-07-061-13/+18
| | | | llvm-svn: 134538
* Fix likely typo, reduce number of instruction name collisions.Nick Lewycky2011-07-011-1/+1
| | | | llvm-svn: 134235
* Teach one piece of scalarrepl to handle lifetime markers. When transforming anNick Lewycky2011-06-271-13/+37
| | | | | | | | alloca that only holds a copy of a global and we're going to replace the users of the alloca with that global, just nuke the lifetime intrinsics. Part of PR10121. llvm-svn: 133905
* When scalar replacement returns a vector type, only accept it if the vectorCameron Zwarich2011-06-181-0/+5
| | | | | | | | | | | | type's bitwidth matches the (allocated) size of the alloca. This severely pessimizes vector scalar replacement when the only vector type being used is something like <3 x float> on x86 or ARM whose allocated size matches a <4 x float>. I hope to fix some of the flawed assumptions about allocated size throughout scalar replacement and reenable this in most cases. llvm-svn: 133338
* Fix an invalid bitcast crash that occurs when doing a partial memset of a vectorCameron Zwarich2011-06-181-3/+15
| | | | | | alloca. Fixes part of <rdar://problem/9580800>. llvm-svn: 133336
* Remove a pointless assignment. Nothing checks the value of VectorTy anymore nowCameron Zwarich2011-06-181-1/+0
| | | | | | unless ScalarKind is Vector. llvm-svn: 133335
* Be more obvious about what is being tested.Cameron Zwarich2011-06-141-1/+2
| | | | llvm-svn: 132982
* Fix grammar.Cameron Zwarich2011-06-131-3/+3
| | | | llvm-svn: 132952
* Rename MergeInType to MergeInTypeForLoadOrStore.Cameron Zwarich2011-06-131-8/+10
| | | | llvm-svn: 132940
* Remove the HadAVector instance variable and replace it with a use of ScalarKind.Cameron Zwarich2011-06-131-15/+26
| | | | llvm-svn: 132939
* Remove a vacuous check.Cameron Zwarich2011-06-131-1/+1
| | | | llvm-svn: 132938
* Have SRoA explicitly track the kind of scalar it is promoting. This is prettyCameron Zwarich2011-06-131-10/+21
| | | | | | | | spartan right now, but I plan to encode more information in this enum to improve the correctness and reliability of SRoA. At least this first pass makes it possible to make VectorTy an actual VectorType. llvm-svn: 132937
* Remove an argument that is always true.Cameron Zwarich2011-06-131-6/+5
| | | | llvm-svn: 132936
* Remove a vacuous condition.Cameron Zwarich2011-06-091-3/+1
| | | | llvm-svn: 132767
* Fix PR10104 by adding a bounds check on a vector element access check. It wasCameron Zwarich2011-06-091-1/+4
| | | | | | | | assuming that all offsets are legal vector accesses, and thus trying to access the float member of { <2 x float>, float } as the 3rd element of the first member. llvm-svn: 132766
* Fix an assymmetry between ConvertScalar_ExtractValue and ↵Cameron Zwarich2011-06-081-3/+4
| | | | | | | | | | ConvertScalar_InsertValue. The former was using the size of the entire alloca, whereas the latter was correctly using the allocated size of the immediate type being converted (which may differ from the size of the alloca). This fixes PR10082. llvm-svn: 132759
* Use IRBuilder, preserve line numbers.Devang Patel2011-06-031-4/+6
| | | | llvm-svn: 132578
* Clean up the lazy initialization of DIBuilder a bit.Cameron Zwarich2011-05-241-0/+2
| | | | llvm-svn: 131956
* Make LoadAndStorePromoter preserve debug info and create llvm.dbg.values whenCameron Zwarich2011-05-241-5/+12
| | | | | | promoting allocas to SSA variables. Fixes <rdar://problem/9479036>. llvm-svn: 131953
* Fix PR9820: a read-only call differs from a load in that a load doesn'tDuncan Sands2011-05-061-6/+9
| | | | | | | return the pointer being dereferenced, it returns the pointee, but a call might return the pointer itself. llvm-svn: 130979
* Fix another case of <rdar://problem/9184212> that only occurs with codeCameron Zwarich2011-04-201-31/+44
| | | | | | | generated by llvm-gcc, since llvm-gcc uses 2 i64s for passing a 4 x float vector on ARM rather than an i64 array like Clang. llvm-svn: 129878
* The bitcast case here is actually handled uniformly earlier in the function, soCameron Zwarich2011-04-201-8/+3
| | | | | | delete it. llvm-svn: 129877
* Cleanup some code to better use an early return style in preparation for addingCameron Zwarich2011-04-201-6/+10
| | | | | | more cases. llvm-svn: 129876
* Cleanup r129509 based on comments by ChrisMon P Wang2011-04-141-7/+6
| | | | llvm-svn: 129532
* Cleanup r129472 by using a utility routine as suggested by Eli.Mon P Wang2011-04-141-51/+43
| | | | llvm-svn: 129509
* Vectors with different number of elements of the same element type can haveMon P Wang2011-04-131-6/+64
| | | | | | | | the same allocation size but different primitive sizes(e.g., <3xi32> and <4xi32>). When ScalarRepl promotes them, it can't use a bit cast but should use a shuffle vector instead. llvm-svn: 129472
* Remove PHINode::reserveOperandSpace(). Instead, add a parameter toJay Foad2011-03-301-2/+2
| | | | | | PHINode::Create() giving the (known or expected) number of operands. llvm-svn: 128537
* (Almost) always call reserveOperandSpace() on newly created PHINodes.Jay Foad2011-03-301-0/+1
| | | | llvm-svn: 128535
* Do some simple copy propagation through integer loads and stores when promotingCameron Zwarich2011-03-291-9/+14
| | | | | | | vector types. This helps a lot with inlined functions when using the ARM soft float ABI. Fixes <rdar://problem/9184212>. llvm-svn: 128453
* Fix a typo and add a test.Cameron Zwarich2011-03-261-1/+1
| | | | llvm-svn: 128331
* Fix PR9464 by correcting some math that just happened to be right in most casesCameron Zwarich2011-03-231-11/+10
| | | | | | that were hit in practice. llvm-svn: 128146
* Fix a comment.Cameron Zwarich2011-03-161-3/+3
| | | | llvm-svn: 127728
* Only convert allocas to scalars if it is profitable. The profitability metric ICameron Zwarich2011-03-161-2/+16
| | | | | | | | | | | chose is having a non-memcpy/memset use and being larger than any native integer type. Originally I chose having an access of a size smaller than the total size of the alloca, but this caused some minor issues on the spirit benchmark where SRoA runs again after some inlining. This fixes <rdar://problem/8613163>. llvm-svn: 127718
* Better use initializer lists.Cameron Zwarich2011-03-161-5/+2
| | | | llvm-svn: 127716
* Add a clarifying comment.Cameron Zwarich2011-03-161-1/+1
| | | | llvm-svn: 127715
* Fix a crasher introduced by r127317 that is seen on the bots when using anCameron Zwarich2011-03-091-18/+21
| | | | | | | alloca as both integer and floating-point vectors of the same size. Bugpoint is not cooperating with me, but I'll try to find a manual testcase tomorrow. llvm-svn: 127320
* Add support to scalar replacement for partial vector accesses of an alloca, e.g.Cameron Zwarich2011-03-091-12/+127
| | | | | | | | | | | | | | | | | a union of a float, <2 x float>, and <4 x float>. This mostly comes up with the use of vector intrinsics, especially in NEON when programmers know the layout of the register file. This enables codegen to eliminate a lot of the subregister traffic it would otherwise generate. This commit only enables this for a small number of floating-point cases, but a lot more integer cases. I assume this is okay for all ports, but I did not do extensive testing of the quality of code involving i512 vectors and the like. If there is a use case where this generates worse code than before, let me know and we can scale it back. This fixes <rdar://problem/9036264>. llvm-svn: 127317
OpenPOWER on IntegriCloud