| Commit message (Collapse) | Author | Age | Files | Lines |
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Fix SingleSource/Regression/C/2003-05-21-UnionBitFields.c by changing a
getHighBitsSet call to getLowBitsSet call that was incorrectly converted
from the original lshr constant expression.
llvm-svn: 35348
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Remove a use of getLowBitsSet that caused the mask used for replacement of
shl/lshr pairs with an AND instruction to be computed incorrectly. Its not
clear exactly why this is the case. This solves the disappearing shifts
problem, but it doesn't fix Regression/C/2003-05-21-UnionBitFields. It
seems there is more going on.
llvm-svn: 35342
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llvm-svn: 35341
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* Don't assume shift amounts are <= 64 bits
* Avoid creating an extra APInt in SubOne and AddOne by using -- and ++
* Add another use of getLowBitsSet
* Convert a series of if statements to a switch
llvm-svn: 35339
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using the facilities of APInt. While this duplicates a tiny fraction of
the constant folding code, it also makes the code easier to read and
avoids large ConstantExpr overhead for simple, known computations.
llvm-svn: 35335
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2. Use isStrictlyPositive() instead of isPositive() in two places where
they need APInt value > 0 not only >=0.
llvm-svn: 35333
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APInt with its type mask.
llvm-svn: 35325
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* Convert the last use of a uint64_t that should have been an APInt.
* Change ComputeMaskedBits to have a const reference argument for the Mask
so that recursions don't cause unneeded temporaries. This causes temps
to be needed in other places (where the mask has to change) but this
change optimizes for the recursion which is more frequent.
* Remove two instances of &ing a Mask with getAllOnesValue. Its not
needed any more because APInt is accurate in its bit computations.
* Start using the getLowBitsSet and getHighBits set methods on APInt
instead of shifting. This makes it more clear in the code what is
going on.
llvm-svn: 35321
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llvm-svn: 35314
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llvm-svn: 35297
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Convert some calls to ConstantInt::getZExtValue() into getValue() and
use APInt facilities in the subsequent computations.
llvm-svn: 35294
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* APIntify visitAdd and visitSelectInst
* Remove unused uint64_t versions of utility functions that have been
replaced with APInt versions.
This completes most of the changes for APIntification of InstCombine. This
passes llvm-test and llvm/test/Transforms/InstCombine/APInt.
Patch by Zhou Sheng.
llvm-svn: 35287
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APIntify visitDiv, visitMul and visitRem.
Patch by Zhou Sheng.
llvm-svn: 35283
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llvm-svn: 35282
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APIntify several utility functions supporting logical operators and shift
operators.
Patch by Zhou Sheng.
llvm-svn: 35281
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llvm-svn: 35276
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llvm-svn: 35275
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APInt support for logical operators in visitAnd, visitOr, and visitXor.
Patch by Zhou Sheng.
llvm-svn: 35273
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* APIntify commonIntCastTransforms
* APIntify visitTrunc
* APIntify visitZExt
Patch by Zhou Sheng.
llvm-svn: 35271
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* Re-enable the APInt version of MaskedValueIsZero.
* APIntify the Comput{Un}SignedMinMaxValuesFromKnownBits functions
* APIntify visitICmpInst.
llvm-svn: 35270
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llvm-svn: 35265
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* Fix some indentation and comments in InsertRangeTest
* Add an "IsSigned" parameter to AddWithOverflow and make it handle signed
additions. Also, APIntify this function so it works with any bitwidth.
* For the icmp pred ([us]div %X, C1), C2 transforms, exit early if the
div instruction's RHS is zero.
* Finally, for icmp pred (sdiv %X, C1), -C2, fix an off-by-one error. The
HiBound needs to be incremented in order to get the range test correct.
llvm-svn: 35247
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llvm-svn: 35211
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llvm-svn: 35194
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llvm-svn: 35190
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Patch by Sheng Zhou.
llvm-svn: 35188
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Patch by Zhou Sheng.
llvm-svn: 35187
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llvm-svn: 35186
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2. Replace uses of the "isPositive" utility function with APInt::isPositive
llvm-svn: 35185
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Patch by Sheng Zhou.
llvm-svn: 35184
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Rearrange some code to simplify it now that shifts are binops
llvm-svn: 35145
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llvm-svn: 35094
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llvm-svn: 35093
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Fix PR1244 and Transforms/InstCombine/2007-03-13-CompareMerge.ll
llvm-svn: 35082
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"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)",
to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of
zext().
llvm-svn: 35080
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1. Ensure VTy, KnownOne and KnownZero have same bitwidth.
2. Make code more efficient.
llvm-svn: 35078
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Patch by Zhou Sheng.
llvm-svn: 35064
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Patch by Zhou Sheng.
llvm-svn: 35063
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llvm-svn: 35062
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1. Replace getSignedMinValue() with getSignBit() for better code readability.
2. Replace APIntOps::shl() with operator<<= for convenience.
3. Make APInt construction more effective.
llvm-svn: 35060
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llvm-svn: 35027
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llvm-svn: 35022
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Provide an APIntified version of MaskedValueIsZero. This will (temporarily)
cause a "defined but not used" message from the compiler. It will be used
in the next patch in this series.
Patch by Sheng Zhou.
llvm-svn: 35019
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Add a new ComputeMaskedBits function that is APIntified. We'll slowly
convert things over to use this version. When its all done, we'll remove
the existing version.
llvm-svn: 35018
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llvm-svn: 34939
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this out.
llvm-svn: 34920
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define i64 @test(i64 %A, i32 %B) {
%tmp12 = zext i32 %B to i64 ; <i64> [#uses=1]
%tmp3 = shl i64 %tmp12, 32 ; <i64> [#uses=1]
%tmp5 = add i64 %tmp3, %A ; <i64> [#uses=1]
%tmp6 = and i64 %tmp5, 123 ; <i64> [#uses=1]
ret i64 %tmp6
}
into:
define i64 @test(i64 %A, i32 %B) {
%tmp6 = and i64 %A, 123 ; <i64> [#uses=1]
ret i64 %tmp6
}
This implements Transforms/InstCombine/add2.ll:test1
llvm-svn: 34919
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llvm-svn: 34917
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llvm-svn: 34914
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llvm-svn: 34902
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