| Commit message (Collapse) | Author | Age | Files | Lines |
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This shrinks it down to something small. On the testcase
from PR1432, this speeds up instcombine from 0.7959s to 0.5000s,
(59%)
llvm-svn: 40840
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LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
llvm-svn: 40807
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casts in the input.
llvm-svn: 40741
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llvm-svn: 40739
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gvn, gvnpre, dse, and predsimplify. To see these, use:
make check-line-length
llvm-svn: 40738
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operations of casts. This implements InstCombine/zext-fold.ll
llvm-svn: 40726
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indexing an empty std::vector.
Updates to all clients.
llvm-svn: 40660
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llvm-svn: 40649
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llvm-svn: 40599
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undefs.
llvm-svn: 40439
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reported in PR 1556.
llvm-svn: 40133
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llvm-svn: 40124
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llvm-svn: 40102
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llvm-svn: 39921
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llvm-svn: 39896
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First teach instcombine that sign bit checks only demand the
sign bit, this allows simplify demanded bits to hack on
expressions better.
Second, teach instcombine that ashr is useless if only the
sign bit is demanded.
llvm-svn: 39880
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(X << 31) <s 0 --> (X&1) != 0
This happens dozens of times in the CFE.
llvm-svn: 39879
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transformation. Also, keep track of which end of the integer interval overflows
occur on. This fixes Transforms/InstCombine/2007-06-21-DivCompareMiscomp.ll
and rdar://5278853, a miscompilation of perl.
llvm-svn: 37692
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routine.
llvm-svn: 37679
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llvm-svn: 37649
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integer ops. This implements Transforms/InstCombine/and-or-not.ll
test3/test4, and finishes off PR1510
llvm-svn: 37589
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1. ~(~X | Y) === (X & ~Y)
2. (A|B) & ~(A&B) -> A^B
This allows us to transform ~(~(a|b) | (a&b)) -> a^b.
This implements PR1510 for scalar values.
llvm-svn: 37584
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operations from Duraids example.
llvm-svn: 37582
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llvm-svn: 37472
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llvm-svn: 37297
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objc code due to the way the FE lowers objc message sends.
llvm-svn: 37256
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llvm-svn: 37057
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llvm-svn: 36994
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Transforms/InstCombine/2006-12-08-ICmp-Combining.ll
llvm-svn: 36989
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llvm-svn: 36984
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llvm-svn: 36873
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llvm-svn: 36857
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llvm-svn: 36809
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llvm-svn: 36807
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llvm-svn: 36775
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llvm-svn: 36662
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
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llvm-svn: 36632
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llvm-svn: 36527
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previous clients. This fixes MallocBench/gs
llvm-svn: 36525
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llvm-svn: 36523
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llvm-svn: 36521
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codepath
for unrelated casts.
llvm-svn: 36511
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llvm-svn: 36261
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if/then/else.
This sinks the two stores in this example into a single store in cond_next. In this
case, it allows elimination of the load as well:
store double 0.000000e+00, double* @s.3060
%tmp3 = fcmp ogt double %tmp1, 5.000000e-01 ; <i1> [#uses=1]
br i1 %tmp3, label %cond_true, label %cond_next
cond_true: ; preds = %entry
store double 1.000000e+00, double* @s.3060
br label %cond_next
cond_next: ; preds = %entry, %cond_true
%tmp6 = load double* @s.3060 ; <double> [#uses=1]
This implements Transforms/InstCombine/store-merge.ll:test2
llvm-svn: 36040
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llvm-svn: 36037
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llvm-svn: 36031
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define i32 @test(float %f) {
%tmp7 = insertelement <4 x float> undef, float %f, i32 0
%tmp17 = bitcast <4 x float> %tmp7 to <4 x i32>
%tmp19 = extractelement <4 x i32> %tmp17, i32 0
ret i32 %tmp19
}
into:
define i32 @test(float %f) {
%tmp19 = bitcast float %f to i32 ; <i32> [#uses=1]
ret i32 %tmp19
}
On PPC, this is the difference between:
_test:
mfspr r2, 256
oris r3, r2, 8192
mtspr 256, r3
stfs f1, -16(r1)
addi r3, r1, -16
addi r4, r1, -32
lvx v2, 0, r3
stvx v2, 0, r4
lwz r3, -32(r1)
mtspr 256, r2
blr
and:
_test:
stfs f1, -4(r1)
nop
nop
nop
lwz r3, -4(r1)
blr
llvm-svn: 36025
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unsigned test(float f) {
return _mm_cvtsi128_si32( (__m128i) _mm_set_ss( f*f ));
}
into:
_test:
movss 4(%esp), %xmm0
mulss %xmm0, %xmm0
movd %xmm0, %eax
ret
instead of:
_test:
movss 4(%esp), %xmm0
mulss %xmm0, %xmm0
xorps %xmm1, %xmm1
movss %xmm0, %xmm1
movd %xmm1, %eax
ret
GCC gets:
_test:
subl $28, %esp
movss 32(%esp), %xmm0
mulss %xmm0, %xmm0
xorps %xmm1, %xmm1
movss %xmm0, %xmm1
movaps %xmm1, %xmm0
movd %xmm0, 12(%esp)
movl 12(%esp), %eax
addl $28, %esp
ret
llvm-svn: 36020
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llvm-svn: 35981
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