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rdar://problem/9267970
Patch by Julien Lerouge!
llvm-svn: 131339
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side of the icmp is an exact shift.
llvm-svn: 130954
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llvm-svn: 130705
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This automagically provides a transform noticed by my super-optimizer
as occurring quite often: "rem x, (select cond, x, 1)" -> 0.
llvm-svn: 130694
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urem or constant B.
This obviously helps a lot if the division would be turned into a libcall
(think i64 udiv on i386), but div is also one of the few remaining instructions
on modern CPUs that become more expensive when the bitwidth gets bigger.
This also helps register pressure on i386 when dividing chars, divb needs
two 8-bit parts of a 16 bit register as input where divl uses two registers.
int foo(unsigned char a) { return a/10; }
int bar(unsigned char a, unsigned char b) { return a/b; }
compiles into (x86_64)
_foo:
imull $205, %edi, %eax
shrl $11, %eax
ret
_bar:
movzbl %dil, %eax
divb %sil, %al
movzbl %al, %eax
ret
llvm-svn: 130615
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This folds away silly stuff like (a&255)/1000 -> 0.
llvm-svn: 130614
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llvm-svn: 130489
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Fixes PR9809.
llvm-svn: 130485
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This shouldn't happen in practice because the icmp would be a constant.
Add a check so we don't miscompile code if something goes wrong.
llvm-svn: 130446
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llvm-svn: 130428
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This happens when GVN widens loads. Part of PR6627.
llvm-svn: 130405
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effective in avoiding recomputation of LCSSA form; the widespread
use of instsimplify (which looks through phi nodes) means it was
not preserving LCSSA form anyway; and instcombine is no longer
scheduled in the middle of the loop passes so this doesn't matter
anymore.
llvm-svn: 130301
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when X has multiple uses. This is useful for exposing secondary optimizations,
but the X86 backend isn't ready for this when X has a single use. For example,
this can disable load folding.
This is inching towards resolving PR6627.
llvm-svn: 130238
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llvm-svn: 130237
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llvm-svn: 129644
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found by code inspection.
llvm-svn: 129641
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Luis Felipe Strano Moraes!
llvm-svn: 129558
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canonical, and generally leads to better code. Found while looking at
an article about saturating arithmetic.
llvm-svn: 129545
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llvm-svn: 129419
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llvm-svn: 129403
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Now that we have a first-class way to represent unaligned loads, the unaligned
load intrinsics are superfluous.
First part of <rdar://problem/8460511>.
llvm-svn: 129401
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llvm-svn: 129271
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space info. We crash with an assert in this case. This change checks that the
address space of the bitcasted pointer is the same as the gep ptr.
llvm-svn: 128884
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It's possible to craft an input that hits the recursion limits in a way
that SimplifyDemandedBits doesn't simplify the icmp but ComputeMaskedBits
can infer which bits are zero.
No test case as it depends on too many other things. Fixes PR9609.
llvm-svn: 128777
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llvm-svn: 128745
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- Localize the check if an icmp has one use to a place where we know we're
introducing something that's likely more expensive than a sext from i1.
- Add an assert to make sure a case that would lead to a miscompilation is
folded away earlier.
- Fix a typo.
llvm-svn: 128744
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llvm-svn: 128733
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only one unknown bit.
int test1(unsigned x) { return (x&8) ? 0 : -1; }
int test3(unsigned x) { return (x&8) ? -1 : 0; }
before (x86_64):
_test1:
andl $8, %edi
cmpl $1, %edi
sbbl %eax, %eax
ret
_test3:
andl $8, %edi
cmpl $1, %edi
sbbl %eax, %eax
notl %eax
ret
after:
_test1:
shrl $3, %edi
andl $1, %edi
leal -1(%rdi), %eax
ret
_test3:
shll $28, %edi
movl %edi, %eax
sarl $31, %eax
ret
llvm-svn: 128732
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functionality change.
llvm-svn: 128731
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llvm-svn: 128683
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even try.
Thanks Eli!
llvm-svn: 128676
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Thanks Frits!
llvm-svn: 128628
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llvm-svn: 128627
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llvm-svn: 128626
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losslessly converted to the type of x.
Fixes PR9592.
llvm-svn: 128625
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llvm-svn: 128624
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fmul.
Fixes PR9587.
llvm-svn: 128546
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PHINode::Create() giving the (known or expected) number of operands.
llvm-svn: 128537
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llvm-svn: 128535
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On x86 we now compile "if (a < 0 && b < 0)" into
testl %edi, %esi
js IF.THEN
llvm-svn: 128496
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llvm-svn: 128413
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llvm-svn: 128406
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output for those cases much clearer since without this it only showed that the original instruction was removed, not what it was replaced with.
llvm-svn: 128399
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the subclass optional data.
llvm-svn: 128388
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llvm-svn: 128380
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removes one use of X which helps it pass the many hasOneUse() checks.
In my analysis, this turns up very often where X = A >>exact B and that can't be
simplified unless X has one use (except by increasing the lifetime of A which is
generally a performance loss).
llvm-svn: 128373
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This is done by lowering dbg.declare intrinsic into dbg.value intrinsic.
Radar 9143931.
llvm-svn: 127834
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normal version.
Fixes rdar://9123638
llvm-svn: 127636
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Early CSE pass so this patch reverts it to original source code.
llvm-svn: 127574
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load and store reference same memory location, the memory location
is represented by getelementptr with two uses (load and store) and
the getelementptr's base is alloca with single use. At this point,
instructions from alloca to store can be removed.
(this pattern is generated when bitfield is accessed.)
For example,
%u = alloca %struct.test, align 4 ; [#uses=1]
%0 = getelementptr inbounds %struct.test* %u, i32 0, i32 0;[#uses=2]
%1 = load i8* %0, align 4 ; [#uses=1]
%2 = and i8 %1, -16 ; [#uses=1]
%3 = or i8 %2, 5 ; [#uses=1]
store i8 %3, i8* %0, align 4
llvm-svn: 127565
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