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* Implement changes from Chris's feedback.Torok Edwin2009-07-0844-185/+246
| | | | | | Finish converting lib/Target. llvm-svn: 75043
* Implement NEON vst1 instruction.Bob Wilson2009-07-081-0/+22
| | | | llvm-svn: 75037
* Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin2009-07-0812-63/+80
| | | | llvm-svn: 75036
* Fix cmake build.Xerxes Ranby2009-07-081-0/+1
| | | | | | Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt llvm-svn: 75035
* Convert more abort() calls to llvm_report_error().Torok Edwin2009-07-0817-94/+112
| | | | | | Also remove trailing semicolon. llvm-svn: 75027
* Push methods into base class in preparation for sharing.David Goodwin2009-07-088-598/+605
| | | | llvm-svn: 75020
* Implement NEON vld1 instructions.Bob Wilson2009-07-083-1/+31
| | | | llvm-svn: 75019
* Start converting to new error handling API.Torok Edwin2009-07-0813-68/+64
| | | | | | | cerr+abort -> llvm_report_error assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included) llvm-svn: 75018
* Start breaking out common base functionality for register info.David Goodwin2009-07-084-916/+979
| | | | llvm-svn: 75016
* Checkpoint Thumb2 Instr info work. Generalized base code so that it can be ↵David Goodwin2009-07-0811-1115/+1412
| | | | | | shared between ARM and Thumb2. Not yet activated because register information must be generalized first. llvm-svn: 75010
* Mark sublw_cc and subfw_cc as Terminator insns so that they are part of the ↵Sanjiv Gupta2009-07-081-2/+4
| | | | | | terminator insns for a basic block alongwith branch insns. This way a copy is not getting inserted between cmp and branch during PHIElimination disturbing the status flags. llvm-svn: 74992
* Remove the vicmp and vfcmp instructions. Because we never had a release withNick Lewycky2009-07-081-1/+1
| | | | | | | these instructions, no autoupgrade or backwards compatibility support is provided. llvm-svn: 74991
* Add a Thumb2 instruction flag to that indicates whether the instruction can ↵Evan Cheng2009-07-083-14/+26
| | | | | | be transformed to 16-bit variant. llvm-svn: 74988
* Add a todo.Evan Cheng2009-07-082-1/+9
| | | | llvm-svn: 74976
* Also statically set bit 25 for BR_JT instructions.Evan Cheng2009-07-071-3/+3
| | | | llvm-svn: 74974
* Statically encode bit 25 to indicate immediate form of data processing ↵Evan Cheng2009-07-072-14/+37
| | | | | | instructions. Patch by Sean Callanan. llvm-svn: 74972
* --- Reverse-merging (from foreign repository) r74952 into '.':Bill Wendling2009-07-072-77/+71
| | | | | | | | | U lib/Target/X86/X86RegisterInfo.cpp U lib/Target/X86/X86RegisterInfo.h Temporarily revert. This was causing an infinite loop in the linker on Leopard. llvm-svn: 74970
* Commit the file I actually changed as part of lastDale Johannesen2009-07-071-10/+24
| | | | | | patch, instead of one I didn't. llvm-svn: 74968
* DWARF requires frame moves be specified at specific times. If you have aBill Wendling2009-07-072-71/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | prologue like this: __Z3fooi: Leh_func_begin1: LBB1_0: ## entry pushl %ebp Llabel1: movl %esp, %ebp Llabel2: pushl %esi Llabel3: subl $20, %esp call "L1$pb" "L1$pb": popl %esi The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp, %ebp" makes %ebp the new stack frame register, so that needs to be specified in DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs to be specified in DWARF. Before, all of this logic was in one method. This didn't work too well, because as you can see there are multiple FDE line entries that need to be created. This fix creates the "MachineMove" objects directly when they're needed; instead of waiting until the end, and losing information. llvm-svn: 74952
* Add Thumb2 movcc instructions.Evan Cheng2009-07-072-35/+82
| | | | llvm-svn: 74946
* Add BX and BXr9 encodings. Patch by Sean Callanan.Evan Cheng2009-07-071-2/+10
| | | | llvm-svn: 74938
* Have scoped mutexes take referenes instead of pointers.Owen Anderson2009-07-071-3/+3
| | | | llvm-svn: 74931
* Add Thumb2 pkhbt / pkhtb.Evan Cheng2009-07-071-4/+25
| | | | llvm-svn: 74895
* Add some more Thumb2 multiplication instructions.Evan Cheng2009-07-073-11/+134
| | | | llvm-svn: 74889
* 80 col violation.Evan Cheng2009-07-071-2/+2
| | | | llvm-svn: 74888
* Don't accept globals as matching 'i' constraintDale Johannesen2009-07-071-1/+6
| | | | | | | in PIC modes (in accordance with existing comment). gcc.apple/asm-block-25.c llvm-svn: 74886
* Avoid directly relying on llvm.dbg.compile_unit and llvm.dbg.global_variables.Devang Patel2009-07-061-27/+29
| | | | | | PIC16 developers, please verify. Thanks. llvm-svn: 74880
* Add FIXMEs.Devang Patel2009-07-061-0/+3
| | | | llvm-svn: 74879
* isThumb2 really should mean thumb2 only, not thumb2+.Evan Cheng2009-07-061-1/+1
| | | | llvm-svn: 74871
* Add bfc to armv6t2.Evan Cheng2009-07-063-35/+48
| | | | llvm-svn: 74868
* Added ARM::mls for armv6t2.Evan Cheng2009-07-061-0/+6
| | | | llvm-svn: 74866
* pic16 doesn't have a Data64bitsDirective. Set it NULL explicitly to tell the ↵Sanjiv Gupta2009-07-061-0/+1
| | | | | | generic code to not pick the default. llvm-svn: 74839
* pic16 isn't ready to handle llvm.metadata yet.Sanjiv Gupta2009-07-061-0/+2
| | | | llvm-svn: 74838
* Implement _CONFIG macro to allow users to se to configuration settings on ↵Sanjiv Gupta2009-07-064-26/+233
| | | | | | | | | | | the part. Implement _section macro to allow users to place objects in specific sections. Implement _address macro to allow users to place objects at a particular address. Placing objects at a memory address: crate a unique section name from varname, address, object type and put that section at specified address. Mark this section a full (size = banksize) so that other objects do not compete for it while placing objects to sections in AsmPrinter. llvm-svn: 74822
* Corrected the names description. Change in a comment. No functionality change.Sanjiv Gupta2009-07-061-1/+1
| | | | llvm-svn: 74819
* Add the Object Code Emitter class. Original patch by Aaron Gray, I did someBruno Cardoso Lopes2009-07-0616-18/+207
| | | | | | cleanup, removed some #includes and moved Object Code Emitter out-of-line. llvm-svn: 74813
* Silence a warning when assertions are turned off.Duncan Sands2009-07-031-0/+1
| | | | llvm-svn: 74779
* Silence a warning when assertions are turned off.Duncan Sands2009-07-031-0/+1
| | | | llvm-svn: 74778
* Silence warning when building without assertions.Duncan Sands2009-07-031-0/+1
| | | | llvm-svn: 74777
* Silence warnings when assertions are turned off.Duncan Sands2009-07-031-0/+2
| | | | llvm-svn: 74776
* For extended loads of type i1 to i8, we will need to at least one byte from ↵Sanjiv Gupta2009-07-032-2/+6
| | | | | | | | memory. The change in the .td file is to mark the side effects of mov insn. llvm-svn: 74768
* Various small changes related to the Condition Register on PowerPC.Tilmann Scheller2009-07-034-47/+68
| | | | | | | | Don't spill to the CR save area when using the SVR4 ABI for now. Don't rely on constants assigned for registers to be in order (they aren't assigned in order). Make sure CR bits are mapped to the corresponding CR field. llvm-svn: 74767
* Refactor ABI code in the PowerPC backend.Tilmann Scheller2009-07-0312-572/+370
| | | | | | | | | | | Make CalculateParameterAndLinkageAreaSize() Darwin-specific. Remove SVR4 specific code from LowerCALL_Darwin() and LowerFORMAL_ARGUMENTS_Darwin(). Rename MachoABI to DarwinABI for consistency. Rename ELF ABI to SVR4 ABI for consistency. Factor out common call return lowering between the Darwin and SVR4 ABI. Factor out common call lowering between the Darwin and SVR4 ABI. llvm-svn: 74766
* Implement the SVR4 ABI for PowerPC.Tilmann Scheller2009-07-038-58/+1105
| | | | | | | | | | | | | | | | | | | | | | | | Implement LowerFORMAL_ARGUMENTS_SVR4(). Implement LowerCALL_SVR4(). Add support for split arguments. Implement by value parameter passing for aggregates. Add support for variable argument lists. Create the spill area for argument registers of variable argument functions no longer at a fixed offset. Make sure callee saved registers are spilled to the correct stack offsets. Change allocation order of non-volatile floating-point registers. Add VRSAVE to the list of callee-saved registers, add CallConvLowering for vararg calls. Add support for variable argument calls with Vector arguments. Add support for VR and VRSAVE save area, improve allocation order for non-volatile vector registers. Stop creating illegal i8 values in LowerVASTART(). Add memory access width hints. Make sure to reserve space on the stack for the frame pointer. When using the SVR4 ABI, reserve r13 for the Small Data Area pointer. Assure that the frame pointer is spilled to the correct location on the stack. Some FP registers were not marked as volatile. Make sure the i64 words from a long double are passed either both in registers or both on the stack. Only put integer arguments in registers which are not marked with the inreg flag. llvm-svn: 74765
* Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed ↵Tilmann Scheller2009-07-039-12/+15
| | | | | | | | | | | arguments in a vararg call. With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack. The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list. llvm-svn: 74764
* Small cleanups in the PowerPC backend.Tilmann Scheller2009-07-034-38/+21
| | | | | | | | | | Small refactoring in LowerFORMAL_ARGUMENTS(). Correct minor formatting issues. Remove size argument of CreateCopyOfByValArgument(). Remove dead argument from CalculateStackSlotSize(). Remove unused variable ReturnAddrIndex from various targets. llvm-svn: 74763
* Add thumb2 sign / zero extend with rotate instructions.Evan Cheng2009-07-032-1/+59
| | | | llvm-svn: 74755
* Add Thumb2 load / store multiple instructions. Not used yet.Evan Cheng2009-07-031-0/+15
| | | | llvm-svn: 74749
* t2LDR_PRE etc are loads.Evan Cheng2009-07-031-0/+2
| | | | llvm-svn: 74741
* Added indexed stores.Evan Cheng2009-07-031-1/+45
| | | | llvm-svn: 74740
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