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* Add support for parsing ARM arithmetic instructions that update or don't updateKevin Enderby2010-12-091-6/+45
| | | | | | | | | the condition codes. Where the ones that do have an 's' suffix and the ones that don't don't have the suffix. The trick is if MatchInstructionImpl() fails we try again after adding a CCOut operand with the correct value and removing the 's' if present. Four simple test cases added for now, lots more to come. llvm-svn: 121401
* Rename the encoder method for t_cbtarget to match.Jim Grosbach2010-12-093-6/+6
| | | | llvm-svn: 121399
* Thumb needs a few different encoding schemes for branch targets. RenameJim Grosbach2010-12-091-3/+3
| | | | | | t_brtarget to be more specific. llvm-svn: 121398
* ARM stm/ldm instructions require more than one register in the register list.Jim Grosbach2010-12-092-19/+60
| | | | | | | | Otherwise, a plain str/ldr should be used instead. Make sure we account for that in prologue/epilogue code generation. rdar://8745460 llvm-svn: 121391
* Add ROTR and ROTRV mips32 instructions. Patch by Akira HatanakaBruno Cardoso Lopes2010-12-092-13/+28
| | | | llvm-svn: 121377
* Fix delay slot filler for non mips1 targets. Patch by Akira HatanakaBruno Cardoso Lopes2010-12-091-5/+9
| | | | llvm-svn: 121376
* Dont' feed ILA two inputs - it takes just one.Kalle Raiskila2010-12-091-1/+1
| | | | llvm-svn: 121372
* tidy up.Jim Grosbach2010-12-091-1/+1
| | | | llvm-svn: 121371
* 80 columns.Jim Grosbach2010-12-091-3/+5
| | | | llvm-svn: 121370
* Rewrite the darwin tlv support to use a chain and return to copyingEric Christopher2010-12-092-6/+9
| | | | | | | | the output to the correct register. Fixes a hidden problem uncovered by the last patch where we'd try to DAG combine our MVT::Other node oddly. llvm-svn: 121358
* Reworking the stack layout generated by the MBlaze backend.Wesley Peck2010-12-0912-177/+127
| | | | llvm-svn: 121355
* Fix encoding of the immediate operands on post-indexed LDR and friends.Owen Anderson2010-12-091-39/+26
| | | | llvm-svn: 121354
* Fix up some comments.Eric Christopher2010-12-091-2/+2
| | | | llvm-svn: 121351
* Fix Thumb2 fixups for ldr.Owen Anderson2010-12-093-5/+29
| | | | llvm-svn: 121350
* Add a textual message to the assert.Jim Grosbach2010-12-091-1/+2
| | | | llvm-svn: 121349
* Add a sanity check assert() for t2ADD/SUBrSPi instructions that they really areJim Grosbach2010-12-091-0/+7
| | | | | | referencing the stack pointer as they say they are. llvm-svn: 121347
* When using multiple instructions to reference a frame index, make sure toJim Grosbach2010-12-091-0/+5
| | | | | | update the opcode when necessary as well as the source register. llvm-svn: 121346
* The add/sub SP instructions are really pseudos. The assembler should ignoreJim Grosbach2010-12-091-0/+2
| | | | | | them. llvm-svn: 121345
* Remove unused variablesMatt Beaumont-Gay2010-12-091-2/+0
| | | | llvm-svn: 121343
* Fix typo in Thumb2 branch fixup.Owen Anderson2010-12-091-5/+5
| | | | llvm-svn: 121342
* Stop confusing people, it's not really a chain, or a tumor.Eric Christopher2010-12-091-2/+2
| | | | llvm-svn: 121340
* Remove extraneous semicolon.Bill Wendling2010-12-091-1/+1
| | | | llvm-svn: 121338
* Attempt to make the bit-twiddling readable resulted in the binary value beingBill Wendling2010-12-091-8/+10
| | | | | | overwritten. llvm-svn: 121337
* The BLX instruction is encoded differently than the BL, because why not? InBill Wendling2010-12-095-19/+53
| | | | | | | | | | particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0' always. Going through the BL fixup encoding was trashing the "bit 0 is '0'" invariant. Attempt to get the encoding at slightly more correct with this. llvm-svn: 121336
* Remove extraneous copy from DAG conversion for darwin tls. This wasEric Christopher2010-12-091-3/+2
| | | | | | | popping up at O0 when it wasn't folded and the fast allocator would complain. llvm-svn: 121330
* Fix Thumb2 BCC encoding and fixups.Owen Anderson2010-12-094-8/+34
| | | | llvm-svn: 121329
* Add rsp to the uses for the same reason as 32-bit.Eric Christopher2010-12-091-1/+1
| | | | llvm-svn: 121328
* Allow a slash, '/', as a prefix separator for X86. rdar://8741045Kevin Enderby2010-12-081-0/+2
| | | | llvm-svn: 121320
* Style nit and whitespace cleanupJason W Kim2010-12-081-2/+2
| | | | llvm-svn: 121317
* Clean up the add/sub w/ SP source reg instructions in Thumb2 a bit. Add a FIXMEJim Grosbach2010-12-081-11/+13
| | | | | | for more thorough cleanup. llvm-svn: 121315
* Fix T2TwoRegImm and use it for t2ADDrSPi12 and friends.Jim Grosbach2010-12-081-19/+9
| | | | llvm-svn: 121314
* Removed dead comment.Jason W Kim2010-12-081-2/+0
| | | | llvm-svn: 121313
* ARM/MC/ELF TPsoft is now a proper pseudo inst.Jason W Kim2010-12-082-4/+18
| | | | | | | | | Added test to check bl __aeabi_read_tp gets emitted properly for ELF/ASM as well as ELF/OBJ (including fixup) Also added support for ELF::R_ARM_TLS_IE32 llvm-svn: 121312
* T2TwoRegImm isn't right for t2SUBrSPi12. Use T2I instead.Jim Grosbach2010-12-081-1/+1
| | | | llvm-svn: 121311
* Add operand encoding for Thumb2 subw SP + imm. rdar://8745434Jim Grosbach2010-12-081-3/+7
| | | | llvm-svn: 121310
* Add operand encoding for Thumb2 addw Rn + imm. rdar://8745434Jim Grosbach2010-12-081-5/+12
| | | | llvm-svn: 121309
* Support the "target" encodings for the CB[N]Z instructions.Bill Wendling2010-12-085-32/+55
| | | | llvm-svn: 121308
* Fix an obvious cut-n-paste error.Evan Cheng2010-12-081-2/+2
| | | | llvm-svn: 121307
* Add operand encoding for Thumb2 addw SP + imm. rdar://8745434Jim Grosbach2010-12-081-4/+8
| | | | llvm-svn: 121305
* Parameterize opcode encoding bits for Thumb2 extended precision integerJim Grosbach2010-12-081-37/+19
| | | | | | multiply instructions. llvm-svn: 121301
* Fix operand encoding for Thumb2 extended precision multiplies. rdar://8745555Jim Grosbach2010-12-081-10/+24
| | | | llvm-svn: 121297
* Simplify T2 operand assignment notation a bit. No need to specify a bit rangeJim Grosbach2010-12-081-70/+70
| | | | | | for the source field when it's the whole thing that's being referenced. llvm-svn: 121291
* Tweak ARM fixup value adjustments for Thumb to better handle the half-wordJim Grosbach2010-12-081-8/+15
| | | | | | ordering of thumb mode. llvm-svn: 121280
* Generalize PostRAHazardRecognizer so it can be used in any pass forAndrew Trick2010-12-082-8/+12
| | | | | | | | both forward and backward scheduling. Rename it to ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer division from the scoreboard's critical path. llvm-svn: 121274
* Improve comment.Owen Anderson2010-12-081-1/+2
| | | | llvm-svn: 121272
* Add initializer.Jim Grosbach2010-12-081-1/+1
| | | | llvm-svn: 121262
* Add comments.Evan Cheng2010-12-081-8/+11
| | | | llvm-svn: 121238
* Add support for loading from a constant pool.Bill Wendling2010-12-085-10/+60
| | | | llvm-svn: 121226
* Let target asm backends see assembler flags as they go by. Use that to handleJim Grosbach2010-12-081-5/+28
| | | | | | thumb vs. arm mode differences in WriteNopData(). llvm-svn: 121219
* Simplify the byte reordering logic slightly.Owen Anderson2010-12-081-4/+2
| | | | llvm-svn: 121216
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