| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Added sext and zext patterns. | Evan Cheng | 2005-12-14 | 1 | -9/+34 |
| | | | | | llvm-svn: 24705 | ||||
| * | Added sextld + zextld DAG nodes. | Evan Cheng | 2005-12-14 | 1 | -0/+17 |
| | | | | | llvm-svn: 24703 | ||||
| * | Add support for fmul node of type v4f32. | Nate Begeman | 2005-12-14 | 2 | -0/+21 |
| | | | | | | | | | | | | | | | | | | | | | | | void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = mul <4 x float> %tmp1, %tmp1 store <4 x float> %tmp2, <4 x float> *%a ret void } Is selected to: _foo: li r2, 0 lvx v0, r2, r3 vxor v1, v1, v1 vmaddfp v0, v0, v0, v1 stvx v0, r2, r3 blr llvm-svn: 24701 | ||||
| * | Prepare support for AltiVec multiply, divide, and sqrt. | Nate Begeman | 2005-12-13 | 3 | -2/+19 |
| | | | | | llvm-svn: 24700 | ||||
| * | Add load + store folding srl and sra patterns. | Evan Cheng | 2005-12-13 | 1 | -12/+32 |
| | | | | | llvm-svn: 24696 | ||||
| * | Use the shared asmprinter code for printing special llvm globals | Chris Lattner | 2005-12-13 | 3 | -71/+10 |
| | | | | | llvm-svn: 24695 | ||||
| * | Add ELF and darwin support for static ctors and dtors | Chris Lattner | 2005-12-13 | 2 | -0/+40 |
| | | | | | llvm-svn: 24693 | ||||
| * | reindent a loop, unswitch a loop. No functionality changes | Chris Lattner | 2005-12-13 | 1 | -105/+109 |
| | | | | | llvm-svn: 24692 | ||||
| * | Beautify a few patterns. | Evan Cheng | 2005-12-13 | 1 | -15/+15 |
| | | | | | llvm-svn: 24690 | ||||
| * | Some shl patterns which do load + store folding. | Evan Cheng | 2005-12-13 | 1 | -6/+16 |
| | | | | | llvm-svn: 24689 | ||||
| * | A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 ↵ | Evan Cheng | 2005-12-13 | 1 | -12/+18 |
| | | | | | | | addr:$src). Only to improve readibility. llvm-svn: 24688 | ||||
| * | Add and, or, and xor patterns which fold load + stores. | Evan Cheng | 2005-12-13 | 1 | -41/+82 |
| | | | | | llvm-svn: 24687 | ||||
| * | Add inc + dec patterns which fold load + stores. | Evan Cheng | 2005-12-13 | 1 | -6/+12 |
| | | | | | llvm-svn: 24686 | ||||
| * | Add neg and not patterns which fold load + stores. | Evan Cheng | 2005-12-13 | 1 | -6/+12 |
| | | | | | llvm-svn: 24685 | ||||
| * | Missed a couple redundant explicit type casts. | Evan Cheng | 2005-12-13 | 1 | -3/+3 |
| | | | | | llvm-svn: 24684 | ||||
| * | Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc. | Evan Cheng | 2005-12-13 | 1 | -34/+47 |
| | | | | | llvm-svn: 24683 | ||||
| * | * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands. | Evan Cheng | 2005-12-13 | 1 | -27/+33 |
| | | | | | | | | This enables the removal of some explicit type casts. * Rename immZExt8 to i16ZExt8 as well. llvm-svn: 24682 | ||||
| * | Add some integer mul patterns. | Evan Cheng | 2005-12-12 | 1 | -11/+17 |
| | | | | | llvm-svn: 24681 | ||||
| * | Add some sub patterns. | Evan Cheng | 2005-12-12 | 1 | -13/+24 |
| | | | | | llvm-svn: 24675 | ||||
| * | When SelectLEAAddr() fails, it shouldn't cause the side effect of having the | Evan Cheng | 2005-12-12 | 1 | -17/+48 |
| | | | | | | | base or index operands being selected. llvm-svn: 24674 | ||||
| * | For ISD::RET, if # of operands >= 2, try selection the real data dep. operand | Evan Cheng | 2005-12-12 | 1 | -2/+10 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | first before the chain. e.g. int X; int foo(int x) { x += X + 37; return x; } If chain operand is selected first, we would generate: movl X, %eax movl 4(%esp), %ecx leal 37(%ecx,%eax), %eax rather than movl $37, %eax addl 4(%esp), %eax addl X, %eax which does not require %ecx. (Due to ADD32rm not matching.) llvm-svn: 24673 | ||||
| * | fix FP selects | Andrew Lenharth | 2005-12-12 | 2 | -14/+14 |
| | | | | | llvm-svn: 24672 | ||||
| * | remove some never-completed and now-obsolete code. | Chris Lattner | 2005-12-12 | 3 | -358/+0 |
| | | | | | llvm-svn: 24671 | ||||
| * | Add a few more add / store patterns. e.g. ADD32mi8. | Evan Cheng | 2005-12-12 | 1 | -10/+18 |
| | | | | | llvm-svn: 24670 | ||||
| * | restore a more restricted select | Andrew Lenharth | 2005-12-12 | 1 | -0/+32 |
| | | | | | llvm-svn: 24668 | ||||
| * | Fix typo :( | Chris Lattner | 2005-12-11 | 1 | -1/+1 |
| | | | | | llvm-svn: 24664 | ||||
| * | add selectcc | Chris Lattner | 2005-12-11 | 1 | -0/+6 |
| | | | | | llvm-svn: 24662 | ||||
| * | Remove type casts that are no longer needed | Chris Lattner | 2005-12-11 | 2 | -6/+7 |
| | | | | | llvm-svn: 24661 | ||||
| * | Realize the constant pool & global addrs must always be ptr type | Chris Lattner | 2005-12-11 | 1 | -5/+6 |
| | | | | | llvm-svn: 24660 | ||||
| * | Fix the JIT failures from last night. | Chris Lattner | 2005-12-11 | 1 | -1/+2 |
| | | | | | llvm-svn: 24659 | ||||
| * | FP select improvements (and likely breakage), oh and crazy people might want ↵ | Andrew Lenharth | 2005-12-11 | 2 | -42/+46 |
| | | | | | | | to *return* floating point values. Don't see why myself llvm-svn: 24658 | ||||
| * | Add support for TargetConstantPool nodes to the dag isel emitter, and use | Nate Begeman | 2005-12-10 | 4 | -29/+42 |
| | | | | | | | | them in the PPC backend, to simplify some logic out of Select and SelectAddr. llvm-svn: 24657 | ||||
| * | Use SDTCisPtrTy type property for store address. | Evan Cheng | 2005-12-10 | 1 | -2/+2 |
| | | | | | llvm-svn: 24656 | ||||
| * | * Added X86 store patterns. | Evan Cheng | 2005-12-10 | 3 | -43/+24 |
| | | | | | | | * Added X86 dec patterns. llvm-svn: 24654 | ||||
| * | Add support patterns to many load and store instructions which will | Nate Begeman | 2005-12-09 | 2 | -76/+133 |
| | | | | | | | hopefully use patterns in the near future. llvm-svn: 24651 | ||||
| * | Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load | Chris Lattner | 2005-12-09 | 1 | -3/+5 |
| | | | | | | | | must be a pointer. This removes a type check out of the code generated by tblgen for load matching. llvm-svn: 24650 | ||||
| * | Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al | Evan Cheng | 2005-12-09 | 1 | -3/+6 |
| | | | | | llvm-svn: 24648 | ||||
| * | Teach the PPC backend about the ctor and dtor list when not using __main and | Chris Lattner | 2005-12-09 | 1 | -0/+34 |
| | | | | | | | linking the entire program into one bc file. llvm-svn: 24645 | ||||
| * | it helps if your conditionals are not reversed | Andrew Lenharth | 2005-12-09 | 1 | -9/+9 |
| | | | | | llvm-svn: 24641 | ||||
| * | Add another important case we miss | Chris Lattner | 2005-12-08 | 1 | -0/+19 |
| | | | | | llvm-svn: 24639 | ||||
| * | Added support for ComplexPattern. | Evan Cheng | 2005-12-08 | 1 | -0/+21 |
| | | | | | llvm-svn: 24638 | ||||
| * | Added explicit type field to ComplexPattern. | Evan Cheng | 2005-12-08 | 1 | -2/+2 |
| | | | | | llvm-svn: 24637 | ||||
| * | * Added intelligence to X86 LEA addressing mode matching routine so it returns | Evan Cheng | 2005-12-08 | 2 | -84/+103 |
| | | | | | | | | false if the match is not profitable. e.g. leal 1(%eax), %eax. * Added patterns for X86 integer loads and LEA32. llvm-svn: 24635 | ||||
| * | X86 doesn't support sextinreg for 8-bit things either. | Chris Lattner | 2005-12-07 | 1 | -0/+1 |
| | | | | | llvm-svn: 24631 | ||||
| * | fix divide and remainder | Andrew Lenharth | 2005-12-06 | 2 | -13/+14 |
| | | | | | llvm-svn: 24628 | ||||
| * | Silence another annoying GCC warning | Chris Lattner | 2005-12-06 | 1 | -1/+1 |
| | | | | | llvm-svn: 24627 | ||||
| * | more decent branches for FP. I might have to make some intermediate nodes ↵ | Andrew Lenharth | 2005-12-06 | 1 | -2/+33 |
| | | | | | | | to actually be able to use the DAG for FPcmp llvm-svn: 24625 | ||||
| * | OK, this does wonders for broken stuff | Andrew Lenharth | 2005-12-06 | 1 | -0/+1 |
| | | | | | llvm-svn: 24624 | ||||
| * | Use new PPC-specific nodes to represent shifts which require the 6-bit | Chris Lattner | 2005-12-06 | 3 | -15/+40 |
| | | | | | | | | | | amount handling that PPC provides. These are generated by the lowering code and prevents the dag combiner from assuming (rightfully) that the shifts don't only look at 5 bits. This fixes a miscompilation of crafty with the new front-end. llvm-svn: 24615 | ||||
| * | added instructions with inverted immediates | Andrew Lenharth | 2005-12-06 | 2 | -32/+23 |
| | | | | | llvm-svn: 24614 | ||||

