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* Optimize some common usage patterns of atomic built-ins ↵Evan Cheng2009-07-305-14/+280
| | | | | | | | | | | | __sync_add_and_fetch() and __sync_sub_and_fetch. When the return value is not used (i.e. only care about the value in the memory), x86 does not have to use add to implement these. Instead, it can use add, sub, inc, dec instructions with the "lock" prefix. This is currently implemented using a bit of instruction selection trick. The issue is the target independent pattern produces one output and a chain and we want to map it into one that just output a chain. The current trick is to select it into a merge_values with the first definition being an implicit_def. The proper solution is to add new ISD opcodes for the no-output variant. DAG combiner can then transform the node before it gets to target node selection. Problem #2 is we are adding a whole bunch of x86 atomic instructions when in fact these instructions are identical to the non-lock versions. We need a way to add target specific information to target nodes and have this information carried over to machine instructions. Asm printer (or JIT) can use this information to add the "lock" prefix. llvm-svn: 77582
* Switch obvious clients to Twine instead of utostr (when they were already usingDaniel Dunbar2009-07-301-2/+1
| | | | | | | | | a Twine, e.g., for names). - I am a little ambivalent about this; we don't want the string conversion of utostr, but using overload '+' mixed with string and integer arguments is sketchy. On the other hand, this particular usage is something of an idiom. llvm-svn: 77579
* Keep track of references to mem(cpy,move,set) and then print only one externSanjiv Gupta2009-07-302-2/+41
| | | | | | declaration for them. llvm-svn: 77578
* Add a new register class to describe operands that can't be SP,Dan Gohman2009-07-305-38/+189
| | | | | | | due to x86 encoding restrictions. This is currently off by default because it may cause code quality regressions. This is for PR4572. llvm-svn: 77565
* Eliminate a bunch of redundant tables.Dan Gohman2009-07-301-167/+61
| | | | llvm-svn: 77558
* Lower a 128-bit BUILD_VECTOR with 2 elements to a pair of INSERT_VECTOR_ELTs.Bob Wilson2009-07-301-1/+19
| | | | llvm-svn: 77557
* Use array_endof instead of doing it manually.Dan Gohman2009-07-301-27/+20
| | | | llvm-svn: 77553
* tbb / tbh instructions only branch forward, not backwards.Evan Cheng2009-07-291-2/+4
| | | | llvm-svn: 77522
* Add VFP3 D registers to the DPR register class.Evan Cheng2009-07-291-1/+3
| | | | llvm-svn: 77521
* Move types back to the 2.5 API.Owen Anderson2009-07-294-9/+8
| | | | llvm-svn: 77516
* inline the global 'getInstrOperandRegClass' function into its callersChris Lattner2009-07-291-10/+0
| | | | | | now that TargetOperandInfo does the heavy lifting. llvm-svn: 77508
* Make sure Thumb2 uses the right call instructions.Evan Cheng2009-07-293-19/+80
| | | | llvm-svn: 77507
* 1. Introduce a new TargetOperandInfo::getRegClass() helper methodChris Lattner2009-07-292-15/+17
| | | | | | | | | | | | | and convert code to using it, instead of having lots of things poke the isLookupPtrRegClass() method directly. 2. Make PointerLikeRegClass contain a 'kind' int, and store it in the existing regclass field of TargetOperandInfo when the isLookupPtrRegClass() predicate is set. Make getRegClass pass this into TargetRegisterInfo::getPointerRegClass(), allowing targets to have multiple ptr_rc things. llvm-svn: 77504
* Give getPointerRegClass() a "kind" value so that targets can Chris Lattner2009-07-2910-24/+25
| | | | | | support multiple different pointer register classes. llvm-svn: 77501
* - Fix an obvious copy and paste error.Evan Cheng2009-07-293-6/+7
| | | | | | - Darwin Thumb2 call clobbers r9. llvm-svn: 77500
* Add llvm_unreachable for ... unreachable code!Eric Christopher2009-07-291-1/+1
| | | | llvm-svn: 77480
* Change Neon VLDn intrinsics to return multiple values instead of reallyBob Wilson2009-07-291-26/+26
| | | | | | | wide vectors. Likewise, change VSTn intrinsics to take separate arguments for each vector in a multi-vector struct. Adjust tests accordingly. llvm-svn: 77468
* more syntactic cleanups.Chris Lattner2009-07-291-5/+8
| | | | llvm-svn: 77442
* minor smallvector cleanupsChris Lattner2009-07-291-3/+3
| | | | llvm-svn: 77441
* whitespace cleanup.Chris Lattner2009-07-291-6/+5
| | | | llvm-svn: 77438
* mingw uses .data and .text, not _data and _text.Chris Lattner2009-07-291-2/+2
| | | | llvm-svn: 77435
* fix PR4584 with a trivial patch now that the pieces are in place.Chris Lattner2009-07-291-3/+3
| | | | llvm-svn: 77434
* pass the mangler down into the various SectionForGlobal methods.Chris Lattner2009-07-2914-59/+56
| | | | | | No functionality change. llvm-svn: 77432
* constant prop a utostr.Chris Lattner2009-07-291-2/+1
| | | | llvm-svn: 77430
* remove some completely wrong code. 1 is never < 16. It turns out that GCC ↵Chris Lattner2009-07-291-20/+10
| | | | | | appears to put strings of any length into the ELF cstring equivalent, so just rip out the code. llvm-svn: 77429
* Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte ↵Evan Cheng2009-07-297-44/+204
| | | | | | / halfword. llvm-svn: 77422
* Fix comment.Eric Christopher2009-07-291-2/+2
| | | | llvm-svn: 77415
* Change the "PreferredEHDataFormat" from "absptr" if we're on a Darwin system >Bill Wendling2009-07-292-10/+18
| | | | | | Leopard. llvm-svn: 77414
* Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. LowerEric Christopher2009-07-293-3/+46
| | | | | | to ptest instruction plus setcc. Revamp ptest instruction. Add test. llvm-svn: 77407
* Match X86 register names to number.Daniel Dunbar2009-07-292-4/+27
| | | | llvm-svn: 77404
* Thumb-2: fix typo that caused incorrect stack elimination for VFP operations ↵David Goodwin2009-07-281-1/+1
| | | | | | and very large stack frames. llvm-svn: 77401
* Move X86 instruction parsing into X86/AsmParser.Daniel Dunbar2009-07-281-23/+268
| | | | llvm-svn: 77384
* Output the correct format for Darwin.Bill Wendling2009-07-281-5/+7
| | | | llvm-svn: 77376
* Darwin outputs (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4) when we'reBill Wendling2009-07-281-2/+5
| | | | | | dealing with Data. llvm-svn: 77372
* Rename MDNode.h header. It defines MDnode and other metadata classes.Devang Patel2009-07-287-7/+7
| | | | | | New name is Metadata.h. llvm-svn: 77370
* Return ConstantVector to 2.5 API.Owen Anderson2009-07-282-7/+7
| | | | llvm-svn: 77366
* In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is ↵Evan Cheng2009-07-285-18/+7
| | | | | | until more optimization goes in). llvm-svn: 77364
* Remove support for ORN to workaround <rdar://problem/7096522>.David Goodwin2009-07-281-3/+5
| | | | llvm-svn: 77363
* Provide generic MCAsmParser when constructing target specific parsers.Daniel Dunbar2009-07-281-6/+8
| | | | llvm-svn: 77362
* more simplifications and cleanup. :)Chris Lattner2009-07-281-18/+17
| | | | llvm-svn: 77350
* Change ConstantArray to 2.5 API.Owen Anderson2009-07-281-1/+1
| | | | llvm-svn: 77347
* Add workaround for <rdar://problem/7098328>.David Goodwin2009-07-281-1/+2
| | | | llvm-svn: 77340
* Fix PR4639, a ELF-TLS regression from some of my refactoring.Chris Lattner2009-07-281-1/+1
| | | | llvm-svn: 77336
* the apple "ld_classic" linker doesn't support .literal16 in 32-bitChris Lattner2009-07-284-8/+15
| | | | | | | mode, and "ld64" (the default linker) falls back to it in -static mode. llvm-svn: 77334
* Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag.David Goodwin2009-07-281-1/+10
| | | | llvm-svn: 77329
* fix unused variable warningChris Lattner2009-07-281-1/+1
| | | | llvm-svn: 77326
* tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.Evan Cheng2009-07-281-0/+5
| | | | llvm-svn: 77305
* Code clean up. No functionality changes.Evan Cheng2009-07-281-21/+32
| | | | llvm-svn: 77301
* - More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng2009-07-2816-566/+607
| | | | | | | | | | | - This change also makes it possible to switch between ARM / Thumb on a per-function basis. - Fixed thumb2 routine which expand reg + arbitrary immediate. It was using using ARM so_imm logic. - Use movw and movt to do reg + imm when profitable. - Other code clean ups and minor optimizations. llvm-svn: 77300
* fix a casting problem on the llvm-x86_64-linux testerChris Lattner2009-07-281-1/+1
| | | | llvm-svn: 77295
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