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* Redefine LOOP* instructions from I to Ii8PCRel as they take an i8 argument.Roman Divacky2010-09-061-3/+3
| | | | llvm-svn: 113158
* random cleanupsChris Lattner2010-09-061-9/+12
| | | | llvm-svn: 113157
* remove some dead code. t2addrmode_imm8s4 is never used in a Chris Lattner2010-09-052-32/+1
| | | | | | pattern, so there is no need to define a matching function. llvm-svn: 113122
* cleanups.Chris Lattner2010-09-051-22/+17
| | | | llvm-svn: 113119
* update this.Chris Lattner2010-09-051-10/+29
| | | | llvm-svn: 113116
* implement rdar://6653118 - fastisel should fold loads where possible.Chris Lattner2010-09-053-9/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since mem2reg isn't run at -O0, we get a ton of reloads from the stack, for example, before, this code: int foo(int x, int y, int z) { return x+y+z; } used to compile into: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx movl 4(%rsp), %esi addl %edx, %esi movl (%rsp), %edx addl %esi, %edx movl %edx, %eax addq $12, %rsp ret Now we produce: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx addl 4(%rsp), %edx ## Folded load addl (%rsp), %edx ## Folded load movl %edx, %eax addq $12, %rsp ret Fewer instructions and less register use = faster compiles. llvm-svn: 113102
* zap dead code.Chris Lattner2010-09-0410-89/+1
| | | | llvm-svn: 113073
* remove dead code, mblaze uses SelectAddrRegImm/SelectAddrRegReg,Chris Lattner2010-09-041-54/+0
| | | | | | not SelectAddr llvm-svn: 113072
* Remove the last bit of isShuffleMaskLegal checks and improve the comment ↵Bruno Cardoso Lopes2010-09-041-5/+3
| | | | | | regarding mmx shuffles llvm-svn: 113059
* make explicit that we not handle several mmx shufflesBruno Cardoso Lopes2010-09-041-7/+7
| | | | llvm-svn: 113058
* Emit target specific nodes to handle palignr. Do not touch it for MMX ↵Bruno Cardoso Lopes2010-09-041-2/+10
| | | | | | versions yet. llvm-svn: 113056
* Emit target specific nodes to handle splats starting at zero indiciesBruno Cardoso Lopes2010-09-041-1/+8
| | | | llvm-svn: 113055
* Emit target specific nodes for isPSHUFHWMask and isPSHUFLWMaskBruno Cardoso Lopes2010-09-041-2/+10
| | | | llvm-svn: 113050
* Emit target specific nodes for isSHUFPMaskBruno Cardoso Lopes2010-09-041-1/+10
| | | | llvm-svn: 113048
* Previous isMOVLMask matching already emits targets nodes, remove checkBruno Cardoso Lopes2010-09-041-1/+0
| | | | llvm-svn: 113047
* One more check from the original isShuffleMaskLegal goes awayBruno Cardoso Lopes2010-09-041-1/+0
| | | | llvm-svn: 113045
* Remove a duplicated but useless check that i've inserted in the previous commit.Bruno Cardoso Lopes2010-09-041-9/+0
| | | | llvm-svn: 113044
* Refactor some code and remove the extra checks for unpckl_undef and unpckh_undefBruno Cardoso Lopes2010-09-041-28/+25
| | | | llvm-svn: 113043
* Remove check for unpckh maskBruno Cardoso Lopes2010-09-031-1/+0
| | | | llvm-svn: 113035
* Remove check for unpckl maskBruno Cardoso Lopes2010-09-031-1/+0
| | | | llvm-svn: 113034
* Inline isShuffleMaskLegal into LowerVECTOR_SHUFFLE, so we can startBruno Cardoso Lopes2010-09-031-4/+23
| | | | | | | checking each standalone condition and decide whether emit target specific nodes or remove the condition if it's already matched before. llvm-svn: 113031
* Reapply considered harmfull part of rr112934 and r112942.Bruno Cardoso Lopes2010-09-031-12/+109
| | | | | | | | "Use target specific nodes instead of relying in unpckl and unpckh pattern fragments during isel time. Also place a depth limit in getShuffleScalarElt. llvm-svn: 113020
* Remove the rest of the nonexistent 64-bit AVX instructions.Dale Johannesen2010-09-031-79/+76
| | | | | | Bruno, please review. llvm-svn: 113014
* Reapply last harmless part of r112934, the pattern fragment to match X86UnpcklpdBruno Cardoso Lopes2010-09-031-0/+7
| | | | llvm-svn: 113009
* Reintroduce a simple function refactoring done in r112934, also without any ↵Bruno Cardoso Lopes2010-09-031-10/+12
| | | | | | functionality changes llvm-svn: 113008
* Reapply piecies of r112942 and r112934 which don't doBruno Cardoso Lopes2010-09-031-0/+36
| | | | | | functional changes llvm-svn: 113007
* Reapply Fix commentBruno Cardoso Lopes2010-09-031-3/+3
| | | | llvm-svn: 113006
* Revert r112934, "- Use specific nodes to match unpckl masks.", which introducedDaniel Dunbar2010-09-032-133/+16
| | | | | | | some infinite loop and select failures. - Apologies for eager reverting, but its branch day. llvm-svn: 113000
* Revert r112938 "Fix comment", which depends on r112934, which introduced someDaniel Dunbar2010-09-031-3/+3
| | | | | | infinite loop and select failures. llvm-svn: 112999
* Revert r112942, "Use punpckh and unpckh family of nodes instead of using unpckhDaniel Dunbar2010-09-031-23/+3
| | | | | | | mask pattern fragment", which depends on r112934, which introduced some infinite loop and select failures. llvm-svn: 112998
* Re-apply r112883:Jim Grosbach2010-09-033-26/+95
| | | | | | | | | | | | | | "For ARM stack frames that utilize variable sized objects and have either large local stack areas or require dynamic stack realignment, allocate a base register via which to access the local frame. This allows efficient access to frame indices not accessible via the FP (either due to being out of range or due to dynamic realignment) or the SP (due to variable sized object allocation). In particular, this greatly improves efficiency of access to spill slots in Thumb functions which contain VLAs." r112986 fixed a latent bug exposed by the above. llvm-svn: 112989
* Check the local frame alignment for determining whether dynamic stackJim Grosbach2010-09-031-1/+1
| | | | | | | | | alignment should be performed. Otherwise dynamic realignment may trigger when the register allocator has already used the frame pointer as a general purpose register. That is, we need to make sure that the list of reserved registers doesn't change after register allocation. llvm-svn: 112986
* Finish converting the rest of the NEON VLD instructions to use pseudo-Bob Wilson2010-09-034-154/+149
| | | | | | | | | instructions prior to regalloc. Since it's getting a little close to the 2.8 branch deadline, I'll have to leave the rest of the instructions handled by the NEONPreAllocPass for now, but I didn't want to leave half of the VLD instructions converted and the other half not. llvm-svn: 112983
* Revert "For ARM stack frames that utilize variable sized objects and have ↵Daniel Dunbar2010-09-033-95/+26
| | | | | | | | either", it is breaking oggenc with Clang for ARMv6. This reverts commit 8d6e29cfda270be483abf638850311670829ee65. llvm-svn: 112962
* Zap dead code.Benjamin Kramer2010-09-032-13/+0
| | | | llvm-svn: 112955
* AVX doesn't support mm operations neither its instrinsics.Bruno Cardoso Lopes2010-09-031-32/+32
| | | | | | | The AVX versions of PALIGN and PABS* should only exist for 128-bit. Remove the unnecessary stuff. llvm-svn: 112944
* Use punpckh and unpckh family of nodes instead of using unpckh mask pattern ↵Bruno Cardoso Lopes2010-09-031-3/+23
| | | | | | fragment llvm-svn: 112942
* Replace NEON vabdl, vaba, and vabal intrinsics with combinations of theBob Wilson2010-09-032-33/+111
| | | | | | | | vabd intrinsic and add and/or zext operations. In the case of vaba, this also avoids the need for a DAG combine pattern to combine vabd with add. Update tests. Auto-upgrade the old intrinsics. llvm-svn: 112941
* Fix commentBruno Cardoso Lopes2010-09-031-3/+3
| | | | llvm-svn: 112938
* - Use specific nodes to match unpckl masks.Bruno Cardoso Lopes2010-09-032-16/+133
| | | | | | | | | - Teach getShuffleScalarElt how to handle more target specific nodes, so the DAGCombine can make use of it. - Add another hack to avoid the node update problem during legalization. More description on the comments llvm-svn: 112934
* Simple branch instruction support.Eric Christopher2010-09-031-0/+23
| | | | llvm-svn: 112923
* Don't call Predicate_* from X86 target.Jakob Stoklund Olesen2010-09-033-16/+21
| | | | llvm-svn: 112921
* Remove Predicate_* calls from MBlaze and XCoreJakob Stoklund Olesen2010-09-033-18/+17
| | | | llvm-svn: 112920
* Remove Predicate_* calls from MipsJakob Stoklund Olesen2010-09-031-2/+3
| | | | llvm-svn: 112919
* Add basic support for materializing constants (including fp) andEric Christopher2010-09-021-3/+40
| | | | | | stores. llvm-svn: 112912
* Properly emit __chkstk call instead of __alloca on non-mingw windows targets.Anton Korobeynikov2010-09-022-8/+21
| | | | | | Patch by Cameron Esfahani! llvm-svn: 112902
* Move insertps mask decoding to header fileBruno Cardoso Lopes2010-09-022-28/+24
| | | | llvm-svn: 112896
* Revert win64 changes. They seem to be incompleteAnton Korobeynikov2010-09-022-11/+7
| | | | llvm-svn: 112885
* For ARM stack frames that utilize variable sized objects and have eitherJim Grosbach2010-09-023-26/+95
| | | | | | | | | | | | | | | large local stack areas or require dynamic stack realignment, allocate a base register via which to access the local frame. This allows efficient access to frame indices not accessible via the FP (either due to being out of range or due to dynamic realignment) or the SP (due to variable sized object allocation). In particular, this greatly improves efficiency of access to spill slots in Thumb functions which contain VLAs. rdar://7352504 rdar://8374540 rdar://8355680 llvm-svn: 112883
* Properly allocate win64 shadow reg area.Anton Korobeynikov2010-09-022-7/+11
| | | | | | Patch by Jan Sjodin! llvm-svn: 112875
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